drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / amd / amdkfd / kfd_pm4_opcodes.h
blobb72fa3b8c2d48dc08b6fcf250a2dc15f8f0ef607
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef KFD_PM4_OPCODES_H
26 #define KFD_PM4_OPCODES_H
28 enum it_opcode_type {
29 IT_NOP = 0x10,
30 IT_SET_BASE = 0x11,
31 IT_CLEAR_STATE = 0x12,
32 IT_INDEX_BUFFER_SIZE = 0x13,
33 IT_DISPATCH_DIRECT = 0x15,
34 IT_DISPATCH_INDIRECT = 0x16,
35 IT_ATOMIC_GDS = 0x1D,
36 IT_OCCLUSION_QUERY = 0x1F,
37 IT_SET_PREDICATION = 0x20,
38 IT_REG_RMW = 0x21,
39 IT_COND_EXEC = 0x22,
40 IT_PRED_EXEC = 0x23,
41 IT_DRAW_INDIRECT = 0x24,
42 IT_DRAW_INDEX_INDIRECT = 0x25,
43 IT_INDEX_BASE = 0x26,
44 IT_DRAW_INDEX_2 = 0x27,
45 IT_CONTEXT_CONTROL = 0x28,
46 IT_INDEX_TYPE = 0x2A,
47 IT_DRAW_INDIRECT_MULTI = 0x2C,
48 IT_DRAW_INDEX_AUTO = 0x2D,
49 IT_NUM_INSTANCES = 0x2F,
50 IT_DRAW_INDEX_MULTI_AUTO = 0x30,
51 IT_INDIRECT_BUFFER_CNST = 0x33,
52 IT_STRMOUT_BUFFER_UPDATE = 0x34,
53 IT_DRAW_INDEX_OFFSET_2 = 0x35,
54 IT_DRAW_PREAMBLE = 0x36,
55 IT_WRITE_DATA = 0x37,
56 IT_DRAW_INDEX_INDIRECT_MULTI = 0x38,
57 IT_MEM_SEMAPHORE = 0x39,
58 IT_COPY_DW = 0x3B,
59 IT_WAIT_REG_MEM = 0x3C,
60 IT_INDIRECT_BUFFER = 0x3F,
61 IT_COPY_DATA = 0x40,
62 IT_PFP_SYNC_ME = 0x42,
63 IT_SURFACE_SYNC = 0x43,
64 IT_COND_WRITE = 0x45,
65 IT_EVENT_WRITE = 0x46,
66 IT_EVENT_WRITE_EOP = 0x47,
67 IT_EVENT_WRITE_EOS = 0x48,
68 IT_RELEASE_MEM = 0x49,
69 IT_PREAMBLE_CNTL = 0x4A,
70 IT_DMA_DATA = 0x50,
71 IT_ACQUIRE_MEM = 0x58,
72 IT_REWIND = 0x59,
73 IT_LOAD_UCONFIG_REG = 0x5E,
74 IT_LOAD_SH_REG = 0x5F,
75 IT_LOAD_CONFIG_REG = 0x60,
76 IT_LOAD_CONTEXT_REG = 0x61,
77 IT_SET_CONFIG_REG = 0x68,
78 IT_SET_CONTEXT_REG = 0x69,
79 IT_SET_CONTEXT_REG_INDIRECT = 0x73,
80 IT_SET_SH_REG = 0x76,
81 IT_SET_SH_REG_OFFSET = 0x77,
82 IT_SET_QUEUE_REG = 0x78,
83 IT_SET_UCONFIG_REG = 0x79,
84 IT_SCRATCH_RAM_WRITE = 0x7D,
85 IT_SCRATCH_RAM_READ = 0x7E,
86 IT_LOAD_CONST_RAM = 0x80,
87 IT_WRITE_CONST_RAM = 0x81,
88 IT_DUMP_CONST_RAM = 0x83,
89 IT_INCREMENT_CE_COUNTER = 0x84,
90 IT_INCREMENT_DE_COUNTER = 0x85,
91 IT_WAIT_ON_CE_COUNTER = 0x86,
92 IT_WAIT_ON_DE_COUNTER_DIFF = 0x88,
93 IT_SWITCH_BUFFER = 0x8B,
94 IT_SET_RESOURCES = 0xA0,
95 IT_MAP_PROCESS = 0xA1,
96 IT_MAP_QUEUES = 0xA2,
97 IT_UNMAP_QUEUES = 0xA3,
98 IT_QUERY_STATUS = 0xA4,
99 IT_RUN_LIST = 0xA5,
102 #define PM4_TYPE_0 0
103 #define PM4_TYPE_2 2
104 #define PM4_TYPE_3 3
106 #endif /* KFD_PM4_OPCODES_H */