drivers/gpu/drm/arm/malidp_drv.h

   1 /*
   2  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
   3  * Author: Liviu Dudau <Liviu.Dudau@arm.com>
   4  *
   5  * This program is free software and is provided to you under the terms of the
   6  * GNU General Public License version 2 as published by the Free Software
   7  * Foundation, and any use by you of this program is subject to the terms
   8  * of such GNU licence.
   9  *
  10  * ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
  11  */
  12
  13 #ifndef __MALIDP_DRV_H__
  14 #define __MALIDP_DRV_H__
  15
  16 #include <drm/drm_writeback.h>
  17 #include <drm/drm_encoder.h>
  18 #include <linux/mutex.h>
  19 #include <linux/wait.h>
  20 #include <linux/spinlock.h>
  21 #include <drm/drmP.h>
  22 #include "malidp_hw.h"
  23
  24 #define MALIDP_CONFIG_VALID_INIT        0
  25 #define MALIDP_CONFIG_VALID_DONE        1
  26 #define MALIDP_CONFIG_START             0xd0
  27
  28 struct malidp_error_stats {
  29         s32 num_errors;
  30         u32 last_error_status;
  31         s64 last_error_vblank;
  32 };
  33
  34 struct malidp_drm {
  35         struct malidp_hw_device *dev;
  36         struct drm_crtc crtc;
  37         struct drm_writeback_connector mw_connector;
  38         wait_queue_head_t wq;
  39         struct drm_pending_vblank_event *event;
  40         atomic_t config_valid;
  41         u32 core_id;
  42 #ifdef CONFIG_DEBUG_FS
  43         struct malidp_error_stats de_errors;
  44         struct malidp_error_stats se_errors;
  45         /* Protects errors stats */
  46         spinlock_t errors_lock;
  47 #endif
  48 };
  49
  50 #define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
  51
  52 struct malidp_plane {
  53         struct drm_plane base;
  54         struct malidp_hw_device *hwdev;
  55         const struct malidp_layer *layer;
  56 };
  57
  58 struct malidp_plane_state {
  59         struct drm_plane_state base;
  60
  61         /* size of the required rotation memory if plane is rotated */
  62         u32 rotmem_size;
  63         /* internal format ID */
  64         u8 format;
  65         u8 n_planes;
  66 };
  67
  68 #define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
  69 #define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
  70
  71 struct malidp_crtc_state {
  72         struct drm_crtc_state base;
  73         u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
  74         u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
  75         struct malidp_se_config scaler_config;
  76         /* Bitfield of all the planes that have requested a scaled output. */
  77         u8 scaled_planes_mask;
  78 };
  79
  80 #define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
  81
  82 int malidp_de_planes_init(struct drm_device *drm);
  83 int malidp_crtc_init(struct drm_device *drm);
  84
  85 #ifdef CONFIG_DEBUG_FS
  86 void malidp_error(struct malidp_drm *malidp,
  87                   struct malidp_error_stats *error_stats, u32 status,
  88                   u64 vblank);
  89 #endif
  90
  91 /* often used combination of rotational bits */
  92 #define MALIDP_ROTATED_MASK     (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
  93
  94 #endif  /* __MALIDP_DRV_H__ */