drivers/gpu/drm/meson/meson_venc.h

   1 /*
   2  * Copyright (C) 2016 BayLibre, SAS
   3  * Author: Neil Armstrong <narmstrong@baylibre.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of the
   8  * License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 /*
  20  * Video Encoders
  21  * - ENCI : Interlace Video Encoder
  22  * - ENCI_DVI : Interlace Video Encoder for DVI/HDMI
  23  * - ENCP : Progressive Video Encoder
  24  */
  25
  26 #ifndef __MESON_VENC_H
  27 #define __MESON_VENC_H
  28
  29 enum {
  30         MESON_VENC_MODE_NONE = 0,
  31         MESON_VENC_MODE_CVBS_PAL,
  32         MESON_VENC_MODE_CVBS_NTSC,
  33         MESON_VENC_MODE_HDMI,
  34 };
  35
  36 struct meson_cvbs_enci_mode {
  37         unsigned int mode_tag;
  38         unsigned int hso_begin; /* HSO begin position */
  39         unsigned int hso_end; /* HSO end position */
  40         unsigned int vso_even; /* VSO even line */
  41         unsigned int vso_odd; /* VSO odd line */
  42         unsigned int macv_max_amp; /* Macrovision max amplitude */
  43         unsigned int video_prog_mode;
  44         unsigned int video_mode;
  45         unsigned int sch_adjust;
  46         unsigned int yc_delay;
  47         unsigned int pixel_start;
  48         unsigned int pixel_end;
  49         unsigned int top_field_line_start;
  50         unsigned int top_field_line_end;
  51         unsigned int bottom_field_line_start;
  52         unsigned int bottom_field_line_end;
  53         unsigned int video_saturation;
  54         unsigned int video_contrast;
  55         unsigned int video_brightness;
  56         unsigned int video_hue;
  57         unsigned int analog_sync_adj;
  58 };
  59
  60 /* HDMI Clock parameters */
  61 enum drm_mode_status
  62 meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode);
  63 bool meson_venc_hdmi_supported_vic(int vic);
  64 bool meson_venc_hdmi_venc_repeat(int vic);
  65
  66 /* CVBS Timings and Parameters */
  67 extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal;
  68 extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc;
  69
  70 void meson_venci_cvbs_mode_set(struct meson_drm *priv,
  71                                struct meson_cvbs_enci_mode *mode);
  72 void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
  73                               struct drm_display_mode *mode);
  74 unsigned int meson_venci_get_field(struct meson_drm *priv);
  75
  76 void meson_venc_enable_vsync(struct meson_drm *priv);
  77 void meson_venc_disable_vsync(struct meson_drm *priv);
  78
  79 void meson_venc_init(struct meson_drm *priv);
  80
  81 #endif /* __MESON_VENC_H */