drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
blob74d2283f2c28e7bb06f97856f93b610d12522a04
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/vga_switcheroo.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc_helper.h>
35 #include <core/gpuobj.h>
36 #include <core/option.h>
37 #include <core/pci.h>
38 #include <core/tegra.h>
40 #include <nvif/driver.h>
41 #include <nvif/fifo.h>
42 #include <nvif/user.h>
44 #include <nvif/class.h>
45 #include <nvif/cl0002.h>
46 #include <nvif/cla06f.h>
47 #include <nvif/if0004.h>
49 #include "nouveau_drv.h"
50 #include "nouveau_dma.h"
51 #include "nouveau_ttm.h"
52 #include "nouveau_gem.h"
53 #include "nouveau_vga.h"
54 #include "nouveau_led.h"
55 #include "nouveau_hwmon.h"
56 #include "nouveau_acpi.h"
57 #include "nouveau_bios.h"
58 #include "nouveau_ioctl.h"
59 #include "nouveau_abi16.h"
60 #include "nouveau_fbcon.h"
61 #include "nouveau_fence.h"
62 #include "nouveau_debugfs.h"
63 #include "nouveau_usif.h"
64 #include "nouveau_connector.h"
65 #include "nouveau_platform.h"
67 MODULE_PARM_DESC(config, "option string to pass to driver core");
68 static char *nouveau_config;
69 module_param_named(config, nouveau_config, charp, 0400);
71 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
72 static char *nouveau_debug;
73 module_param_named(debug, nouveau_debug, charp, 0400);
75 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
76 static int nouveau_noaccel = 0;
77 module_param_named(noaccel, nouveau_noaccel, int, 0400);
79 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
80 "0 = disabled, 1 = enabled, 2 = headless)");
81 int nouveau_modeset = -1;
82 module_param_named(modeset, nouveau_modeset, int, 0400);
84 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
85 static int nouveau_atomic = 0;
86 module_param_named(atomic, nouveau_atomic, int, 0400);
88 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
89 static int nouveau_runtime_pm = -1;
90 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
92 static struct drm_driver driver_stub;
93 static struct drm_driver driver_pci;
94 static struct drm_driver driver_platform;
96 static u64
97 nouveau_pci_name(struct pci_dev *pdev)
99 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
100 name |= pdev->bus->number << 16;
101 name |= PCI_SLOT(pdev->devfn) << 8;
102 return name | PCI_FUNC(pdev->devfn);
105 static u64
106 nouveau_platform_name(struct platform_device *platformdev)
108 return platformdev->id;
111 static u64
112 nouveau_name(struct drm_device *dev)
114 if (dev->pdev)
115 return nouveau_pci_name(dev->pdev);
116 else
117 return nouveau_platform_name(to_platform_device(dev->dev));
120 static inline bool
121 nouveau_cli_work_ready(struct dma_fence *fence)
123 if (!dma_fence_is_signaled(fence))
124 return false;
125 dma_fence_put(fence);
126 return true;
129 static void
130 nouveau_cli_work(struct work_struct *w)
132 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
133 struct nouveau_cli_work *work, *wtmp;
134 mutex_lock(&cli->lock);
135 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
136 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
137 list_del(&work->head);
138 work->func(work);
141 mutex_unlock(&cli->lock);
144 static void
145 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
147 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
148 schedule_work(&work->cli->work);
151 void
152 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
153 struct nouveau_cli_work *work)
155 work->fence = dma_fence_get(fence);
156 work->cli = cli;
157 mutex_lock(&cli->lock);
158 list_add_tail(&work->head, &cli->worker);
159 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
160 nouveau_cli_work_fence(fence, &work->cb);
161 mutex_unlock(&cli->lock);
164 static void
165 nouveau_cli_fini(struct nouveau_cli *cli)
167 /* All our channels are dead now, which means all the fences they
168 * own are signalled, and all callback functions have been called.
170 * So, after flushing the workqueue, there should be nothing left.
172 flush_work(&cli->work);
173 WARN_ON(!list_empty(&cli->worker));
175 usif_client_fini(cli);
176 nouveau_vmm_fini(&cli->vmm);
177 nvif_mmu_fini(&cli->mmu);
178 nvif_device_fini(&cli->device);
179 mutex_lock(&cli->drm->master.lock);
180 nvif_client_fini(&cli->base);
181 mutex_unlock(&cli->drm->master.lock);
184 static int
185 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
186 struct nouveau_cli *cli)
188 static const struct nvif_mclass
189 mems[] = {
190 { NVIF_CLASS_MEM_GF100, -1 },
191 { NVIF_CLASS_MEM_NV50 , -1 },
192 { NVIF_CLASS_MEM_NV04 , -1 },
195 static const struct nvif_mclass
196 mmus[] = {
197 { NVIF_CLASS_MMU_GF100, -1 },
198 { NVIF_CLASS_MMU_NV50 , -1 },
199 { NVIF_CLASS_MMU_NV04 , -1 },
202 static const struct nvif_mclass
203 vmms[] = {
204 { NVIF_CLASS_VMM_GP100, -1 },
205 { NVIF_CLASS_VMM_GM200, -1 },
206 { NVIF_CLASS_VMM_GF100, -1 },
207 { NVIF_CLASS_VMM_NV50 , -1 },
208 { NVIF_CLASS_VMM_NV04 , -1 },
211 u64 device = nouveau_name(drm->dev);
212 int ret;
214 snprintf(cli->name, sizeof(cli->name), "%s", sname);
215 cli->drm = drm;
216 mutex_init(&cli->mutex);
217 usif_client_init(cli);
219 INIT_WORK(&cli->work, nouveau_cli_work);
220 INIT_LIST_HEAD(&cli->worker);
221 mutex_init(&cli->lock);
223 if (cli == &drm->master) {
224 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
225 cli->name, device, &cli->base);
226 } else {
227 mutex_lock(&drm->master.lock);
228 ret = nvif_client_init(&drm->master.base, cli->name, device,
229 &cli->base);
230 mutex_unlock(&drm->master.lock);
232 if (ret) {
233 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
234 goto done;
237 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
238 &(struct nv_device_v0) {
239 .device = ~0,
240 }, sizeof(struct nv_device_v0),
241 &cli->device);
242 if (ret) {
243 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
244 goto done;
247 ret = nvif_mclass(&cli->device.object, mmus);
248 if (ret < 0) {
249 NV_PRINTK(err, cli, "No supported MMU class\n");
250 goto done;
253 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
254 if (ret) {
255 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
256 goto done;
259 ret = nvif_mclass(&cli->mmu.object, vmms);
260 if (ret < 0) {
261 NV_PRINTK(err, cli, "No supported VMM class\n");
262 goto done;
265 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
266 if (ret) {
267 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
268 goto done;
271 ret = nvif_mclass(&cli->mmu.object, mems);
272 if (ret < 0) {
273 NV_PRINTK(err, cli, "No supported MEM class\n");
274 goto done;
277 cli->mem = &mems[ret];
278 return 0;
279 done:
280 if (ret)
281 nouveau_cli_fini(cli);
282 return ret;
285 static void
286 nouveau_accel_fini(struct nouveau_drm *drm)
288 nouveau_channel_idle(drm->channel);
289 nvif_object_fini(&drm->ntfy);
290 nvkm_gpuobj_del(&drm->notify);
291 nvif_notify_fini(&drm->flip);
292 nvif_object_fini(&drm->nvsw);
293 nouveau_channel_del(&drm->channel);
295 nouveau_channel_idle(drm->cechan);
296 nvif_object_fini(&drm->ttm.copy);
297 nouveau_channel_del(&drm->cechan);
299 if (drm->fence)
300 nouveau_fence(drm)->dtor(drm);
303 static void
304 nouveau_accel_init(struct nouveau_drm *drm)
306 struct nvif_device *device = &drm->client.device;
307 struct nvif_sclass *sclass;
308 u32 arg0, arg1;
309 int ret, i, n;
311 if (nouveau_noaccel)
312 return;
314 ret = nouveau_channels_init(drm);
315 if (ret)
316 return;
318 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
319 ret = nvif_user_init(device);
320 if (ret)
321 return;
324 /* initialise synchronisation routines */
325 /*XXX: this is crap, but the fence/channel stuff is a little
326 * backwards in some places. this will be fixed.
328 ret = n = nvif_object_sclass_get(&device->object, &sclass);
329 if (ret < 0)
330 return;
332 for (ret = -ENOSYS, i = 0; i < n; i++) {
333 switch (sclass[i].oclass) {
334 case NV03_CHANNEL_DMA:
335 ret = nv04_fence_create(drm);
336 break;
337 case NV10_CHANNEL_DMA:
338 ret = nv10_fence_create(drm);
339 break;
340 case NV17_CHANNEL_DMA:
341 case NV40_CHANNEL_DMA:
342 ret = nv17_fence_create(drm);
343 break;
344 case NV50_CHANNEL_GPFIFO:
345 ret = nv50_fence_create(drm);
346 break;
347 case G82_CHANNEL_GPFIFO:
348 ret = nv84_fence_create(drm);
349 break;
350 case FERMI_CHANNEL_GPFIFO:
351 case KEPLER_CHANNEL_GPFIFO_A:
352 case KEPLER_CHANNEL_GPFIFO_B:
353 case MAXWELL_CHANNEL_GPFIFO_A:
354 case PASCAL_CHANNEL_GPFIFO_A:
355 case VOLTA_CHANNEL_GPFIFO_A:
356 ret = nvc0_fence_create(drm);
357 break;
358 default:
359 break;
363 nvif_object_sclass_put(&sclass);
364 if (ret) {
365 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
366 nouveau_accel_fini(drm);
367 return;
370 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
371 ret = nouveau_channel_new(drm, &drm->client.device,
372 nvif_fifo_runlist_ce(device), 0,
373 &drm->cechan);
374 if (ret)
375 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
377 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
378 arg1 = 1;
379 } else
380 if (device->info.chipset >= 0xa3 &&
381 device->info.chipset != 0xaa &&
382 device->info.chipset != 0xac) {
383 ret = nouveau_channel_new(drm, &drm->client.device,
384 NvDmaFB, NvDmaTT, &drm->cechan);
385 if (ret)
386 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
388 arg0 = NvDmaFB;
389 arg1 = NvDmaTT;
390 } else {
391 arg0 = NvDmaFB;
392 arg1 = NvDmaTT;
395 ret = nouveau_channel_new(drm, &drm->client.device,
396 arg0, arg1, &drm->channel);
397 if (ret) {
398 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
399 nouveau_accel_fini(drm);
400 return;
403 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
404 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
405 nouveau_abi16_swclass(drm), NULL, 0,
406 &drm->nvsw);
407 if (ret == 0) {
408 ret = RING_SPACE(drm->channel, 2);
409 if (ret == 0) {
410 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
411 OUT_RING (drm->channel, drm->nvsw.handle);
414 ret = nvif_notify_init(&drm->nvsw,
415 nouveau_flip_complete,
416 false, NV04_NVSW_NTFY_UEVENT,
417 NULL, 0, 0, &drm->flip);
418 if (ret == 0)
419 ret = nvif_notify_get(&drm->flip);
420 if (ret) {
421 nouveau_accel_fini(drm);
422 return;
426 if (ret) {
427 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
428 nouveau_accel_fini(drm);
429 return;
433 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
434 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
435 false, NULL, &drm->notify);
436 if (ret) {
437 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
438 nouveau_accel_fini(drm);
439 return;
442 ret = nvif_object_init(&drm->channel->user, NvNotify0,
443 NV_DMA_IN_MEMORY,
444 &(struct nv_dma_v0) {
445 .target = NV_DMA_V0_TARGET_VRAM,
446 .access = NV_DMA_V0_ACCESS_RDWR,
447 .start = drm->notify->addr,
448 .limit = drm->notify->addr + 31
449 }, sizeof(struct nv_dma_v0),
450 &drm->ntfy);
451 if (ret) {
452 nouveau_accel_fini(drm);
453 return;
458 nouveau_bo_move_init(drm);
461 static int nouveau_drm_probe(struct pci_dev *pdev,
462 const struct pci_device_id *pent)
464 struct nvkm_device *device;
465 struct apertures_struct *aper;
466 bool boot = false;
467 int ret;
469 if (vga_switcheroo_client_probe_defer(pdev))
470 return -EPROBE_DEFER;
472 /* We need to check that the chipset is supported before booting
473 * fbdev off the hardware, as there's no way to put it back.
475 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
476 if (ret)
477 return ret;
479 nvkm_device_del(&device);
481 /* Remove conflicting drivers (vesafb, efifb etc). */
482 aper = alloc_apertures(3);
483 if (!aper)
484 return -ENOMEM;
486 aper->ranges[0].base = pci_resource_start(pdev, 1);
487 aper->ranges[0].size = pci_resource_len(pdev, 1);
488 aper->count = 1;
490 if (pci_resource_len(pdev, 2)) {
491 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
492 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
493 aper->count++;
496 if (pci_resource_len(pdev, 3)) {
497 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
498 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
499 aper->count++;
502 #ifdef CONFIG_X86
503 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
504 #endif
505 if (nouveau_modeset != 2)
506 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
507 kfree(aper);
509 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
510 true, true, ~0ULL, &device);
511 if (ret)
512 return ret;
514 pci_set_master(pdev);
516 if (nouveau_atomic)
517 driver_pci.driver_features |= DRIVER_ATOMIC;
519 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
520 if (ret) {
521 nvkm_device_del(&device);
522 return ret;
525 return 0;
528 static int
529 nouveau_drm_load(struct drm_device *dev, unsigned long flags)
531 struct nouveau_drm *drm;
532 int ret;
534 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
535 return -ENOMEM;
536 dev->dev_private = drm;
537 drm->dev = dev;
539 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
540 if (ret)
541 return ret;
543 ret = nouveau_cli_init(drm, "DRM", &drm->client);
544 if (ret)
545 return ret;
547 dev->irq_enabled = true;
549 nvxx_client(&drm->client.base)->debug =
550 nvkm_dbgopt(nouveau_debug, "DRM");
552 INIT_LIST_HEAD(&drm->clients);
553 spin_lock_init(&drm->tile.lock);
555 /* workaround an odd issue on nvc1 by disabling the device's
556 * nosnoop capability. hopefully won't cause issues until a
557 * better fix is found - assuming there is one...
559 if (drm->client.device.info.chipset == 0xc1)
560 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
562 nouveau_vga_init(drm);
564 ret = nouveau_ttm_init(drm);
565 if (ret)
566 goto fail_ttm;
568 ret = nouveau_bios_init(dev);
569 if (ret)
570 goto fail_bios;
572 ret = nouveau_display_create(dev);
573 if (ret)
574 goto fail_dispctor;
576 if (dev->mode_config.num_crtc) {
577 ret = nouveau_display_init(dev);
578 if (ret)
579 goto fail_dispinit;
582 nouveau_debugfs_init(drm);
583 nouveau_hwmon_init(dev);
584 nouveau_accel_init(drm);
585 nouveau_fbcon_init(dev);
586 nouveau_led_init(dev);
588 if (nouveau_pmops_runtime()) {
589 pm_runtime_use_autosuspend(dev->dev);
590 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
591 pm_runtime_set_active(dev->dev);
592 pm_runtime_allow(dev->dev);
593 pm_runtime_mark_last_busy(dev->dev);
594 pm_runtime_put(dev->dev);
597 return 0;
599 fail_dispinit:
600 nouveau_display_destroy(dev);
601 fail_dispctor:
602 nouveau_bios_takedown(dev);
603 fail_bios:
604 nouveau_ttm_fini(drm);
605 fail_ttm:
606 nouveau_vga_fini(drm);
607 nouveau_cli_fini(&drm->client);
608 nouveau_cli_fini(&drm->master);
609 kfree(drm);
610 return ret;
613 static void
614 nouveau_drm_unload(struct drm_device *dev)
616 struct nouveau_drm *drm = nouveau_drm(dev);
618 if (nouveau_pmops_runtime()) {
619 pm_runtime_get_sync(dev->dev);
620 pm_runtime_forbid(dev->dev);
623 nouveau_led_fini(dev);
624 nouveau_fbcon_fini(dev);
625 nouveau_accel_fini(drm);
626 nouveau_hwmon_fini(dev);
627 nouveau_debugfs_fini(drm);
629 if (dev->mode_config.num_crtc)
630 nouveau_display_fini(dev, false, false);
631 nouveau_display_destroy(dev);
633 nouveau_bios_takedown(dev);
635 nouveau_ttm_fini(drm);
636 nouveau_vga_fini(drm);
638 nouveau_cli_fini(&drm->client);
639 nouveau_cli_fini(&drm->master);
640 kfree(drm);
643 void
644 nouveau_drm_device_remove(struct drm_device *dev)
646 struct nouveau_drm *drm = nouveau_drm(dev);
647 struct nvkm_client *client;
648 struct nvkm_device *device;
650 dev->irq_enabled = false;
651 client = nvxx_client(&drm->client.base);
652 device = nvkm_device_find(client->device);
653 drm_put_dev(dev);
655 nvkm_device_del(&device);
658 static void
659 nouveau_drm_remove(struct pci_dev *pdev)
661 struct drm_device *dev = pci_get_drvdata(pdev);
663 nouveau_drm_device_remove(dev);
666 static int
667 nouveau_do_suspend(struct drm_device *dev, bool runtime)
669 struct nouveau_drm *drm = nouveau_drm(dev);
670 int ret;
672 nouveau_led_suspend(dev);
674 if (dev->mode_config.num_crtc) {
675 NV_DEBUG(drm, "suspending console...\n");
676 nouveau_fbcon_set_suspend(dev, 1);
677 NV_DEBUG(drm, "suspending display...\n");
678 ret = nouveau_display_suspend(dev, runtime);
679 if (ret)
680 return ret;
683 NV_DEBUG(drm, "evicting buffers...\n");
684 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
686 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
687 if (drm->cechan) {
688 ret = nouveau_channel_idle(drm->cechan);
689 if (ret)
690 goto fail_display;
693 if (drm->channel) {
694 ret = nouveau_channel_idle(drm->channel);
695 if (ret)
696 goto fail_display;
699 NV_DEBUG(drm, "suspending fence...\n");
700 if (drm->fence && nouveau_fence(drm)->suspend) {
701 if (!nouveau_fence(drm)->suspend(drm)) {
702 ret = -ENOMEM;
703 goto fail_display;
707 NV_DEBUG(drm, "suspending object tree...\n");
708 ret = nvif_client_suspend(&drm->master.base);
709 if (ret)
710 goto fail_client;
712 return 0;
714 fail_client:
715 if (drm->fence && nouveau_fence(drm)->resume)
716 nouveau_fence(drm)->resume(drm);
718 fail_display:
719 if (dev->mode_config.num_crtc) {
720 NV_DEBUG(drm, "resuming display...\n");
721 nouveau_display_resume(dev, runtime);
723 return ret;
726 static int
727 nouveau_do_resume(struct drm_device *dev, bool runtime)
729 struct nouveau_drm *drm = nouveau_drm(dev);
731 NV_DEBUG(drm, "resuming object tree...\n");
732 nvif_client_resume(&drm->master.base);
734 NV_DEBUG(drm, "resuming fence...\n");
735 if (drm->fence && nouveau_fence(drm)->resume)
736 nouveau_fence(drm)->resume(drm);
738 nouveau_run_vbios_init(dev);
740 if (dev->mode_config.num_crtc) {
741 NV_DEBUG(drm, "resuming display...\n");
742 nouveau_display_resume(dev, runtime);
743 NV_DEBUG(drm, "resuming console...\n");
744 nouveau_fbcon_set_suspend(dev, 0);
747 nouveau_led_resume(dev);
749 return 0;
753 nouveau_pmops_suspend(struct device *dev)
755 struct pci_dev *pdev = to_pci_dev(dev);
756 struct drm_device *drm_dev = pci_get_drvdata(pdev);
757 int ret;
759 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
760 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
761 return 0;
763 ret = nouveau_do_suspend(drm_dev, false);
764 if (ret)
765 return ret;
767 pci_save_state(pdev);
768 pci_disable_device(pdev);
769 pci_set_power_state(pdev, PCI_D3hot);
770 udelay(200);
771 return 0;
775 nouveau_pmops_resume(struct device *dev)
777 struct pci_dev *pdev = to_pci_dev(dev);
778 struct drm_device *drm_dev = pci_get_drvdata(pdev);
779 int ret;
781 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
782 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
783 return 0;
785 pci_set_power_state(pdev, PCI_D0);
786 pci_restore_state(pdev);
787 ret = pci_enable_device(pdev);
788 if (ret)
789 return ret;
790 pci_set_master(pdev);
792 ret = nouveau_do_resume(drm_dev, false);
794 /* Monitors may have been connected / disconnected during suspend */
795 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
797 return ret;
800 static int
801 nouveau_pmops_freeze(struct device *dev)
803 struct pci_dev *pdev = to_pci_dev(dev);
804 struct drm_device *drm_dev = pci_get_drvdata(pdev);
805 return nouveau_do_suspend(drm_dev, false);
808 static int
809 nouveau_pmops_thaw(struct device *dev)
811 struct pci_dev *pdev = to_pci_dev(dev);
812 struct drm_device *drm_dev = pci_get_drvdata(pdev);
813 return nouveau_do_resume(drm_dev, false);
816 bool
817 nouveau_pmops_runtime(void)
819 if (nouveau_runtime_pm == -1)
820 return nouveau_is_optimus() || nouveau_is_v1_dsm();
821 return nouveau_runtime_pm == 1;
824 static int
825 nouveau_pmops_runtime_suspend(struct device *dev)
827 struct pci_dev *pdev = to_pci_dev(dev);
828 struct drm_device *drm_dev = pci_get_drvdata(pdev);
829 int ret;
831 if (!nouveau_pmops_runtime()) {
832 pm_runtime_forbid(dev);
833 return -EBUSY;
836 nouveau_switcheroo_optimus_dsm();
837 ret = nouveau_do_suspend(drm_dev, true);
838 pci_save_state(pdev);
839 pci_disable_device(pdev);
840 pci_ignore_hotplug(pdev);
841 pci_set_power_state(pdev, PCI_D3cold);
842 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
843 return ret;
846 static int
847 nouveau_pmops_runtime_resume(struct device *dev)
849 struct pci_dev *pdev = to_pci_dev(dev);
850 struct drm_device *drm_dev = pci_get_drvdata(pdev);
851 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
852 int ret;
854 if (!nouveau_pmops_runtime()) {
855 pm_runtime_forbid(dev);
856 return -EBUSY;
859 pci_set_power_state(pdev, PCI_D0);
860 pci_restore_state(pdev);
861 ret = pci_enable_device(pdev);
862 if (ret)
863 return ret;
864 pci_set_master(pdev);
866 ret = nouveau_do_resume(drm_dev, true);
868 /* do magic */
869 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
870 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
872 /* Monitors may have been connected / disconnected during suspend */
873 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
875 return ret;
878 static int
879 nouveau_pmops_runtime_idle(struct device *dev)
881 if (!nouveau_pmops_runtime()) {
882 pm_runtime_forbid(dev);
883 return -EBUSY;
886 pm_runtime_mark_last_busy(dev);
887 pm_runtime_autosuspend(dev);
888 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
889 return 1;
892 static int
893 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
895 struct nouveau_drm *drm = nouveau_drm(dev);
896 struct nouveau_cli *cli;
897 char name[32], tmpname[TASK_COMM_LEN];
898 int ret;
900 /* need to bring up power immediately if opening device */
901 ret = pm_runtime_get_sync(dev->dev);
902 if (ret < 0 && ret != -EACCES)
903 return ret;
905 get_task_comm(tmpname, current);
906 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
908 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
909 ret = -ENOMEM;
910 goto done;
913 ret = nouveau_cli_init(drm, name, cli);
914 if (ret)
915 goto done;
917 cli->base.super = false;
919 fpriv->driver_priv = cli;
921 mutex_lock(&drm->client.mutex);
922 list_add(&cli->head, &drm->clients);
923 mutex_unlock(&drm->client.mutex);
925 done:
926 if (ret && cli) {
927 nouveau_cli_fini(cli);
928 kfree(cli);
931 pm_runtime_mark_last_busy(dev->dev);
932 pm_runtime_put_autosuspend(dev->dev);
933 return ret;
936 static void
937 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
939 struct nouveau_cli *cli = nouveau_cli(fpriv);
940 struct nouveau_drm *drm = nouveau_drm(dev);
942 pm_runtime_get_sync(dev->dev);
944 mutex_lock(&cli->mutex);
945 if (cli->abi16)
946 nouveau_abi16_fini(cli->abi16);
947 mutex_unlock(&cli->mutex);
949 mutex_lock(&drm->client.mutex);
950 list_del(&cli->head);
951 mutex_unlock(&drm->client.mutex);
953 nouveau_cli_fini(cli);
954 kfree(cli);
955 pm_runtime_mark_last_busy(dev->dev);
956 pm_runtime_put_autosuspend(dev->dev);
959 static const struct drm_ioctl_desc
960 nouveau_ioctls[] = {
961 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
962 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
963 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
964 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
965 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
966 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
967 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
968 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
969 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
970 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
971 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
972 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
975 long
976 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
978 struct drm_file *filp = file->private_data;
979 struct drm_device *dev = filp->minor->dev;
980 long ret;
982 ret = pm_runtime_get_sync(dev->dev);
983 if (ret < 0 && ret != -EACCES)
984 return ret;
986 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
987 case DRM_NOUVEAU_NVIF:
988 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
989 break;
990 default:
991 ret = drm_ioctl(file, cmd, arg);
992 break;
995 pm_runtime_mark_last_busy(dev->dev);
996 pm_runtime_put_autosuspend(dev->dev);
997 return ret;
1000 static const struct file_operations
1001 nouveau_driver_fops = {
1002 .owner = THIS_MODULE,
1003 .open = drm_open,
1004 .release = drm_release,
1005 .unlocked_ioctl = nouveau_drm_ioctl,
1006 .mmap = nouveau_ttm_mmap,
1007 .poll = drm_poll,
1008 .read = drm_read,
1009 #if defined(CONFIG_COMPAT)
1010 .compat_ioctl = nouveau_compat_ioctl,
1011 #endif
1012 .llseek = noop_llseek,
1015 static struct drm_driver
1016 driver_stub = {
1017 .driver_features =
1018 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1019 DRIVER_KMS_LEGACY_CONTEXT,
1021 .load = nouveau_drm_load,
1022 .unload = nouveau_drm_unload,
1023 .open = nouveau_drm_open,
1024 .postclose = nouveau_drm_postclose,
1025 .lastclose = nouveau_vga_lastclose,
1027 #if defined(CONFIG_DEBUG_FS)
1028 .debugfs_init = nouveau_drm_debugfs_init,
1029 #endif
1031 .enable_vblank = nouveau_display_vblank_enable,
1032 .disable_vblank = nouveau_display_vblank_disable,
1033 .get_scanout_position = nouveau_display_scanoutpos,
1034 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
1036 .ioctls = nouveau_ioctls,
1037 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1038 .fops = &nouveau_driver_fops,
1040 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1041 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1042 .gem_prime_export = drm_gem_prime_export,
1043 .gem_prime_import = drm_gem_prime_import,
1044 .gem_prime_pin = nouveau_gem_prime_pin,
1045 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1046 .gem_prime_unpin = nouveau_gem_prime_unpin,
1047 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1048 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1049 .gem_prime_vmap = nouveau_gem_prime_vmap,
1050 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
1052 .gem_free_object_unlocked = nouveau_gem_object_del,
1053 .gem_open_object = nouveau_gem_object_open,
1054 .gem_close_object = nouveau_gem_object_close,
1056 .dumb_create = nouveau_display_dumb_create,
1057 .dumb_map_offset = nouveau_display_dumb_map_offset,
1059 .name = DRIVER_NAME,
1060 .desc = DRIVER_DESC,
1061 #ifdef GIT_REVISION
1062 .date = GIT_REVISION,
1063 #else
1064 .date = DRIVER_DATE,
1065 #endif
1066 .major = DRIVER_MAJOR,
1067 .minor = DRIVER_MINOR,
1068 .patchlevel = DRIVER_PATCHLEVEL,
1071 static struct pci_device_id
1072 nouveau_drm_pci_table[] = {
1074 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1075 .class = PCI_BASE_CLASS_DISPLAY << 16,
1076 .class_mask = 0xff << 16,
1079 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1080 .class = PCI_BASE_CLASS_DISPLAY << 16,
1081 .class_mask = 0xff << 16,
1086 static void nouveau_display_options(void)
1088 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1090 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1091 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1092 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1093 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1094 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1095 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1096 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1097 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1098 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1099 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1100 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1103 static const struct dev_pm_ops nouveau_pm_ops = {
1104 .suspend = nouveau_pmops_suspend,
1105 .resume = nouveau_pmops_resume,
1106 .freeze = nouveau_pmops_freeze,
1107 .thaw = nouveau_pmops_thaw,
1108 .poweroff = nouveau_pmops_freeze,
1109 .restore = nouveau_pmops_resume,
1110 .runtime_suspend = nouveau_pmops_runtime_suspend,
1111 .runtime_resume = nouveau_pmops_runtime_resume,
1112 .runtime_idle = nouveau_pmops_runtime_idle,
1115 static struct pci_driver
1116 nouveau_drm_pci_driver = {
1117 .name = "nouveau",
1118 .id_table = nouveau_drm_pci_table,
1119 .probe = nouveau_drm_probe,
1120 .remove = nouveau_drm_remove,
1121 .driver.pm = &nouveau_pm_ops,
1124 struct drm_device *
1125 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1126 struct platform_device *pdev,
1127 struct nvkm_device **pdevice)
1129 struct drm_device *drm;
1130 int err;
1132 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1133 true, true, ~0ULL, pdevice);
1134 if (err)
1135 goto err_free;
1137 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1138 if (IS_ERR(drm)) {
1139 err = PTR_ERR(drm);
1140 goto err_free;
1143 platform_set_drvdata(pdev, drm);
1145 return drm;
1147 err_free:
1148 nvkm_device_del(pdevice);
1150 return ERR_PTR(err);
1153 static int __init
1154 nouveau_drm_init(void)
1156 driver_pci = driver_stub;
1157 driver_platform = driver_stub;
1159 nouveau_display_options();
1161 if (nouveau_modeset == -1) {
1162 if (vgacon_text_force())
1163 nouveau_modeset = 0;
1166 if (!nouveau_modeset)
1167 return 0;
1169 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1170 platform_driver_register(&nouveau_platform_driver);
1171 #endif
1173 nouveau_register_dsm_handler();
1174 nouveau_backlight_ctor();
1176 #ifdef CONFIG_PCI
1177 return pci_register_driver(&nouveau_drm_pci_driver);
1178 #else
1179 return 0;
1180 #endif
1183 static void __exit
1184 nouveau_drm_exit(void)
1186 if (!nouveau_modeset)
1187 return;
1189 #ifdef CONFIG_PCI
1190 pci_unregister_driver(&nouveau_drm_pci_driver);
1191 #endif
1192 nouveau_backlight_dtor();
1193 nouveau_unregister_dsm_handler();
1195 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1196 platform_driver_unregister(&nouveau_platform_driver);
1197 #endif
1200 module_init(nouveau_drm_init);
1201 module_exit(nouveau_drm_exit);
1203 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1204 MODULE_AUTHOR(DRIVER_AUTHOR);
1205 MODULE_DESCRIPTION(DRIVER_DESC);
1206 MODULE_LICENSE("GPL and additional rights");