drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nouveau_platform.c
blob039e23548e08f4074c915160a7a43d89298367ec
1 /*
2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
22 #include "nouveau_platform.h"
24 static int nouveau_platform_probe(struct platform_device *pdev)
26 const struct nvkm_device_tegra_func *func;
27 struct nvkm_device *device = NULL;
28 struct drm_device *drm;
29 int ret;
31 func = of_device_get_match_data(&pdev->dev);
33 drm = nouveau_platform_device_create(func, pdev, &device);
34 if (IS_ERR(drm))
35 return PTR_ERR(drm);
37 ret = drm_dev_register(drm, 0);
38 if (ret < 0) {
39 drm_dev_put(drm);
40 return ret;
43 return 0;
46 static int nouveau_platform_remove(struct platform_device *pdev)
48 struct drm_device *dev = platform_get_drvdata(pdev);
49 nouveau_drm_device_remove(dev);
50 return 0;
53 #if IS_ENABLED(CONFIG_OF)
54 static const struct nvkm_device_tegra_func gk20a_platform_data = {
55 .iommu_bit = 34,
56 .require_vdd = true,
59 static const struct nvkm_device_tegra_func gm20b_platform_data = {
60 .iommu_bit = 34,
61 .require_vdd = true,
62 .require_ref_clk = true,
65 static const struct nvkm_device_tegra_func gp10b_platform_data = {
66 .iommu_bit = 36,
67 /* power provided by generic PM domains */
68 .require_vdd = false,
71 static const struct of_device_id nouveau_platform_match[] = {
73 .compatible = "nvidia,gk20a",
74 .data = &gk20a_platform_data,
77 .compatible = "nvidia,gm20b",
78 .data = &gm20b_platform_data,
81 .compatible = "nvidia,gp10b",
82 .data = &gp10b_platform_data,
84 { }
87 MODULE_DEVICE_TABLE(of, nouveau_platform_match);
88 #endif
90 struct platform_driver nouveau_platform_driver = {
91 .driver = {
92 .name = "nouveau",
93 .of_match_table = of_match_ptr(nouveau_platform_match),
95 .probe = nouveau_platform_probe,
96 .remove = nouveau_platform_remove,
99 #if IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) || IS_ENABLED(CONFIG_ARCH_TEGRA_132_SOC)
100 MODULE_FIRMWARE("nvidia/gk20a/fecs_data.bin");
101 MODULE_FIRMWARE("nvidia/gk20a/fecs_inst.bin");
102 MODULE_FIRMWARE("nvidia/gk20a/gpccs_data.bin");
103 MODULE_FIRMWARE("nvidia/gk20a/gpccs_inst.bin");
104 MODULE_FIRMWARE("nvidia/gk20a/sw_bundle_init.bin");
105 MODULE_FIRMWARE("nvidia/gk20a/sw_ctx.bin");
106 MODULE_FIRMWARE("nvidia/gk20a/sw_method_init.bin");
107 MODULE_FIRMWARE("nvidia/gk20a/sw_nonctx.bin");
108 #endif