2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
21 #define DRIVER_NAME "tegra"
22 #define DRIVER_DESC "NVIDIA Tegra graphics"
23 #define DRIVER_DATE "20120330"
24 #define DRIVER_MAJOR 0
25 #define DRIVER_MINOR 0
26 #define DRIVER_PATCHLEVEL 0
28 #define CARVEOUT_SZ SZ_64M
29 #define CDMA_GATHER_FETCHES_MAX_NB 16383
31 struct tegra_drm_file
{
36 static int tegra_atomic_check(struct drm_device
*drm
,
37 struct drm_atomic_state
*state
)
41 err
= drm_atomic_helper_check(drm
, state
);
45 return tegra_display_hub_atomic_check(drm
, state
);
48 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs
= {
49 .fb_create
= tegra_fb_create
,
50 #ifdef CONFIG_DRM_FBDEV_EMULATION
51 .output_poll_changed
= drm_fb_helper_output_poll_changed
,
53 .atomic_check
= tegra_atomic_check
,
54 .atomic_commit
= drm_atomic_helper_commit
,
57 static void tegra_atomic_commit_tail(struct drm_atomic_state
*old_state
)
59 struct drm_device
*drm
= old_state
->dev
;
60 struct tegra_drm
*tegra
= drm
->dev_private
;
63 drm_atomic_helper_commit_modeset_disables(drm
, old_state
);
64 tegra_display_hub_atomic_commit(drm
, old_state
);
65 drm_atomic_helper_commit_planes(drm
, old_state
, 0);
66 drm_atomic_helper_commit_modeset_enables(drm
, old_state
);
67 drm_atomic_helper_commit_hw_done(old_state
);
68 drm_atomic_helper_wait_for_vblanks(drm
, old_state
);
69 drm_atomic_helper_cleanup_planes(drm
, old_state
);
71 drm_atomic_helper_commit_tail_rpm(old_state
);
75 static const struct drm_mode_config_helper_funcs
76 tegra_drm_mode_config_helpers
= {
77 .atomic_commit_tail
= tegra_atomic_commit_tail
,
80 static int tegra_drm_load(struct drm_device
*drm
, unsigned long flags
)
82 struct host1x_device
*device
= to_host1x_device(drm
->dev
);
83 struct tegra_drm
*tegra
;
86 tegra
= kzalloc(sizeof(*tegra
), GFP_KERNEL
);
90 if (iommu_present(&platform_bus_type
)) {
91 u64 carveout_start
, carveout_end
, gem_start
, gem_end
;
92 struct iommu_domain_geometry
*geometry
;
95 tegra
->domain
= iommu_domain_alloc(&platform_bus_type
);
101 err
= iova_cache_get();
105 geometry
= &tegra
->domain
->geometry
;
106 gem_start
= geometry
->aperture_start
;
107 gem_end
= geometry
->aperture_end
- CARVEOUT_SZ
;
108 carveout_start
= gem_end
+ 1;
109 carveout_end
= geometry
->aperture_end
;
111 order
= __ffs(tegra
->domain
->pgsize_bitmap
);
112 init_iova_domain(&tegra
->carveout
.domain
, 1UL << order
,
113 carveout_start
>> order
);
115 tegra
->carveout
.shift
= iova_shift(&tegra
->carveout
.domain
);
116 tegra
->carveout
.limit
= carveout_end
>> tegra
->carveout
.shift
;
118 drm_mm_init(&tegra
->mm
, gem_start
, gem_end
- gem_start
+ 1);
119 mutex_init(&tegra
->mm_lock
);
121 DRM_DEBUG("IOMMU apertures:\n");
122 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start
, gem_end
);
123 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start
,
127 mutex_init(&tegra
->clients_lock
);
128 INIT_LIST_HEAD(&tegra
->clients
);
130 drm
->dev_private
= tegra
;
133 drm_mode_config_init(drm
);
135 drm
->mode_config
.min_width
= 0;
136 drm
->mode_config
.min_height
= 0;
138 drm
->mode_config
.max_width
= 4096;
139 drm
->mode_config
.max_height
= 4096;
141 drm
->mode_config
.allow_fb_modifiers
= true;
143 drm
->mode_config
.normalize_zpos
= true;
145 drm
->mode_config
.funcs
= &tegra_drm_mode_config_funcs
;
146 drm
->mode_config
.helper_private
= &tegra_drm_mode_config_helpers
;
148 err
= tegra_drm_fb_prepare(drm
);
152 drm_kms_helper_poll_init(drm
);
154 err
= host1x_device_init(device
);
159 err
= tegra_display_hub_prepare(tegra
->hub
);
165 * We don't use the drm_irq_install() helpers provided by the DRM
166 * core, so we need to set this manually in order to allow the
167 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
169 drm
->irq_enabled
= true;
171 /* syncpoints are used for full 32-bit hardware VBLANK counters */
172 drm
->max_vblank_count
= 0xffffffff;
174 err
= drm_vblank_init(drm
, drm
->mode_config
.num_crtc
);
178 drm_mode_config_reset(drm
);
180 err
= tegra_drm_fb_init(drm
);
188 tegra_display_hub_cleanup(tegra
->hub
);
190 host1x_device_exit(device
);
192 drm_kms_helper_poll_fini(drm
);
193 tegra_drm_fb_free(drm
);
195 drm_mode_config_cleanup(drm
);
198 mutex_destroy(&tegra
->mm_lock
);
199 drm_mm_takedown(&tegra
->mm
);
200 put_iova_domain(&tegra
->carveout
.domain
);
205 iommu_domain_free(tegra
->domain
);
211 static void tegra_drm_unload(struct drm_device
*drm
)
213 struct host1x_device
*device
= to_host1x_device(drm
->dev
);
214 struct tegra_drm
*tegra
= drm
->dev_private
;
217 drm_kms_helper_poll_fini(drm
);
218 tegra_drm_fb_exit(drm
);
219 drm_atomic_helper_shutdown(drm
);
220 drm_mode_config_cleanup(drm
);
222 err
= host1x_device_exit(device
);
227 mutex_destroy(&tegra
->mm_lock
);
228 drm_mm_takedown(&tegra
->mm
);
229 put_iova_domain(&tegra
->carveout
.domain
);
231 iommu_domain_free(tegra
->domain
);
237 static int tegra_drm_open(struct drm_device
*drm
, struct drm_file
*filp
)
239 struct tegra_drm_file
*fpriv
;
241 fpriv
= kzalloc(sizeof(*fpriv
), GFP_KERNEL
);
245 idr_init(&fpriv
->contexts
);
246 mutex_init(&fpriv
->lock
);
247 filp
->driver_priv
= fpriv
;
252 static void tegra_drm_context_free(struct tegra_drm_context
*context
)
254 context
->client
->ops
->close_channel(context
);
258 static struct host1x_bo
*
259 host1x_bo_lookup(struct drm_file
*file
, u32 handle
)
261 struct drm_gem_object
*gem
;
264 gem
= drm_gem_object_lookup(file
, handle
);
268 bo
= to_tegra_bo(gem
);
272 static int host1x_reloc_copy_from_user(struct host1x_reloc
*dest
,
273 struct drm_tegra_reloc __user
*src
,
274 struct drm_device
*drm
,
275 struct drm_file
*file
)
280 err
= get_user(cmdbuf
, &src
->cmdbuf
.handle
);
284 err
= get_user(dest
->cmdbuf
.offset
, &src
->cmdbuf
.offset
);
288 err
= get_user(target
, &src
->target
.handle
);
292 err
= get_user(dest
->target
.offset
, &src
->target
.offset
);
296 err
= get_user(dest
->shift
, &src
->shift
);
300 dest
->cmdbuf
.bo
= host1x_bo_lookup(file
, cmdbuf
);
301 if (!dest
->cmdbuf
.bo
)
304 dest
->target
.bo
= host1x_bo_lookup(file
, target
);
305 if (!dest
->target
.bo
)
311 int tegra_drm_submit(struct tegra_drm_context
*context
,
312 struct drm_tegra_submit
*args
, struct drm_device
*drm
,
313 struct drm_file
*file
)
315 struct host1x_client
*client
= &context
->client
->base
;
316 unsigned int num_cmdbufs
= args
->num_cmdbufs
;
317 unsigned int num_relocs
= args
->num_relocs
;
318 struct drm_tegra_cmdbuf __user
*user_cmdbufs
;
319 struct drm_tegra_reloc __user
*user_relocs
;
320 struct drm_tegra_syncpt __user
*user_syncpt
;
321 struct drm_tegra_syncpt syncpt
;
322 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
323 struct drm_gem_object
**refs
;
324 struct host1x_syncpt
*sp
;
325 struct host1x_job
*job
;
326 unsigned int num_refs
;
329 user_cmdbufs
= u64_to_user_ptr(args
->cmdbufs
);
330 user_relocs
= u64_to_user_ptr(args
->relocs
);
331 user_syncpt
= u64_to_user_ptr(args
->syncpts
);
333 /* We don't yet support other than one syncpt_incr struct per submit */
334 if (args
->num_syncpts
!= 1)
337 /* We don't yet support waitchks */
338 if (args
->num_waitchks
!= 0)
341 job
= host1x_job_alloc(context
->channel
, args
->num_cmdbufs
,
346 job
->num_relocs
= args
->num_relocs
;
347 job
->client
= client
;
348 job
->class = client
->class;
349 job
->serialize
= true;
352 * Track referenced BOs so that they can be unreferenced after the
353 * submission is complete.
355 num_refs
= num_cmdbufs
+ num_relocs
* 2;
357 refs
= kmalloc_array(num_refs
, sizeof(*refs
), GFP_KERNEL
);
363 /* reuse as an iterator later */
366 while (num_cmdbufs
) {
367 struct drm_tegra_cmdbuf cmdbuf
;
368 struct host1x_bo
*bo
;
369 struct tegra_bo
*obj
;
372 if (copy_from_user(&cmdbuf
, user_cmdbufs
, sizeof(cmdbuf
))) {
378 * The maximum number of CDMA gather fetches is 16383, a higher
379 * value means the words count is malformed.
381 if (cmdbuf
.words
> CDMA_GATHER_FETCHES_MAX_NB
) {
386 bo
= host1x_bo_lookup(file
, cmdbuf
.handle
);
392 offset
= (u64
)cmdbuf
.offset
+ (u64
)cmdbuf
.words
* sizeof(u32
);
393 obj
= host1x_to_tegra_bo(bo
);
394 refs
[num_refs
++] = &obj
->gem
;
397 * Gather buffer base address must be 4-bytes aligned,
398 * unaligned offset is malformed and cause commands stream
399 * corruption on the buffer address relocation.
401 if (offset
& 3 || offset
> obj
->gem
.size
) {
406 host1x_job_add_gather(job
, bo
, cmdbuf
.words
, cmdbuf
.offset
);
411 /* copy and resolve relocations from submit */
412 while (num_relocs
--) {
413 struct host1x_reloc
*reloc
;
414 struct tegra_bo
*obj
;
416 err
= host1x_reloc_copy_from_user(&job
->relocs
[num_relocs
],
417 &user_relocs
[num_relocs
], drm
,
422 reloc
= &job
->relocs
[num_relocs
];
423 obj
= host1x_to_tegra_bo(reloc
->cmdbuf
.bo
);
424 refs
[num_refs
++] = &obj
->gem
;
427 * The unaligned cmdbuf offset will cause an unaligned write
428 * during of the relocations patching, corrupting the commands
431 if (reloc
->cmdbuf
.offset
& 3 ||
432 reloc
->cmdbuf
.offset
>= obj
->gem
.size
) {
437 obj
= host1x_to_tegra_bo(reloc
->target
.bo
);
438 refs
[num_refs
++] = &obj
->gem
;
440 if (reloc
->target
.offset
>= obj
->gem
.size
) {
446 if (copy_from_user(&syncpt
, user_syncpt
, sizeof(syncpt
))) {
451 /* check whether syncpoint ID is valid */
452 sp
= host1x_syncpt_get(host1x
, syncpt
.id
);
458 job
->is_addr_reg
= context
->client
->ops
->is_addr_reg
;
459 job
->is_valid_class
= context
->client
->ops
->is_valid_class
;
460 job
->syncpt_incrs
= syncpt
.incrs
;
461 job
->syncpt_id
= syncpt
.id
;
462 job
->timeout
= 10000;
464 if (args
->timeout
&& args
->timeout
< 10000)
465 job
->timeout
= args
->timeout
;
467 err
= host1x_job_pin(job
, context
->client
->base
.dev
);
471 err
= host1x_job_submit(job
);
473 host1x_job_unpin(job
);
477 args
->fence
= job
->syncpt_end
;
481 drm_gem_object_put_unlocked(refs
[num_refs
]);
491 #ifdef CONFIG_DRM_TEGRA_STAGING
492 static int tegra_gem_create(struct drm_device
*drm
, void *data
,
493 struct drm_file
*file
)
495 struct drm_tegra_gem_create
*args
= data
;
498 bo
= tegra_bo_create_with_handle(file
, drm
, args
->size
, args
->flags
,
506 static int tegra_gem_mmap(struct drm_device
*drm
, void *data
,
507 struct drm_file
*file
)
509 struct drm_tegra_gem_mmap
*args
= data
;
510 struct drm_gem_object
*gem
;
513 gem
= drm_gem_object_lookup(file
, args
->handle
);
517 bo
= to_tegra_bo(gem
);
519 args
->offset
= drm_vma_node_offset_addr(&bo
->gem
.vma_node
);
521 drm_gem_object_put_unlocked(gem
);
526 static int tegra_syncpt_read(struct drm_device
*drm
, void *data
,
527 struct drm_file
*file
)
529 struct host1x
*host
= dev_get_drvdata(drm
->dev
->parent
);
530 struct drm_tegra_syncpt_read
*args
= data
;
531 struct host1x_syncpt
*sp
;
533 sp
= host1x_syncpt_get(host
, args
->id
);
537 args
->value
= host1x_syncpt_read_min(sp
);
541 static int tegra_syncpt_incr(struct drm_device
*drm
, void *data
,
542 struct drm_file
*file
)
544 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
545 struct drm_tegra_syncpt_incr
*args
= data
;
546 struct host1x_syncpt
*sp
;
548 sp
= host1x_syncpt_get(host1x
, args
->id
);
552 return host1x_syncpt_incr(sp
);
555 static int tegra_syncpt_wait(struct drm_device
*drm
, void *data
,
556 struct drm_file
*file
)
558 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
559 struct drm_tegra_syncpt_wait
*args
= data
;
560 struct host1x_syncpt
*sp
;
562 sp
= host1x_syncpt_get(host1x
, args
->id
);
566 return host1x_syncpt_wait(sp
, args
->thresh
,
567 msecs_to_jiffies(args
->timeout
),
571 static int tegra_client_open(struct tegra_drm_file
*fpriv
,
572 struct tegra_drm_client
*client
,
573 struct tegra_drm_context
*context
)
577 err
= client
->ops
->open_channel(client
, context
);
581 err
= idr_alloc(&fpriv
->contexts
, context
, 1, 0, GFP_KERNEL
);
583 client
->ops
->close_channel(context
);
587 context
->client
= client
;
593 static int tegra_open_channel(struct drm_device
*drm
, void *data
,
594 struct drm_file
*file
)
596 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
597 struct tegra_drm
*tegra
= drm
->dev_private
;
598 struct drm_tegra_open_channel
*args
= data
;
599 struct tegra_drm_context
*context
;
600 struct tegra_drm_client
*client
;
603 context
= kzalloc(sizeof(*context
), GFP_KERNEL
);
607 mutex_lock(&fpriv
->lock
);
609 list_for_each_entry(client
, &tegra
->clients
, list
)
610 if (client
->base
.class == args
->client
) {
611 err
= tegra_client_open(fpriv
, client
, context
);
615 args
->context
= context
->id
;
622 mutex_unlock(&fpriv
->lock
);
626 static int tegra_close_channel(struct drm_device
*drm
, void *data
,
627 struct drm_file
*file
)
629 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
630 struct drm_tegra_close_channel
*args
= data
;
631 struct tegra_drm_context
*context
;
634 mutex_lock(&fpriv
->lock
);
636 context
= idr_find(&fpriv
->contexts
, args
->context
);
642 idr_remove(&fpriv
->contexts
, context
->id
);
643 tegra_drm_context_free(context
);
646 mutex_unlock(&fpriv
->lock
);
650 static int tegra_get_syncpt(struct drm_device
*drm
, void *data
,
651 struct drm_file
*file
)
653 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
654 struct drm_tegra_get_syncpt
*args
= data
;
655 struct tegra_drm_context
*context
;
656 struct host1x_syncpt
*syncpt
;
659 mutex_lock(&fpriv
->lock
);
661 context
= idr_find(&fpriv
->contexts
, args
->context
);
667 if (args
->index
>= context
->client
->base
.num_syncpts
) {
672 syncpt
= context
->client
->base
.syncpts
[args
->index
];
673 args
->id
= host1x_syncpt_id(syncpt
);
676 mutex_unlock(&fpriv
->lock
);
680 static int tegra_submit(struct drm_device
*drm
, void *data
,
681 struct drm_file
*file
)
683 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
684 struct drm_tegra_submit
*args
= data
;
685 struct tegra_drm_context
*context
;
688 mutex_lock(&fpriv
->lock
);
690 context
= idr_find(&fpriv
->contexts
, args
->context
);
696 err
= context
->client
->ops
->submit(context
, args
, drm
, file
);
699 mutex_unlock(&fpriv
->lock
);
703 static int tegra_get_syncpt_base(struct drm_device
*drm
, void *data
,
704 struct drm_file
*file
)
706 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
707 struct drm_tegra_get_syncpt_base
*args
= data
;
708 struct tegra_drm_context
*context
;
709 struct host1x_syncpt_base
*base
;
710 struct host1x_syncpt
*syncpt
;
713 mutex_lock(&fpriv
->lock
);
715 context
= idr_find(&fpriv
->contexts
, args
->context
);
721 if (args
->syncpt
>= context
->client
->base
.num_syncpts
) {
726 syncpt
= context
->client
->base
.syncpts
[args
->syncpt
];
728 base
= host1x_syncpt_get_base(syncpt
);
734 args
->id
= host1x_syncpt_base_id(base
);
737 mutex_unlock(&fpriv
->lock
);
741 static int tegra_gem_set_tiling(struct drm_device
*drm
, void *data
,
742 struct drm_file
*file
)
744 struct drm_tegra_gem_set_tiling
*args
= data
;
745 enum tegra_bo_tiling_mode mode
;
746 struct drm_gem_object
*gem
;
747 unsigned long value
= 0;
750 switch (args
->mode
) {
751 case DRM_TEGRA_GEM_TILING_MODE_PITCH
:
752 mode
= TEGRA_BO_TILING_MODE_PITCH
;
754 if (args
->value
!= 0)
759 case DRM_TEGRA_GEM_TILING_MODE_TILED
:
760 mode
= TEGRA_BO_TILING_MODE_TILED
;
762 if (args
->value
!= 0)
767 case DRM_TEGRA_GEM_TILING_MODE_BLOCK
:
768 mode
= TEGRA_BO_TILING_MODE_BLOCK
;
780 gem
= drm_gem_object_lookup(file
, args
->handle
);
784 bo
= to_tegra_bo(gem
);
786 bo
->tiling
.mode
= mode
;
787 bo
->tiling
.value
= value
;
789 drm_gem_object_put_unlocked(gem
);
794 static int tegra_gem_get_tiling(struct drm_device
*drm
, void *data
,
795 struct drm_file
*file
)
797 struct drm_tegra_gem_get_tiling
*args
= data
;
798 struct drm_gem_object
*gem
;
802 gem
= drm_gem_object_lookup(file
, args
->handle
);
806 bo
= to_tegra_bo(gem
);
808 switch (bo
->tiling
.mode
) {
809 case TEGRA_BO_TILING_MODE_PITCH
:
810 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_PITCH
;
814 case TEGRA_BO_TILING_MODE_TILED
:
815 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_TILED
;
819 case TEGRA_BO_TILING_MODE_BLOCK
:
820 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_BLOCK
;
821 args
->value
= bo
->tiling
.value
;
829 drm_gem_object_put_unlocked(gem
);
834 static int tegra_gem_set_flags(struct drm_device
*drm
, void *data
,
835 struct drm_file
*file
)
837 struct drm_tegra_gem_set_flags
*args
= data
;
838 struct drm_gem_object
*gem
;
841 if (args
->flags
& ~DRM_TEGRA_GEM_FLAGS
)
844 gem
= drm_gem_object_lookup(file
, args
->handle
);
848 bo
= to_tegra_bo(gem
);
851 if (args
->flags
& DRM_TEGRA_GEM_BOTTOM_UP
)
852 bo
->flags
|= TEGRA_BO_BOTTOM_UP
;
854 drm_gem_object_put_unlocked(gem
);
859 static int tegra_gem_get_flags(struct drm_device
*drm
, void *data
,
860 struct drm_file
*file
)
862 struct drm_tegra_gem_get_flags
*args
= data
;
863 struct drm_gem_object
*gem
;
866 gem
= drm_gem_object_lookup(file
, args
->handle
);
870 bo
= to_tegra_bo(gem
);
873 if (bo
->flags
& TEGRA_BO_BOTTOM_UP
)
874 args
->flags
|= DRM_TEGRA_GEM_BOTTOM_UP
;
876 drm_gem_object_put_unlocked(gem
);
882 static const struct drm_ioctl_desc tegra_drm_ioctls
[] = {
883 #ifdef CONFIG_DRM_TEGRA_STAGING
884 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE
, tegra_gem_create
,
885 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
886 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP
, tegra_gem_mmap
,
887 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
888 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ
, tegra_syncpt_read
,
889 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
890 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR
, tegra_syncpt_incr
,
891 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
892 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT
, tegra_syncpt_wait
,
893 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
894 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL
, tegra_open_channel
,
895 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
896 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL
, tegra_close_channel
,
897 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
898 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT
, tegra_get_syncpt
,
899 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
900 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT
, tegra_submit
,
901 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
902 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE
, tegra_get_syncpt_base
,
903 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
904 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING
, tegra_gem_set_tiling
,
905 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
906 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING
, tegra_gem_get_tiling
,
907 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
908 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS
, tegra_gem_set_flags
,
909 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
910 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS
, tegra_gem_get_flags
,
911 DRM_UNLOCKED
| DRM_RENDER_ALLOW
),
915 static const struct file_operations tegra_drm_fops
= {
916 .owner
= THIS_MODULE
,
918 .release
= drm_release
,
919 .unlocked_ioctl
= drm_ioctl
,
920 .mmap
= tegra_drm_mmap
,
923 .compat_ioctl
= drm_compat_ioctl
,
924 .llseek
= noop_llseek
,
927 static int tegra_drm_context_cleanup(int id
, void *p
, void *data
)
929 struct tegra_drm_context
*context
= p
;
931 tegra_drm_context_free(context
);
936 static void tegra_drm_postclose(struct drm_device
*drm
, struct drm_file
*file
)
938 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
940 mutex_lock(&fpriv
->lock
);
941 idr_for_each(&fpriv
->contexts
, tegra_drm_context_cleanup
, NULL
);
942 mutex_unlock(&fpriv
->lock
);
944 idr_destroy(&fpriv
->contexts
);
945 mutex_destroy(&fpriv
->lock
);
949 #ifdef CONFIG_DEBUG_FS
950 static int tegra_debugfs_framebuffers(struct seq_file
*s
, void *data
)
952 struct drm_info_node
*node
= (struct drm_info_node
*)s
->private;
953 struct drm_device
*drm
= node
->minor
->dev
;
954 struct drm_framebuffer
*fb
;
956 mutex_lock(&drm
->mode_config
.fb_lock
);
958 list_for_each_entry(fb
, &drm
->mode_config
.fb_list
, head
) {
959 seq_printf(s
, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
960 fb
->base
.id
, fb
->width
, fb
->height
,
962 fb
->format
->cpp
[0] * 8,
963 drm_framebuffer_read_refcount(fb
));
966 mutex_unlock(&drm
->mode_config
.fb_lock
);
971 static int tegra_debugfs_iova(struct seq_file
*s
, void *data
)
973 struct drm_info_node
*node
= (struct drm_info_node
*)s
->private;
974 struct drm_device
*drm
= node
->minor
->dev
;
975 struct tegra_drm
*tegra
= drm
->dev_private
;
976 struct drm_printer p
= drm_seq_file_printer(s
);
979 mutex_lock(&tegra
->mm_lock
);
980 drm_mm_print(&tegra
->mm
, &p
);
981 mutex_unlock(&tegra
->mm_lock
);
987 static struct drm_info_list tegra_debugfs_list
[] = {
988 { "framebuffers", tegra_debugfs_framebuffers
, 0 },
989 { "iova", tegra_debugfs_iova
, 0 },
992 static int tegra_debugfs_init(struct drm_minor
*minor
)
994 return drm_debugfs_create_files(tegra_debugfs_list
,
995 ARRAY_SIZE(tegra_debugfs_list
),
996 minor
->debugfs_root
, minor
);
1000 static struct drm_driver tegra_drm_driver
= {
1001 .driver_features
= DRIVER_MODESET
| DRIVER_GEM
| DRIVER_PRIME
|
1002 DRIVER_ATOMIC
| DRIVER_RENDER
,
1003 .load
= tegra_drm_load
,
1004 .unload
= tegra_drm_unload
,
1005 .open
= tegra_drm_open
,
1006 .postclose
= tegra_drm_postclose
,
1007 .lastclose
= drm_fb_helper_lastclose
,
1009 #if defined(CONFIG_DEBUG_FS)
1010 .debugfs_init
= tegra_debugfs_init
,
1013 .gem_free_object_unlocked
= tegra_bo_free_object
,
1014 .gem_vm_ops
= &tegra_bo_vm_ops
,
1016 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
1017 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
1018 .gem_prime_export
= tegra_gem_prime_export
,
1019 .gem_prime_import
= tegra_gem_prime_import
,
1021 .dumb_create
= tegra_bo_dumb_create
,
1023 .ioctls
= tegra_drm_ioctls
,
1024 .num_ioctls
= ARRAY_SIZE(tegra_drm_ioctls
),
1025 .fops
= &tegra_drm_fops
,
1027 .name
= DRIVER_NAME
,
1028 .desc
= DRIVER_DESC
,
1029 .date
= DRIVER_DATE
,
1030 .major
= DRIVER_MAJOR
,
1031 .minor
= DRIVER_MINOR
,
1032 .patchlevel
= DRIVER_PATCHLEVEL
,
1035 int tegra_drm_register_client(struct tegra_drm
*tegra
,
1036 struct tegra_drm_client
*client
)
1038 mutex_lock(&tegra
->clients_lock
);
1039 list_add_tail(&client
->list
, &tegra
->clients
);
1040 mutex_unlock(&tegra
->clients_lock
);
1045 int tegra_drm_unregister_client(struct tegra_drm
*tegra
,
1046 struct tegra_drm_client
*client
)
1048 mutex_lock(&tegra
->clients_lock
);
1049 list_del_init(&client
->list
);
1050 mutex_unlock(&tegra
->clients_lock
);
1055 struct iommu_group
*host1x_client_iommu_attach(struct host1x_client
*client
,
1058 struct drm_device
*drm
= dev_get_drvdata(client
->parent
);
1059 struct tegra_drm
*tegra
= drm
->dev_private
;
1060 struct iommu_group
*group
= NULL
;
1063 if (tegra
->domain
) {
1064 group
= iommu_group_get(client
->dev
);
1066 dev_err(client
->dev
, "failed to get IOMMU group\n");
1067 return ERR_PTR(-ENODEV
);
1070 if (!shared
|| (shared
&& (group
!= tegra
->group
))) {
1071 err
= iommu_attach_group(tegra
->domain
, group
);
1073 iommu_group_put(group
);
1074 return ERR_PTR(err
);
1077 if (shared
&& !tegra
->group
)
1078 tegra
->group
= group
;
1085 void host1x_client_iommu_detach(struct host1x_client
*client
,
1086 struct iommu_group
*group
)
1088 struct drm_device
*drm
= dev_get_drvdata(client
->parent
);
1089 struct tegra_drm
*tegra
= drm
->dev_private
;
1092 if (group
== tegra
->group
) {
1093 iommu_detach_group(tegra
->domain
, group
);
1094 tegra
->group
= NULL
;
1097 iommu_group_put(group
);
1101 void *tegra_drm_alloc(struct tegra_drm
*tegra
, size_t size
, dma_addr_t
*dma
)
1109 size
= iova_align(&tegra
->carveout
.domain
, size
);
1111 size
= PAGE_ALIGN(size
);
1113 gfp
= GFP_KERNEL
| __GFP_ZERO
;
1114 if (!tegra
->domain
) {
1116 * Many units only support 32-bit addresses, even on 64-bit
1117 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1118 * virtual address space, force allocations to be in the
1119 * lower 32-bit range.
1124 virt
= (void *)__get_free_pages(gfp
, get_order(size
));
1126 return ERR_PTR(-ENOMEM
);
1128 if (!tegra
->domain
) {
1130 * If IOMMU is disabled, devices address physical memory
1133 *dma
= virt_to_phys(virt
);
1137 alloc
= alloc_iova(&tegra
->carveout
.domain
,
1138 size
>> tegra
->carveout
.shift
,
1139 tegra
->carveout
.limit
, true);
1145 *dma
= iova_dma_addr(&tegra
->carveout
.domain
, alloc
);
1146 err
= iommu_map(tegra
->domain
, *dma
, virt_to_phys(virt
),
1147 size
, IOMMU_READ
| IOMMU_WRITE
);
1154 __free_iova(&tegra
->carveout
.domain
, alloc
);
1156 free_pages((unsigned long)virt
, get_order(size
));
1158 return ERR_PTR(err
);
1161 void tegra_drm_free(struct tegra_drm
*tegra
, size_t size
, void *virt
,
1165 size
= iova_align(&tegra
->carveout
.domain
, size
);
1167 size
= PAGE_ALIGN(size
);
1169 if (tegra
->domain
) {
1170 iommu_unmap(tegra
->domain
, dma
, size
);
1171 free_iova(&tegra
->carveout
.domain
,
1172 iova_pfn(&tegra
->carveout
.domain
, dma
));
1175 free_pages((unsigned long)virt
, get_order(size
));
1178 static int host1x_drm_probe(struct host1x_device
*dev
)
1180 struct drm_driver
*driver
= &tegra_drm_driver
;
1181 struct drm_device
*drm
;
1184 drm
= drm_dev_alloc(driver
, &dev
->dev
);
1186 return PTR_ERR(drm
);
1188 dev_set_drvdata(&dev
->dev
, drm
);
1190 err
= drm_dev_register(drm
, 0);
1201 static int host1x_drm_remove(struct host1x_device
*dev
)
1203 struct drm_device
*drm
= dev_get_drvdata(&dev
->dev
);
1205 drm_dev_unregister(drm
);
1211 #ifdef CONFIG_PM_SLEEP
1212 static int host1x_drm_suspend(struct device
*dev
)
1214 struct drm_device
*drm
= dev_get_drvdata(dev
);
1215 struct tegra_drm
*tegra
= drm
->dev_private
;
1217 drm_kms_helper_poll_disable(drm
);
1218 tegra_drm_fb_suspend(drm
);
1220 tegra
->state
= drm_atomic_helper_suspend(drm
);
1221 if (IS_ERR(tegra
->state
)) {
1222 tegra_drm_fb_resume(drm
);
1223 drm_kms_helper_poll_enable(drm
);
1224 return PTR_ERR(tegra
->state
);
1230 static int host1x_drm_resume(struct device
*dev
)
1232 struct drm_device
*drm
= dev_get_drvdata(dev
);
1233 struct tegra_drm
*tegra
= drm
->dev_private
;
1235 drm_atomic_helper_resume(drm
, tegra
->state
);
1236 tegra_drm_fb_resume(drm
);
1237 drm_kms_helper_poll_enable(drm
);
1243 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops
, host1x_drm_suspend
,
1246 static const struct of_device_id host1x_drm_subdevs
[] = {
1247 { .compatible
= "nvidia,tegra20-dc", },
1248 { .compatible
= "nvidia,tegra20-hdmi", },
1249 { .compatible
= "nvidia,tegra20-gr2d", },
1250 { .compatible
= "nvidia,tegra20-gr3d", },
1251 { .compatible
= "nvidia,tegra30-dc", },
1252 { .compatible
= "nvidia,tegra30-hdmi", },
1253 { .compatible
= "nvidia,tegra30-gr2d", },
1254 { .compatible
= "nvidia,tegra30-gr3d", },
1255 { .compatible
= "nvidia,tegra114-dsi", },
1256 { .compatible
= "nvidia,tegra114-hdmi", },
1257 { .compatible
= "nvidia,tegra114-gr3d", },
1258 { .compatible
= "nvidia,tegra124-dc", },
1259 { .compatible
= "nvidia,tegra124-sor", },
1260 { .compatible
= "nvidia,tegra124-hdmi", },
1261 { .compatible
= "nvidia,tegra124-dsi", },
1262 { .compatible
= "nvidia,tegra124-vic", },
1263 { .compatible
= "nvidia,tegra132-dsi", },
1264 { .compatible
= "nvidia,tegra210-dc", },
1265 { .compatible
= "nvidia,tegra210-dsi", },
1266 { .compatible
= "nvidia,tegra210-sor", },
1267 { .compatible
= "nvidia,tegra210-sor1", },
1268 { .compatible
= "nvidia,tegra210-vic", },
1269 { .compatible
= "nvidia,tegra186-display", },
1270 { .compatible
= "nvidia,tegra186-dc", },
1271 { .compatible
= "nvidia,tegra186-sor", },
1272 { .compatible
= "nvidia,tegra186-sor1", },
1273 { .compatible
= "nvidia,tegra186-vic", },
1277 static struct host1x_driver host1x_drm_driver
= {
1280 .pm
= &host1x_drm_pm_ops
,
1282 .probe
= host1x_drm_probe
,
1283 .remove
= host1x_drm_remove
,
1284 .subdevs
= host1x_drm_subdevs
,
1287 static struct platform_driver
* const drivers
[] = {
1288 &tegra_display_hub_driver
,
1292 &tegra_dpaux_driver
,
1299 static int __init
host1x_drm_init(void)
1303 err
= host1x_driver_register(&host1x_drm_driver
);
1307 err
= platform_register_drivers(drivers
, ARRAY_SIZE(drivers
));
1309 goto unregister_host1x
;
1314 host1x_driver_unregister(&host1x_drm_driver
);
1317 module_init(host1x_drm_init
);
1319 static void __exit
host1x_drm_exit(void)
1321 platform_unregister_drivers(drivers
, ARRAY_SIZE(drivers
));
1322 host1x_driver_unregister(&host1x_drm_driver
);
1324 module_exit(host1x_drm_exit
);
1326 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1327 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1328 MODULE_LICENSE("GPL v2");