drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / tegra / falcon.c
blobf685e72949d16b59c74cff8a230a08871eff747c
1 /*
2 * Copyright (c) 2015, NVIDIA Corporation.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #include <linux/platform_device.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/firmware.h>
12 #include <linux/pci_ids.h>
13 #include <linux/iopoll.h>
15 #include "falcon.h"
16 #include "drm.h"
18 enum falcon_memory {
19 FALCON_MEMORY_IMEM,
20 FALCON_MEMORY_DATA,
23 static void falcon_writel(struct falcon *falcon, u32 value, u32 offset)
25 writel(value, falcon->regs + offset);
28 int falcon_wait_idle(struct falcon *falcon)
30 u32 value;
32 return readl_poll_timeout(falcon->regs + FALCON_IDLESTATE, value,
33 (value == 0), 10, 100000);
36 static int falcon_dma_wait_idle(struct falcon *falcon)
38 u32 value;
40 return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value,
41 (value & FALCON_DMATRFCMD_IDLE), 10, 100000);
44 static int falcon_copy_chunk(struct falcon *falcon,
45 phys_addr_t base,
46 unsigned long offset,
47 enum falcon_memory target)
49 u32 cmd = FALCON_DMATRFCMD_SIZE_256B;
51 if (target == FALCON_MEMORY_IMEM)
52 cmd |= FALCON_DMATRFCMD_IMEM;
54 falcon_writel(falcon, offset, FALCON_DMATRFMOFFS);
55 falcon_writel(falcon, base, FALCON_DMATRFFBOFFS);
56 falcon_writel(falcon, cmd, FALCON_DMATRFCMD);
58 return falcon_dma_wait_idle(falcon);
61 static void falcon_copy_firmware_image(struct falcon *falcon,
62 const struct firmware *firmware)
64 u32 *firmware_vaddr = falcon->firmware.vaddr;
65 dma_addr_t daddr;
66 size_t i;
67 int err;
69 /* copy the whole thing taking into account endianness */
70 for (i = 0; i < firmware->size / sizeof(u32); i++)
71 firmware_vaddr[i] = le32_to_cpu(((u32 *)firmware->data)[i]);
73 /* ensure that caches are flushed and falcon can see the firmware */
74 daddr = dma_map_single(falcon->dev, firmware_vaddr,
75 falcon->firmware.size, DMA_TO_DEVICE);
76 err = dma_mapping_error(falcon->dev, daddr);
77 if (err) {
78 dev_err(falcon->dev, "failed to map firmware: %d\n", err);
79 return;
81 dma_sync_single_for_device(falcon->dev, daddr,
82 falcon->firmware.size, DMA_TO_DEVICE);
83 dma_unmap_single(falcon->dev, daddr, falcon->firmware.size,
84 DMA_TO_DEVICE);
87 static int falcon_parse_firmware_image(struct falcon *falcon)
89 struct falcon_fw_bin_header_v1 *bin = (void *)falcon->firmware.vaddr;
90 struct falcon_fw_os_header_v1 *os;
92 /* endian problems would show up right here */
93 if (bin->magic != PCI_VENDOR_ID_NVIDIA) {
94 dev_err(falcon->dev, "incorrect firmware magic\n");
95 return -EINVAL;
98 /* currently only version 1 is supported */
99 if (bin->version != 1) {
100 dev_err(falcon->dev, "unsupported firmware version\n");
101 return -EINVAL;
104 /* check that the firmware size is consistent */
105 if (bin->size > falcon->firmware.size) {
106 dev_err(falcon->dev, "firmware image size inconsistency\n");
107 return -EINVAL;
110 os = falcon->firmware.vaddr + bin->os_header_offset;
112 falcon->firmware.bin_data.size = bin->os_size;
113 falcon->firmware.bin_data.offset = bin->os_data_offset;
114 falcon->firmware.code.offset = os->code_offset;
115 falcon->firmware.code.size = os->code_size;
116 falcon->firmware.data.offset = os->data_offset;
117 falcon->firmware.data.size = os->data_size;
119 return 0;
122 int falcon_read_firmware(struct falcon *falcon, const char *name)
124 int err;
126 /* request_firmware prints error if it fails */
127 err = request_firmware(&falcon->firmware.firmware, name, falcon->dev);
128 if (err < 0)
129 return err;
131 return 0;
134 int falcon_load_firmware(struct falcon *falcon)
136 const struct firmware *firmware = falcon->firmware.firmware;
137 int err;
139 falcon->firmware.size = firmware->size;
141 /* allocate iova space for the firmware */
142 falcon->firmware.vaddr = falcon->ops->alloc(falcon, firmware->size,
143 &falcon->firmware.paddr);
144 if (!falcon->firmware.vaddr) {
145 dev_err(falcon->dev, "dma memory mapping failed\n");
146 return -ENOMEM;
149 /* copy firmware image into local area. this also ensures endianness */
150 falcon_copy_firmware_image(falcon, firmware);
152 /* parse the image data */
153 err = falcon_parse_firmware_image(falcon);
154 if (err < 0) {
155 dev_err(falcon->dev, "failed to parse firmware image\n");
156 goto err_setup_firmware_image;
159 release_firmware(firmware);
160 falcon->firmware.firmware = NULL;
162 return 0;
164 err_setup_firmware_image:
165 falcon->ops->free(falcon, falcon->firmware.size,
166 falcon->firmware.paddr, falcon->firmware.vaddr);
168 return err;
171 int falcon_init(struct falcon *falcon)
173 /* check mandatory ops */
174 if (!falcon->ops || !falcon->ops->alloc || !falcon->ops->free)
175 return -EINVAL;
177 falcon->firmware.vaddr = NULL;
179 return 0;
182 void falcon_exit(struct falcon *falcon)
184 if (falcon->firmware.firmware) {
185 release_firmware(falcon->firmware.firmware);
186 falcon->firmware.firmware = NULL;
189 if (falcon->firmware.vaddr) {
190 falcon->ops->free(falcon, falcon->firmware.size,
191 falcon->firmware.paddr,
192 falcon->firmware.vaddr);
193 falcon->firmware.vaddr = NULL;
197 int falcon_boot(struct falcon *falcon)
199 unsigned long offset;
200 int err;
202 if (!falcon->firmware.vaddr)
203 return -EINVAL;
205 falcon_writel(falcon, 0, FALCON_DMACTL);
207 /* setup the address of the binary data so Falcon can access it later */
208 falcon_writel(falcon, (falcon->firmware.paddr +
209 falcon->firmware.bin_data.offset) >> 8,
210 FALCON_DMATRFBASE);
212 /* copy the data segment into Falcon internal memory */
213 for (offset = 0; offset < falcon->firmware.data.size; offset += 256)
214 falcon_copy_chunk(falcon,
215 falcon->firmware.data.offset + offset,
216 offset, FALCON_MEMORY_DATA);
218 /* copy the first code segment into Falcon internal memory */
219 falcon_copy_chunk(falcon, falcon->firmware.code.offset,
220 0, FALCON_MEMORY_IMEM);
222 /* setup falcon interrupts */
223 falcon_writel(falcon, FALCON_IRQMSET_EXT(0xff) |
224 FALCON_IRQMSET_SWGEN1 |
225 FALCON_IRQMSET_SWGEN0 |
226 FALCON_IRQMSET_EXTERR |
227 FALCON_IRQMSET_HALT |
228 FALCON_IRQMSET_WDTMR,
229 FALCON_IRQMSET);
230 falcon_writel(falcon, FALCON_IRQDEST_EXT(0xff) |
231 FALCON_IRQDEST_SWGEN1 |
232 FALCON_IRQDEST_SWGEN0 |
233 FALCON_IRQDEST_EXTERR |
234 FALCON_IRQDEST_HALT,
235 FALCON_IRQDEST);
237 /* enable interface */
238 falcon_writel(falcon, FALCON_ITFEN_MTHDEN |
239 FALCON_ITFEN_CTXEN,
240 FALCON_ITFEN);
242 /* boot falcon */
243 falcon_writel(falcon, 0x00000000, FALCON_BOOTVEC);
244 falcon_writel(falcon, FALCON_CPUCTL_STARTCPU, FALCON_CPUCTL);
246 err = falcon_wait_idle(falcon);
247 if (err < 0) {
248 dev_err(falcon->dev, "Falcon boot failed due to timeout\n");
249 return err;
252 return 0;
255 void falcon_execute_method(struct falcon *falcon, u32 method, u32 data)
257 falcon_writel(falcon, method >> 2, FALCON_UCLASS_METHOD_OFFSET);
258 falcon_writel(falcon, data, FALCON_UCLASS_METHOD_DATA);