drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / tegra / mipi-phy.h
blob012ea8ac36d76becb59a450fcaf0a55ff0f88d45
1 /*
2 * Copyright (C) 2013 NVIDIA Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #ifndef DRM_TEGRA_MIPI_PHY_H
10 #define DRM_TEGRA_MIPI_PHY_H
13 * D-PHY timing parameters
15 * A detailed description of these parameters can be found in the MIPI
16 * Alliance Specification for D-PHY, Section 5.9 "Global Operation Timing
17 * Parameters".
19 * All parameters are specified in nanoseconds.
21 struct mipi_dphy_timing {
22 unsigned int clkmiss;
23 unsigned int clkpost;
24 unsigned int clkpre;
25 unsigned int clkprepare;
26 unsigned int clksettle;
27 unsigned int clktermen;
28 unsigned int clktrail;
29 unsigned int clkzero;
30 unsigned int dtermen;
31 unsigned int eot;
32 unsigned int hsexit;
33 unsigned int hsprepare;
34 unsigned int hszero;
35 unsigned int hssettle;
36 unsigned int hsskip;
37 unsigned int hstrail;
38 unsigned int init;
39 unsigned int lpx;
40 unsigned int taget;
41 unsigned int tago;
42 unsigned int tasure;
43 unsigned int wakeup;
46 int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
47 unsigned long period);
48 int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
49 unsigned long period);
51 #endif