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pkt_sched: sch_qfq: remove a source of high packet delay/jitter
[linux/fpc-iii.git] / include / video / omapdss.h
blobb39463553845e42b27afd84066d2793b1609c949
1 /*
2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
20
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
24 #include <linux/interrupt.h>
25
26 #include <video/videomode.h>
27
28 #define DISPC_IRQ_FRAMEDONE (1 << 0)
29 #define DISPC_IRQ_VSYNC (1 << 1)
30 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
36 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37 #define DISPC_IRQ_OCP_ERR (1 << 9)
38 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
40 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
42 #define DISPC_IRQ_SYNC_LOST (1 << 14)
43 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44 #define DISPC_IRQ_WAKEUP (1 << 16)
45 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
46 #define DISPC_IRQ_VSYNC2 (1 << 18)
47 #define DISPC_IRQ_VID3_END_WIN (1 << 19)
48 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
49 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
50 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
51 #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
52 #define DISPC_IRQ_FRAMEDONETV (1 << 24)
53 #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
54 #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
55 #define DISPC_IRQ_VSYNC3 (1 << 28)
56 #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
57 #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
58
59 struct omap_dss_device;
60 struct omap_overlay_manager;
61 struct dss_lcd_mgr_config;
62 struct snd_aes_iec958;
63 struct snd_cea_861_aud_if;
64
65 enum omap_display_type {
66 OMAP_DISPLAY_TYPE_NONE = 0,
67 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
68 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
69 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
70 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
71 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
72 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
73 OMAP_DISPLAY_TYPE_DVI = 1 << 6,
74 };
75
76 enum omap_plane {
77 OMAP_DSS_GFX = 0,
78 OMAP_DSS_VIDEO1 = 1,
79 OMAP_DSS_VIDEO2 = 2,
80 OMAP_DSS_VIDEO3 = 3,
81 OMAP_DSS_WB = 4,
82 };
83
84 enum omap_channel {
85 OMAP_DSS_CHANNEL_LCD = 0,
86 OMAP_DSS_CHANNEL_DIGIT = 1,
87 OMAP_DSS_CHANNEL_LCD2 = 2,
88 OMAP_DSS_CHANNEL_LCD3 = 3,
89 };
90
91 enum omap_color_mode {
92 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
93 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
94 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
95 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
96 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
97 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
98 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
99 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
100 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
101 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
102 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
103 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
104 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
105 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
106 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
107 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
108 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
109 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
110 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
111 };
112
113 enum omap_dss_load_mode {
114 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
115 OMAP_DSS_LOAD_CLUT_ONLY = 1,
116 OMAP_DSS_LOAD_FRAME_ONLY = 2,
117 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
118 };
119
120 enum omap_dss_trans_key_type {
121 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
122 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
123 };
124
125 enum omap_rfbi_te_mode {
126 OMAP_DSS_RFBI_TE_MODE_1 = 1,
127 OMAP_DSS_RFBI_TE_MODE_2 = 2,
128 };
129
130 enum omap_dss_signal_level {
131 OMAPDSS_SIG_ACTIVE_HIGH = 0,
132 OMAPDSS_SIG_ACTIVE_LOW = 1,
133 };
134
135 enum omap_dss_signal_edge {
136 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
137 OMAPDSS_DRIVE_SIG_RISING_EDGE,
138 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
139 };
140
141 enum omap_dss_venc_type {
142 OMAP_DSS_VENC_TYPE_COMPOSITE,
143 OMAP_DSS_VENC_TYPE_SVIDEO,
144 };
145
146 enum omap_dss_dsi_pixel_format {
147 OMAP_DSS_DSI_FMT_RGB888,
148 OMAP_DSS_DSI_FMT_RGB666,
149 OMAP_DSS_DSI_FMT_RGB666_PACKED,
150 OMAP_DSS_DSI_FMT_RGB565,
151 };
152
153 enum omap_dss_dsi_mode {
154 OMAP_DSS_DSI_CMD_MODE = 0,
155 OMAP_DSS_DSI_VIDEO_MODE,
156 };
157
158 enum omap_display_caps {
159 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
160 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
161 };
162
163 enum omap_dss_display_state {
164 OMAP_DSS_DISPLAY_DISABLED = 0,
165 OMAP_DSS_DISPLAY_ACTIVE,
166 };
167
168 enum omap_dss_audio_state {
169 OMAP_DSS_AUDIO_DISABLED = 0,
170 OMAP_DSS_AUDIO_ENABLED,
171 OMAP_DSS_AUDIO_CONFIGURED,
172 OMAP_DSS_AUDIO_PLAYING,
173 };
174
175 struct omap_dss_audio {
176 struct snd_aes_iec958 *iec;
177 struct snd_cea_861_aud_if *cea;
178 };
179
180 enum omap_dss_rotation_type {
181 OMAP_DSS_ROT_DMA = 1 << 0,
182 OMAP_DSS_ROT_VRFB = 1 << 1,
183 OMAP_DSS_ROT_TILER = 1 << 2,
184 };
185
186 /* clockwise rotation angle */
187 enum omap_dss_rotation_angle {
188 OMAP_DSS_ROT_0 = 0,
189 OMAP_DSS_ROT_90 = 1,
190 OMAP_DSS_ROT_180 = 2,
191 OMAP_DSS_ROT_270 = 3,
192 };
193
194 enum omap_overlay_caps {
195 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
196 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
197 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
198 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
199 OMAP_DSS_OVL_CAP_POS = 1 << 4,
200 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
201 };
202
203 enum omap_overlay_manager_caps {
204 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
205 };
206
207 enum omap_dss_clk_source {
208 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
209 * OMAP4: DSS_FCLK */
210 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
211 * OMAP4: PLL1_CLK1 */
212 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
213 * OMAP4: PLL1_CLK2 */
214 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
215 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
216 };
217
218 enum omap_hdmi_flags {
219 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
220 };
221
222 enum omap_dss_output_id {
223 OMAP_DSS_OUTPUT_DPI = 1 << 0,
224 OMAP_DSS_OUTPUT_DBI = 1 << 1,
225 OMAP_DSS_OUTPUT_SDI = 1 << 2,
226 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
227 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
228 OMAP_DSS_OUTPUT_VENC = 1 << 5,
229 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
230 };
231
232 /* RFBI */
233
234 struct rfbi_timings {
235 int cs_on_time;
236 int cs_off_time;
237 int we_on_time;
238 int we_off_time;
239 int re_on_time;
240 int re_off_time;
241 int we_cycle_time;
242 int re_cycle_time;
243 int cs_pulse_width;
244 int access_time;
245
246 int clk_div;
247
248 u32 tim[5]; /* set by rfbi_convert_timings() */
249
250 int converted;
251 };
252
253 void omap_rfbi_write_command(const void *buf, u32 len);
254 void omap_rfbi_read_data(void *buf, u32 len);
255 void omap_rfbi_write_data(const void *buf, u32 len);
256 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
257 u16 x, u16 y,
258 u16 w, u16 h);
259 int omap_rfbi_enable_te(bool enable, unsigned line);
260 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
261 unsigned hs_pulse_time, unsigned vs_pulse_time,
262 int hs_pol_inv, int vs_pol_inv, int extif_div);
263 void rfbi_bus_lock(void);
264 void rfbi_bus_unlock(void);
265
266 /* DSI */
267
268 enum omap_dss_dsi_trans_mode {
269 /* Sync Pulses: both sync start and end packets sent */
270 OMAP_DSS_DSI_PULSE_MODE,
271 /* Sync Events: only sync start packets sent */
272 OMAP_DSS_DSI_EVENT_MODE,
273 /* Burst: only sync start packets sent, pixels are time compressed */
274 OMAP_DSS_DSI_BURST_MODE,
275 };
276
277 struct omap_dss_dsi_videomode_timings {
278 unsigned long hsclk;
279
280 unsigned ndl;
281 unsigned bitspp;
282
283 /* pixels */
284 u16 hact;
285 /* lines */
286 u16 vact;
287
288 /* DSI video mode blanking data */
289 /* Unit: byte clock cycles */
290 u16 hss;
291 u16 hsa;
292 u16 hse;
293 u16 hfp;
294 u16 hbp;
295 /* Unit: line clocks */
296 u16 vsa;
297 u16 vfp;
298 u16 vbp;
299
300 /* DSI blanking modes */
301 int blanking_mode;
302 int hsa_blanking_mode;
303 int hbp_blanking_mode;
304 int hfp_blanking_mode;
305
306 enum omap_dss_dsi_trans_mode trans_mode;
307
308 bool ddr_clk_always_on;
309 int window_sync;
310 };
311
312 struct omap_dss_dsi_config {
313 enum omap_dss_dsi_mode mode;
314 enum omap_dss_dsi_pixel_format pixel_format;
315 const struct omap_video_timings *timings;
316
317 unsigned long hs_clk_min, hs_clk_max;
318 unsigned long lp_clk_min, lp_clk_max;
319
320 bool ddr_clk_always_on;
321 enum omap_dss_dsi_trans_mode trans_mode;
322 };
323
324 void dsi_bus_lock(struct omap_dss_device *dssdev);
325 void dsi_bus_unlock(struct omap_dss_device *dssdev);
326 int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
327 int len);
328 int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
329 int len);
330 int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
331 int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
332 int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
333 u8 param);
334 int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
335 u8 param);
336 int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
337 u8 param1, u8 param2);
338 int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
339 u8 *data, int len);
340 int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
341 u8 *data, int len);
342 int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
343 u8 *buf, int buflen);
344 int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
345 int buflen);
346 int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
347 u8 *buf, int buflen);
348 int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
349 u8 param1, u8 param2, u8 *buf, int buflen);
350 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
351 u16 len);
352 int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
353 int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
354 int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
355 void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
356
357 enum omapdss_version {
358 OMAPDSS_VER_UNKNOWN = 0,
359 OMAPDSS_VER_OMAP24xx,
360 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
361 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
362 OMAPDSS_VER_OMAP3630,
363 OMAPDSS_VER_AM35xx,
364 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
365 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
366 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
367 OMAPDSS_VER_OMAP5,
368 };
369
370 /* Board specific data */
371 struct omap_dss_board_info {
372 int (*get_context_loss_count)(struct device *dev);
373 int num_devices;
374 struct omap_dss_device **devices;
375 struct omap_dss_device *default_device;
376 const char *default_display_name;
377 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
378 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
379 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
380 enum omapdss_version version;
381 };
382
383 /* Init with the board info */
384 extern int omap_display_init(struct omap_dss_board_info *board_data);
385 /* HDMI mux init*/
386 extern int omap_hdmi_init(enum omap_hdmi_flags flags);
387
388 struct omap_video_timings {
389 /* Unit: pixels */
390 u16 x_res;
391 /* Unit: pixels */
392 u16 y_res;
393 /* Unit: KHz */
394 u32 pixel_clock;
395 /* Unit: pixel clocks */
396 u16 hsw; /* Horizontal synchronization pulse width */
397 /* Unit: pixel clocks */
398 u16 hfp; /* Horizontal front porch */
399 /* Unit: pixel clocks */
400 u16 hbp; /* Horizontal back porch */
401 /* Unit: line clocks */
402 u16 vsw; /* Vertical synchronization pulse width */
403 /* Unit: line clocks */
404 u16 vfp; /* Vertical front porch */
405 /* Unit: line clocks */
406 u16 vbp; /* Vertical back porch */
407
408 /* Vsync logic level */
409 enum omap_dss_signal_level vsync_level;
410 /* Hsync logic level */
411 enum omap_dss_signal_level hsync_level;
412 /* Interlaced or Progressive timings */
413 bool interlace;
414 /* Pixel clock edge to drive LCD data */
415 enum omap_dss_signal_edge data_pclk_edge;
416 /* Data enable logic level */
417 enum omap_dss_signal_level de_level;
418 /* Pixel clock edges to drive HSYNC and VSYNC signals */
419 enum omap_dss_signal_edge sync_pclk_edge;
420 };
421
422 #ifdef CONFIG_OMAP2_DSS_VENC
423 /* Hardcoded timings for tv modes. Venc only uses these to
424 * identify the mode, and does not actually use the configs
425 * itself. However, the configs should be something that
426 * a normal monitor can also show */
427 extern const struct omap_video_timings omap_dss_pal_timings;
428 extern const struct omap_video_timings omap_dss_ntsc_timings;
429 #endif
430
431 struct omap_dss_cpr_coefs {
432 s16 rr, rg, rb;
433 s16 gr, gg, gb;
434 s16 br, bg, bb;
435 };
436
437 struct omap_overlay_info {
438 u32 paddr;
439 u32 p_uv_addr; /* for NV12 format */
440 u16 screen_width;
441 u16 width;
442 u16 height;
443 enum omap_color_mode color_mode;
444 u8 rotation;
445 enum omap_dss_rotation_type rotation_type;
446 bool mirror;
447
448 u16 pos_x;
449 u16 pos_y;
450 u16 out_width; /* if 0, out_width == width */
451 u16 out_height; /* if 0, out_height == height */
452 u8 global_alpha;
453 u8 pre_mult_alpha;
454 u8 zorder;
455 };
456
457 struct omap_overlay {
458 struct kobject kobj;
459 struct list_head list;
460
461 /* static fields */
462 const char *name;
463 enum omap_plane id;
464 enum omap_color_mode supported_modes;
465 enum omap_overlay_caps caps;
466
467 /* dynamic fields */
468 struct omap_overlay_manager *manager;
469
470 /*
471 * The following functions do not block:
472 *
473 * is_enabled
474 * set_overlay_info
475 * get_overlay_info
476 *
477 * The rest of the functions may block and cannot be called from
478 * interrupt context
479 */
480
481 int (*enable)(struct omap_overlay *ovl);
482 int (*disable)(struct omap_overlay *ovl);
483 bool (*is_enabled)(struct omap_overlay *ovl);
484
485 int (*set_manager)(struct omap_overlay *ovl,
486 struct omap_overlay_manager *mgr);
487 int (*unset_manager)(struct omap_overlay *ovl);
488
489 int (*set_overlay_info)(struct omap_overlay *ovl,
490 struct omap_overlay_info *info);
491 void (*get_overlay_info)(struct omap_overlay *ovl,
492 struct omap_overlay_info *info);
493
494 int (*wait_for_go)(struct omap_overlay *ovl);
495
496 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
497 };
498
499 struct omap_overlay_manager_info {
500 u32 default_color;
501
502 enum omap_dss_trans_key_type trans_key_type;
503 u32 trans_key;
504 bool trans_enabled;
505
506 bool partial_alpha_enabled;
507
508 bool cpr_enable;
509 struct omap_dss_cpr_coefs cpr_coefs;
510 };
511
512 struct omap_overlay_manager {
513 struct kobject kobj;
514
515 /* static fields */
516 const char *name;
517 enum omap_channel id;
518 enum omap_overlay_manager_caps caps;
519 struct list_head overlays;
520 enum omap_display_type supported_displays;
521 enum omap_dss_output_id supported_outputs;
522
523 /* dynamic fields */
524 struct omap_dss_device *output;
525
526 /*
527 * The following functions do not block:
528 *
529 * set_manager_info
530 * get_manager_info
531 * apply
532 *
533 * The rest of the functions may block and cannot be called from
534 * interrupt context
535 */
536
537 int (*set_output)(struct omap_overlay_manager *mgr,
538 struct omap_dss_device *output);
539 int (*unset_output)(struct omap_overlay_manager *mgr);
540
541 int (*set_manager_info)(struct omap_overlay_manager *mgr,
542 struct omap_overlay_manager_info *info);
543 void (*get_manager_info)(struct omap_overlay_manager *mgr,
544 struct omap_overlay_manager_info *info);
545
546 int (*apply)(struct omap_overlay_manager *mgr);
547 int (*wait_for_go)(struct omap_overlay_manager *mgr);
548 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
549
550 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
551 };
552
553 /* 22 pins means 1 clk lane and 10 data lanes */
554 #define OMAP_DSS_MAX_DSI_PINS 22
555
556 struct omap_dsi_pin_config {
557 int num_pins;
558 /*
559 * pin numbers in the following order:
560 * clk+, clk-
561 * data1+, data1-
562 * data2+, data2-
563 * ...
564 */
565 int pins[OMAP_DSS_MAX_DSI_PINS];
566 };
567
568 struct omap_dss_writeback_info {
569 u32 paddr;
570 u32 p_uv_addr;
571 u16 buf_width;
572 u16 width;
573 u16 height;
574 enum omap_color_mode color_mode;
575 u8 rotation;
576 enum omap_dss_rotation_type rotation_type;
577 bool mirror;
578 u8 pre_mult_alpha;
579 };
580
581 struct omapdss_dpi_ops {
582 int (*connect)(struct omap_dss_device *dssdev,
583 struct omap_dss_device *dst);
584 void (*disconnect)(struct omap_dss_device *dssdev,
585 struct omap_dss_device *dst);
586
587 int (*enable)(struct omap_dss_device *dssdev);
588 void (*disable)(struct omap_dss_device *dssdev);
589
590 int (*check_timings)(struct omap_dss_device *dssdev,
591 struct omap_video_timings *timings);
592 void (*set_timings)(struct omap_dss_device *dssdev,
593 struct omap_video_timings *timings);
594 void (*get_timings)(struct omap_dss_device *dssdev,
595 struct omap_video_timings *timings);
596
597 void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
598 };
599
600 struct omapdss_sdi_ops {
601 int (*connect)(struct omap_dss_device *dssdev,
602 struct omap_dss_device *dst);
603 void (*disconnect)(struct omap_dss_device *dssdev,
604 struct omap_dss_device *dst);
605
606 int (*enable)(struct omap_dss_device *dssdev);
607 void (*disable)(struct omap_dss_device *dssdev);
608
609 int (*check_timings)(struct omap_dss_device *dssdev,
610 struct omap_video_timings *timings);
611 void (*set_timings)(struct omap_dss_device *dssdev,
612 struct omap_video_timings *timings);
613 void (*get_timings)(struct omap_dss_device *dssdev,
614 struct omap_video_timings *timings);
615
616 void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
617 };
618
619 struct omapdss_dvi_ops {
620 int (*connect)(struct omap_dss_device *dssdev,
621 struct omap_dss_device *dst);
622 void (*disconnect)(struct omap_dss_device *dssdev,
623 struct omap_dss_device *dst);
624
625 int (*enable)(struct omap_dss_device *dssdev);
626 void (*disable)(struct omap_dss_device *dssdev);
627
628 int (*check_timings)(struct omap_dss_device *dssdev,
629 struct omap_video_timings *timings);
630 void (*set_timings)(struct omap_dss_device *dssdev,
631 struct omap_video_timings *timings);
632 void (*get_timings)(struct omap_dss_device *dssdev,
633 struct omap_video_timings *timings);
634 };
635
636 struct omapdss_atv_ops {
637 int (*connect)(struct omap_dss_device *dssdev,
638 struct omap_dss_device *dst);
639 void (*disconnect)(struct omap_dss_device *dssdev,
640 struct omap_dss_device *dst);
641
642 int (*enable)(struct omap_dss_device *dssdev);
643 void (*disable)(struct omap_dss_device *dssdev);
644
645 int (*check_timings)(struct omap_dss_device *dssdev,
646 struct omap_video_timings *timings);
647 void (*set_timings)(struct omap_dss_device *dssdev,
648 struct omap_video_timings *timings);
649 void (*get_timings)(struct omap_dss_device *dssdev,
650 struct omap_video_timings *timings);
651
652 void (*set_type)(struct omap_dss_device *dssdev,
653 enum omap_dss_venc_type type);
654 void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
655 bool invert_polarity);
656
657 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
658 u32 (*get_wss)(struct omap_dss_device *dssdev);
659 };
660
661 struct omapdss_hdmi_ops {
662 int (*connect)(struct omap_dss_device *dssdev,
663 struct omap_dss_device *dst);
664 void (*disconnect)(struct omap_dss_device *dssdev,
665 struct omap_dss_device *dst);
666
667 int (*enable)(struct omap_dss_device *dssdev);
668 void (*disable)(struct omap_dss_device *dssdev);
669
670 int (*check_timings)(struct omap_dss_device *dssdev,
671 struct omap_video_timings *timings);
672 void (*set_timings)(struct omap_dss_device *dssdev,
673 struct omap_video_timings *timings);
674 void (*get_timings)(struct omap_dss_device *dssdev,
675 struct omap_video_timings *timings);
676
677 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
678 bool (*detect)(struct omap_dss_device *dssdev);
679
680 /*
681 * Note: These functions might sleep. Do not call while
682 * holding a spinlock/readlock.
683 */
684 int (*audio_enable)(struct omap_dss_device *dssdev);
685 void (*audio_disable)(struct omap_dss_device *dssdev);
686 bool (*audio_supported)(struct omap_dss_device *dssdev);
687 int (*audio_config)(struct omap_dss_device *dssdev,
688 struct omap_dss_audio *audio);
689 /* Note: These functions may not sleep */
690 int (*audio_start)(struct omap_dss_device *dssdev);
691 void (*audio_stop)(struct omap_dss_device *dssdev);
692 };
693
694 struct omapdss_dsi_ops {
695 int (*connect)(struct omap_dss_device *dssdev,
696 struct omap_dss_device *dst);
697 void (*disconnect)(struct omap_dss_device *dssdev,
698 struct omap_dss_device *dst);
699
700 int (*enable)(struct omap_dss_device *dssdev);
701 void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
702 bool enter_ulps);
703
704 /* bus configuration */
705 int (*set_config)(struct omap_dss_device *dssdev,
706 const struct omap_dss_dsi_config *cfg);
707 int (*configure_pins)(struct omap_dss_device *dssdev,
708 const struct omap_dsi_pin_config *pin_cfg);
709
710 void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
711 bool enable);
712 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
713
714 int (*update)(struct omap_dss_device *dssdev, int channel,
715 void (*callback)(int, void *), void *data);
716
717 void (*bus_lock)(struct omap_dss_device *dssdev);
718 void (*bus_unlock)(struct omap_dss_device *dssdev);
719
720 int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
721 void (*disable_video_output)(struct omap_dss_device *dssdev,
722 int channel);
723
724 int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
725 int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
726 int vc_id);
727 void (*release_vc)(struct omap_dss_device *dssdev, int channel);
728
729 /* data transfer */
730 int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
731 u8 *data, int len);
732 int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
733 u8 *data, int len);
734 int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
735 u8 *data, int len);
736
737 int (*gen_write)(struct omap_dss_device *dssdev, int channel,
738 u8 *data, int len);
739 int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
740 u8 *data, int len);
741 int (*gen_read)(struct omap_dss_device *dssdev, int channel,
742 u8 *reqdata, int reqlen,
743 u8 *data, int len);
744
745 int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
746
747 int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
748 int channel, u16 plen);
749 };
750
751 struct omap_dss_device {
752 /* old device, to be removed */
753 struct device old_dev;
754
755 /* new device, pointer to panel device */
756 struct device *dev;
757
758 struct module *owner;
759
760 struct list_head panel_list;
761
762 /* alias in the form of "display%d" */
763 char alias[16];
764
765 enum omap_display_type type;
766 enum omap_display_type output_type;
767
768 /* obsolete, to be removed */
769 enum omap_channel channel;
770
771 union {
772 struct {
773 u8 data_lines;
774 } dpi;
775
776 struct {
777 u8 channel;
778 u8 data_lines;
779 } rfbi;
780
781 struct {
782 u8 datapairs;
783 } sdi;
784
785 struct {
786 int module;
787 } dsi;
788
789 struct {
790 enum omap_dss_venc_type type;
791 bool invert_polarity;
792 } venc;
793 } phy;
794
795 struct {
796 struct omap_video_timings timings;
797
798 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
799 enum omap_dss_dsi_mode dsi_mode;
800 } panel;
801
802 struct {
803 u8 pixel_size;
804 struct rfbi_timings rfbi_timings;
805 } ctrl;
806
807 const char *name;
808
809 /* used to match device to driver */
810 const char *driver_name;
811
812 void *data;
813
814 struct omap_dss_driver *driver;
815
816 union {
817 const struct omapdss_dpi_ops *dpi;
818 const struct omapdss_sdi_ops *sdi;
819 const struct omapdss_dvi_ops *dvi;
820 const struct omapdss_hdmi_ops *hdmi;
821 const struct omapdss_atv_ops *atv;
822 const struct omapdss_dsi_ops *dsi;
823 } ops;
824
825 /* helper variable for driver suspend/resume */
826 bool activate_after_resume;
827
828 enum omap_display_caps caps;
829
830 struct omap_dss_device *output;
831
832 enum omap_dss_display_state state;
833
834 enum omap_dss_audio_state audio_state;
835
836 /* OMAP DSS output specific fields */
837
838 struct list_head list;
839
840 /* DISPC channel for this output */
841 enum omap_channel dispc_channel;
842
843 /* output instance */
844 enum omap_dss_output_id id;
845
846 /* dynamic fields */
847 struct omap_overlay_manager *manager;
848
849 struct omap_dss_device *device;
850 };
851
852 struct omap_dss_hdmi_data
853 {
854 int ct_cp_hpd_gpio;
855 int ls_oe_gpio;
856 int hpd_gpio;
857 };
858
859 struct omap_dss_driver {
860 struct device_driver driver;
861
862 int (*probe)(struct omap_dss_device *);
863 void (*remove)(struct omap_dss_device *);
864
865 int (*connect)(struct omap_dss_device *dssdev);
866 void (*disconnect)(struct omap_dss_device *dssdev);
867
868 int (*enable)(struct omap_dss_device *display);
869 void (*disable)(struct omap_dss_device *display);
870 int (*run_test)(struct omap_dss_device *display, int test);
871
872 int (*update)(struct omap_dss_device *dssdev,
873 u16 x, u16 y, u16 w, u16 h);
874 int (*sync)(struct omap_dss_device *dssdev);
875
876 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
877 int (*get_te)(struct omap_dss_device *dssdev);
878
879 u8 (*get_rotate)(struct omap_dss_device *dssdev);
880 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
881
882 bool (*get_mirror)(struct omap_dss_device *dssdev);
883 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
884
885 int (*memory_read)(struct omap_dss_device *dssdev,
886 void *buf, size_t size,
887 u16 x, u16 y, u16 w, u16 h);
888
889 void (*get_resolution)(struct omap_dss_device *dssdev,
890 u16 *xres, u16 *yres);
891 void (*get_dimensions)(struct omap_dss_device *dssdev,
892 u32 *width, u32 *height);
893 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
894
895 int (*check_timings)(struct omap_dss_device *dssdev,
896 struct omap_video_timings *timings);
897 void (*set_timings)(struct omap_dss_device *dssdev,
898 struct omap_video_timings *timings);
899 void (*get_timings)(struct omap_dss_device *dssdev,
900 struct omap_video_timings *timings);
901
902 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
903 u32 (*get_wss)(struct omap_dss_device *dssdev);
904
905 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
906 bool (*detect)(struct omap_dss_device *dssdev);
907
908 /*
909 * For display drivers that support audio. This encompasses
910 * HDMI and DisplayPort at the moment.
911 */
912 /*
913 * Note: These functions might sleep. Do not call while
914 * holding a spinlock/readlock.
915 */
916 int (*audio_enable)(struct omap_dss_device *dssdev);
917 void (*audio_disable)(struct omap_dss_device *dssdev);
918 bool (*audio_supported)(struct omap_dss_device *dssdev);
919 int (*audio_config)(struct omap_dss_device *dssdev,
920 struct omap_dss_audio *audio);
921 /* Note: These functions may not sleep */
922 int (*audio_start)(struct omap_dss_device *dssdev);
923 void (*audio_stop)(struct omap_dss_device *dssdev);
924
925 };
926
927 enum omapdss_version omapdss_get_version(void);
928 bool omapdss_is_initialized(void);
929
930 int omap_dss_register_driver(struct omap_dss_driver *);
931 void omap_dss_unregister_driver(struct omap_dss_driver *);
932
933 int omapdss_register_display(struct omap_dss_device *dssdev);
934 void omapdss_unregister_display(struct omap_dss_device *dssdev);
935
936 struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
937 void omap_dss_put_device(struct omap_dss_device *dssdev);
938 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
939 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
940 struct omap_dss_device *omap_dss_find_device(void *data,
941 int (*match)(struct omap_dss_device *dssdev, void *data));
942 const char *omapdss_get_default_display_name(void);
943
944 void videomode_to_omap_video_timings(const struct videomode *vm,
945 struct omap_video_timings *ovt);
946 void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
947 struct videomode *vm);
948
949 int dss_feat_get_num_mgrs(void);
950 int dss_feat_get_num_ovls(void);
951 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
952 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
953 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
954
955
956
957 int omap_dss_get_num_overlay_managers(void);
958 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
959
960 int omap_dss_get_num_overlays(void);
961 struct omap_overlay *omap_dss_get_overlay(int num);
962
963 int omapdss_register_output(struct omap_dss_device *output);
964 void omapdss_unregister_output(struct omap_dss_device *output);
965 struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
966 struct omap_dss_device *omap_dss_find_output(const char *name);
967 struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
968 int omapdss_output_set_device(struct omap_dss_device *out,
969 struct omap_dss_device *dssdev);
970 int omapdss_output_unset_device(struct omap_dss_device *out);
971
972 struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
973 struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
974
975 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
976 u16 *xres, u16 *yres);
977 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
978 void omapdss_default_get_timings(struct omap_dss_device *dssdev,
979 struct omap_video_timings *timings);
980
981 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
982 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
983 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
984
985 u32 dispc_read_irqstatus(void);
986 void dispc_clear_irqstatus(u32 mask);
987 u32 dispc_read_irqenable(void);
988 void dispc_write_irqenable(u32 mask);
989
990 int dispc_request_irq(irq_handler_t handler, void *dev_id);
991 void dispc_free_irq(void *dev_id);
992
993 int dispc_runtime_get(void);
994 void dispc_runtime_put(void);
995
996 void dispc_mgr_enable(enum omap_channel channel, bool enable);
997 bool dispc_mgr_is_enabled(enum omap_channel channel);
998 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
999 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
1000 u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
1001 bool dispc_mgr_go_busy(enum omap_channel channel);
1002 void dispc_mgr_go(enum omap_channel channel);
1003 void dispc_mgr_set_lcd_config(enum omap_channel channel,
1004 const struct dss_lcd_mgr_config *config);
1005 void dispc_mgr_set_timings(enum omap_channel channel,
1006 const struct omap_video_timings *timings);
1007 void dispc_mgr_setup(enum omap_channel channel,
1008 const struct omap_overlay_manager_info *info);
1009
1010 int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
1011 const struct omap_overlay_info *oi,
1012 const struct omap_video_timings *timings,
1013 int *x_predecim, int *y_predecim);
1014
1015 int dispc_ovl_enable(enum omap_plane plane, bool enable);
1016 bool dispc_ovl_enabled(enum omap_plane plane);
1017 void dispc_ovl_set_channel_out(enum omap_plane plane,
1018 enum omap_channel channel);
1019 int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
1020 bool replication, const struct omap_video_timings *mgr_timings,
1021 bool mem_to_mem);
1022
1023 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
1024 #define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
1025
1026 void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
1027 bool enable);
1028 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
1029 int omapdss_dsi_set_config(struct omap_dss_device *dssdev,
1030 const struct omap_dss_dsi_config *config);
1031
1032 int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
1033 void (*callback)(int, void *), void *data);
1034 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
1035 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
1036 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
1037 int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev,
1038 const struct omap_dsi_pin_config *pin_cfg);
1039
1040 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
1041 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
1042 bool disconnect_lanes, bool enter_ulps);
1043
1044 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
1045 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
1046 void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
1047 struct omap_video_timings *timings);
1048 int dpi_check_timings(struct omap_dss_device *dssdev,
1049 struct omap_video_timings *timings);
1050 void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines);
1051
1052 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
1053 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
1054 void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
1055 struct omap_video_timings *timings);
1056 void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
1057
1058 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
1059 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
1060 int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
1061 void *data);
1062 int omap_rfbi_configure(struct omap_dss_device *dssdev);
1063 void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
1064 void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
1065 int pixel_size);
1066 void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
1067 int data_lines);
1068 void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
1069 struct rfbi_timings *timings);
1070
1071 int omapdss_compat_init(void);
1072 void omapdss_compat_uninit(void);
1073
1074 struct dss_mgr_ops {
1075 int (*connect)(struct omap_overlay_manager *mgr,
1076 struct omap_dss_device *dst);
1077 void (*disconnect)(struct omap_overlay_manager *mgr,
1078 struct omap_dss_device *dst);
1079
1080 void (*start_update)(struct omap_overlay_manager *mgr);
1081 int (*enable)(struct omap_overlay_manager *mgr);
1082 void (*disable)(struct omap_overlay_manager *mgr);
1083 void (*set_timings)(struct omap_overlay_manager *mgr,
1084 const struct omap_video_timings *timings);
1085 void (*set_lcd_config)(struct omap_overlay_manager *mgr,
1086 const struct dss_lcd_mgr_config *config);
1087 int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
1088 void (*handler)(void *), void *data);
1089 void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
1090 void (*handler)(void *), void *data);
1091 };
1092
1093 int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
1094 void dss_uninstall_mgr_ops(void);
1095
1096 int dss_mgr_connect(struct omap_overlay_manager *mgr,
1097 struct omap_dss_device *dst);
1098 void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
1099 struct omap_dss_device *dst);
1100 void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
1101 const struct omap_video_timings *timings);
1102 void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
1103 const struct dss_lcd_mgr_config *config);
1104 int dss_mgr_enable(struct omap_overlay_manager *mgr);
1105 void dss_mgr_disable(struct omap_overlay_manager *mgr);
1106 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
1107 int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
1108 void (*handler)(void *), void *data);
1109 void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
1110 void (*handler)(void *), void *data);
1111
1112 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
1113 {
1114 return dssdev->output;
1115 }
1116
1117 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
1118 {
1119 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
1120 }
1121
1122 #endif
Linux with added FPC-III support