2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
30 #include <linux/slab.h>
31 #include <linux/bitops.h>
34 #include <linux/kvm_host.h>
37 #define pr_pic_unimpl(fmt, ...) \
38 pr_err_ratelimited("kvm: pic: " fmt, ## __VA_ARGS__)
40 static void pic_irq_request(struct kvm
*kvm
, int level
);
42 static void pic_lock(struct kvm_pic
*s
)
48 static void pic_unlock(struct kvm_pic
*s
)
51 bool wakeup
= s
->wakeup_needed
;
52 struct kvm_vcpu
*vcpu
;
55 s
->wakeup_needed
= false;
57 spin_unlock(&s
->lock
);
60 kvm_for_each_vcpu(i
, vcpu
, s
->kvm
) {
61 if (kvm_apic_accept_pic_intr(vcpu
)) {
62 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
70 static void pic_clear_isr(struct kvm_kpic_state
*s
, int irq
)
72 s
->isr
&= ~(1 << irq
);
73 if (s
!= &s
->pics_state
->pics
[0])
76 * We are dropping lock while calling ack notifiers since ack
77 * notifier callbacks for assigned devices call into PIC recursively.
78 * Other interrupt may be delivered to PIC while lock is dropped but
79 * it should be safe since PIC state is already updated at this stage.
81 pic_unlock(s
->pics_state
);
82 kvm_notify_acked_irq(s
->pics_state
->kvm
, SELECT_PIC(irq
), irq
);
83 pic_lock(s
->pics_state
);
87 * set irq level. If an edge is detected, then the IRR is set to 1
89 static inline int pic_set_irq1(struct kvm_kpic_state
*s
, int irq
, int level
)
93 if (s
->elcr
& mask
) /* level triggered */
95 ret
= !(s
->irr
& mask
);
100 s
->last_irr
&= ~mask
;
102 else /* edge triggered */
104 if ((s
->last_irr
& mask
) == 0) {
105 ret
= !(s
->irr
& mask
);
110 s
->last_irr
&= ~mask
;
112 return (s
->imr
& mask
) ? -1 : ret
;
116 * return the highest priority found in mask (highest = smallest
117 * number). Return 8 if no irq
119 static inline int get_priority(struct kvm_kpic_state
*s
, int mask
)
125 while ((mask
& (1 << ((priority
+ s
->priority_add
) & 7))) == 0)
131 * return the pic wanted interrupt. return -1 if none
133 static int pic_get_irq(struct kvm_kpic_state
*s
)
135 int mask
, cur_priority
, priority
;
137 mask
= s
->irr
& ~s
->imr
;
138 priority
= get_priority(s
, mask
);
142 * compute current priority. If special fully nested mode on the
143 * master, the IRQ coming from the slave is not taken into account
144 * for the priority computation.
147 if (s
->special_fully_nested_mode
&& s
== &s
->pics_state
->pics
[0])
149 cur_priority
= get_priority(s
, mask
);
150 if (priority
< cur_priority
)
152 * higher priority found: an irq should be generated
154 return (priority
+ s
->priority_add
) & 7;
160 * raise irq to CPU if necessary. must be called every time the active
163 static void pic_update_irq(struct kvm_pic
*s
)
167 irq2
= pic_get_irq(&s
->pics
[1]);
170 * if irq request by slave pic, signal master PIC
172 pic_set_irq1(&s
->pics
[0], 2, 1);
173 pic_set_irq1(&s
->pics
[0], 2, 0);
175 irq
= pic_get_irq(&s
->pics
[0]);
176 pic_irq_request(s
->kvm
, irq
>= 0);
179 void kvm_pic_update_irq(struct kvm_pic
*s
)
186 int kvm_pic_set_irq(struct kvm_pic
*s
, int irq
, int irq_source_id
, int level
)
190 BUG_ON(irq
< 0 || irq
>= PIC_NUM_PINS
);
193 irq_level
= __kvm_irq_line_state(&s
->irq_states
[irq
],
194 irq_source_id
, level
);
195 ret
= pic_set_irq1(&s
->pics
[irq
>> 3], irq
& 7, irq_level
);
197 trace_kvm_pic_set_irq(irq
>> 3, irq
& 7, s
->pics
[irq
>> 3].elcr
,
198 s
->pics
[irq
>> 3].imr
, ret
== 0);
204 void kvm_pic_clear_all(struct kvm_pic
*s
, int irq_source_id
)
209 for (i
= 0; i
< PIC_NUM_PINS
; i
++)
210 __clear_bit(irq_source_id
, &s
->irq_states
[i
]);
215 * acknowledge interrupt 'irq'
217 static inline void pic_intack(struct kvm_kpic_state
*s
, int irq
)
221 * We don't clear a level sensitive interrupt here
223 if (!(s
->elcr
& (1 << irq
)))
224 s
->irr
&= ~(1 << irq
);
227 if (s
->rotate_on_auto_eoi
)
228 s
->priority_add
= (irq
+ 1) & 7;
229 pic_clear_isr(s
, irq
);
234 int kvm_pic_read_irq(struct kvm
*kvm
)
236 int irq
, irq2
, intno
;
237 struct kvm_pic
*s
= kvm
->arch
.vpic
;
242 irq
= pic_get_irq(&s
->pics
[0]);
244 pic_intack(&s
->pics
[0], irq
);
246 irq2
= pic_get_irq(&s
->pics
[1]);
248 pic_intack(&s
->pics
[1], irq2
);
251 * spurious IRQ on slave controller
254 intno
= s
->pics
[1].irq_base
+ irq2
;
257 intno
= s
->pics
[0].irq_base
+ irq
;
260 * spurious IRQ on host controller
263 intno
= s
->pics
[0].irq_base
+ irq
;
271 static void kvm_pic_reset(struct kvm_kpic_state
*s
)
274 struct kvm_vcpu
*vcpu
;
275 u8 edge_irr
= s
->irr
& ~s
->elcr
;
283 s
->read_reg_select
= 0;
285 s
->special_fully_nested_mode
= 0;
290 kvm_for_each_vcpu(i
, vcpu
, s
->pics_state
->kvm
)
291 if (kvm_apic_accept_pic_intr(vcpu
)) {
300 for (irq
= 0; irq
< PIC_NUM_PINS
/2; irq
++)
301 if (edge_irr
& (1 << irq
))
302 pic_clear_isr(s
, irq
);
305 static void pic_ioport_write(void *opaque
, u32 addr
, u32 val
)
307 struct kvm_kpic_state
*s
= opaque
;
308 int priority
, cmd
, irq
;
315 pr_pic_unimpl("single mode not supported");
318 "level sensitive irq not supported");
320 } else if (val
& 0x08) {
324 s
->read_reg_select
= val
& 1;
326 s
->special_mask
= (val
>> 5) & 1;
332 s
->rotate_on_auto_eoi
= cmd
>> 2;
334 case 1: /* end of interrupt */
336 priority
= get_priority(s
, s
->isr
);
338 irq
= (priority
+ s
->priority_add
) & 7;
340 s
->priority_add
= (irq
+ 1) & 7;
341 pic_clear_isr(s
, irq
);
342 pic_update_irq(s
->pics_state
);
347 pic_clear_isr(s
, irq
);
348 pic_update_irq(s
->pics_state
);
351 s
->priority_add
= (val
+ 1) & 7;
352 pic_update_irq(s
->pics_state
);
356 s
->priority_add
= (irq
+ 1) & 7;
357 pic_clear_isr(s
, irq
);
358 pic_update_irq(s
->pics_state
);
361 break; /* no operation */
365 switch (s
->init_state
) {
366 case 0: { /* normal mode */
367 u8 imr_diff
= s
->imr
^ val
,
368 off
= (s
== &s
->pics_state
->pics
[0]) ? 0 : 8;
370 for (irq
= 0; irq
< PIC_NUM_PINS
/2; irq
++)
371 if (imr_diff
& (1 << irq
))
372 kvm_fire_mask_notifiers(
374 SELECT_PIC(irq
+ off
),
376 !!(s
->imr
& (1 << irq
)));
377 pic_update_irq(s
->pics_state
);
381 s
->irq_base
= val
& 0xf8;
391 s
->special_fully_nested_mode
= (val
>> 4) & 1;
392 s
->auto_eoi
= (val
>> 1) & 1;
398 static u32
pic_poll_read(struct kvm_kpic_state
*s
, u32 addr1
)
402 ret
= pic_get_irq(s
);
405 s
->pics_state
->pics
[0].isr
&= ~(1 << 2);
406 s
->pics_state
->pics
[0].irr
&= ~(1 << 2);
408 s
->irr
&= ~(1 << ret
);
409 pic_clear_isr(s
, ret
);
410 if (addr1
>> 7 || ret
!= 2)
411 pic_update_irq(s
->pics_state
);
414 pic_update_irq(s
->pics_state
);
420 static u32
pic_ioport_read(void *opaque
, u32 addr
)
422 struct kvm_kpic_state
*s
= opaque
;
426 ret
= pic_poll_read(s
, addr
);
430 if (s
->read_reg_select
)
439 static void elcr_ioport_write(void *opaque
, u32 addr
, u32 val
)
441 struct kvm_kpic_state
*s
= opaque
;
442 s
->elcr
= val
& s
->elcr_mask
;
445 static u32
elcr_ioport_read(void *opaque
, u32 addr1
)
447 struct kvm_kpic_state
*s
= opaque
;
451 static int picdev_write(struct kvm_pic
*s
,
452 gpa_t addr
, int len
, const void *val
)
454 unsigned char data
= *(unsigned char *)val
;
457 pr_pic_unimpl("non byte write\n");
466 pic_ioport_write(&s
->pics
[addr
>> 7], addr
, data
);
472 elcr_ioport_write(&s
->pics
[addr
& 1], addr
, data
);
481 static int picdev_read(struct kvm_pic
*s
,
482 gpa_t addr
, int len
, void *val
)
484 unsigned char *data
= (unsigned char *)val
;
488 pr_pic_unimpl("non byte read\n");
497 *data
= pic_ioport_read(&s
->pics
[addr
>> 7], addr
);
503 *data
= elcr_ioport_read(&s
->pics
[addr
& 1], addr
);
512 static int picdev_master_write(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*dev
,
513 gpa_t addr
, int len
, const void *val
)
515 return picdev_write(container_of(dev
, struct kvm_pic
, dev_master
),
519 static int picdev_master_read(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*dev
,
520 gpa_t addr
, int len
, void *val
)
522 return picdev_read(container_of(dev
, struct kvm_pic
, dev_master
),
526 static int picdev_slave_write(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*dev
,
527 gpa_t addr
, int len
, const void *val
)
529 return picdev_write(container_of(dev
, struct kvm_pic
, dev_slave
),
533 static int picdev_slave_read(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*dev
,
534 gpa_t addr
, int len
, void *val
)
536 return picdev_read(container_of(dev
, struct kvm_pic
, dev_slave
),
540 static int picdev_eclr_write(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*dev
,
541 gpa_t addr
, int len
, const void *val
)
543 return picdev_write(container_of(dev
, struct kvm_pic
, dev_eclr
),
547 static int picdev_eclr_read(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*dev
,
548 gpa_t addr
, int len
, void *val
)
550 return picdev_read(container_of(dev
, struct kvm_pic
, dev_eclr
),
555 * callback when PIC0 irq status changed
557 static void pic_irq_request(struct kvm
*kvm
, int level
)
559 struct kvm_pic
*s
= kvm
->arch
.vpic
;
562 s
->wakeup_needed
= true;
566 static const struct kvm_io_device_ops picdev_master_ops
= {
567 .read
= picdev_master_read
,
568 .write
= picdev_master_write
,
571 static const struct kvm_io_device_ops picdev_slave_ops
= {
572 .read
= picdev_slave_read
,
573 .write
= picdev_slave_write
,
576 static const struct kvm_io_device_ops picdev_eclr_ops
= {
577 .read
= picdev_eclr_read
,
578 .write
= picdev_eclr_write
,
581 int kvm_pic_init(struct kvm
*kvm
)
586 s
= kzalloc(sizeof(struct kvm_pic
), GFP_KERNEL_ACCOUNT
);
589 spin_lock_init(&s
->lock
);
591 s
->pics
[0].elcr_mask
= 0xf8;
592 s
->pics
[1].elcr_mask
= 0xde;
593 s
->pics
[0].pics_state
= s
;
594 s
->pics
[1].pics_state
= s
;
597 * Initialize PIO device
599 kvm_iodevice_init(&s
->dev_master
, &picdev_master_ops
);
600 kvm_iodevice_init(&s
->dev_slave
, &picdev_slave_ops
);
601 kvm_iodevice_init(&s
->dev_eclr
, &picdev_eclr_ops
);
602 mutex_lock(&kvm
->slots_lock
);
603 ret
= kvm_io_bus_register_dev(kvm
, KVM_PIO_BUS
, 0x20, 2,
608 ret
= kvm_io_bus_register_dev(kvm
, KVM_PIO_BUS
, 0xa0, 2, &s
->dev_slave
);
612 ret
= kvm_io_bus_register_dev(kvm
, KVM_PIO_BUS
, 0x4d0, 2, &s
->dev_eclr
);
616 mutex_unlock(&kvm
->slots_lock
);
623 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
, &s
->dev_slave
);
626 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
, &s
->dev_master
);
629 mutex_unlock(&kvm
->slots_lock
);
636 void kvm_pic_destroy(struct kvm
*kvm
)
638 struct kvm_pic
*vpic
= kvm
->arch
.vpic
;
643 mutex_lock(&kvm
->slots_lock
);
644 kvm_io_bus_unregister_dev(vpic
->kvm
, KVM_PIO_BUS
, &vpic
->dev_master
);
645 kvm_io_bus_unregister_dev(vpic
->kvm
, KVM_PIO_BUS
, &vpic
->dev_slave
);
646 kvm_io_bus_unregister_dev(vpic
->kvm
, KVM_PIO_BUS
, &vpic
->dev_eclr
);
647 mutex_unlock(&kvm
->slots_lock
);
649 kvm
->arch
.vpic
= NULL
;