arch/mips/kernel/elf.c

   1 /*
   2  * Copyright (C) 2014 Imagination Technologies
   3  * Author: Paul Burton <paul.burton@mips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10
  11 #include <linux/binfmts.h>
  12 #include <linux/elf.h>
  13 #include <linux/export.h>
  14 #include <linux/sched.h>
  15
  16 #include <asm/cpu-features.h>
  17 #include <asm/cpu-info.h>
  18
  19 /* Whether to accept legacy-NaN and 2008-NaN user binaries.  */
  20 bool mips_use_nan_legacy;
  21 bool mips_use_nan_2008;
  22
  23 /* FPU modes */
  24 enum {
  25         FP_FRE,
  26         FP_FR0,
  27         FP_FR1,
  28 };
  29
  30 /**
  31  * struct mode_req - ABI FPU mode requirements
  32  * @single:     The program being loaded needs an FPU but it will only issue
  33  *              single precision instructions meaning that it can execute in
  34  *              either FR0 or FR1.
  35  * @soft:       The soft(-float) requirement means that the program being
  36  *              loaded needs has no FPU dependency at all (i.e. it has no
  37  *              FPU instructions).
  38  * @fr1:        The program being loaded depends on FPU being in FR=1 mode.
  39  * @frdefault:  The program being loaded depends on the default FPU mode.
  40  *              That is FR0 for O32 and FR1 for N32/N64.
  41  * @fre:        The program being loaded depends on FPU with FRE=1. This mode is
  42  *              a bridge which uses FR=1 whilst still being able to maintain
  43  *              full compatibility with pre-existing code using the O32 FP32
  44  *              ABI.
  45  *
  46  * More information about the FP ABIs can be found here:
  47  *
  48  * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
  49  *
  50  */
  51
  52 struct mode_req {
  53         bool single;
  54         bool soft;
  55         bool fr1;
  56         bool frdefault;
  57         bool fre;
  58 };
  59
  60 static const struct mode_req fpu_reqs[] = {
  61         [MIPS_ABI_FP_ANY]    = { true,  true,  true,  true,  true  },
  62         [MIPS_ABI_FP_DOUBLE] = { false, false, false, true,  true  },
  63         [MIPS_ABI_FP_SINGLE] = { true,  false, false, false, false },
  64         [MIPS_ABI_FP_SOFT]   = { false, true,  false, false, false },
  65         [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
  66         [MIPS_ABI_FP_XX]     = { false, false, true,  true,  true  },
  67         [MIPS_ABI_FP_64]     = { false, false, true,  false, false },
  68         [MIPS_ABI_FP_64A]    = { false, false, true,  false, true  }
  69 };
  70
  71 /*
  72  * Mode requirements when .MIPS.abiflags is not present in the ELF.
  73  * Not present means that everything is acceptable except FR1.
  74  */
  75 static struct mode_req none_req = { true, true, false, true, true };
  76
  77 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
  78                      bool is_interp, struct arch_elf_state *state)
  79 {
  80         union {
  81                 struct elf32_hdr e32;
  82                 struct elf64_hdr e64;
  83         } *ehdr = _ehdr;
  84         struct elf32_phdr *phdr32 = _phdr;
  85         struct elf64_phdr *phdr64 = _phdr;
  86         struct mips_elf_abiflags_v0 abiflags;
  87         bool elf32;
  88         u32 flags;
  89         int ret;
  90         loff_t pos;
  91
  92         elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
  93         flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
  94
  95         /* Let's see if this is an O32 ELF */
  96         if (elf32) {
  97                 if (flags & EF_MIPS_FP64) {
  98                         /*
  99                          * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
 100                          * later if needed
 101                          */
 102                         if (is_interp)
 103                                 state->interp_fp_abi = MIPS_ABI_FP_OLD_64;
 104                         else
 105                                 state->fp_abi = MIPS_ABI_FP_OLD_64;
 106                 }
 107                 if (phdr32->p_type != PT_MIPS_ABIFLAGS)
 108                         return 0;
 109
 110                 if (phdr32->p_filesz < sizeof(abiflags))
 111                         return -EINVAL;
 112                 pos = phdr32->p_offset;
 113         } else {
 114                 if (phdr64->p_type != PT_MIPS_ABIFLAGS)
 115                         return 0;
 116                 if (phdr64->p_filesz < sizeof(abiflags))
 117                         return -EINVAL;
 118                 pos = phdr64->p_offset;
 119         }
 120
 121         ret = kernel_read(elf, &abiflags, sizeof(abiflags), &pos);
 122         if (ret < 0)
 123                 return ret;
 124         if (ret != sizeof(abiflags))
 125                 return -EIO;
 126
 127         /* Record the required FP ABIs for use by mips_check_elf */
 128         if (is_interp)
 129                 state->interp_fp_abi = abiflags.fp_abi;
 130         else
 131                 state->fp_abi = abiflags.fp_abi;
 132
 133         return 0;
 134 }
 135
 136 int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
 137                    struct arch_elf_state *state)
 138 {
 139         union {
 140                 struct elf32_hdr e32;
 141                 struct elf64_hdr e64;
 142         } *ehdr = _ehdr;
 143         union {
 144                 struct elf32_hdr e32;
 145                 struct elf64_hdr e64;
 146         } *iehdr = _interp_ehdr;
 147         struct mode_req prog_req, interp_req;
 148         int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
 149         bool elf32;
 150         u32 flags;
 151
 152         elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
 153         flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
 154
 155         /*
 156          * Determine the NaN personality, reject the binary if not allowed.
 157          * Also ensure that any interpreter matches the executable.
 158          */
 159         if (flags & EF_MIPS_NAN2008) {
 160                 if (mips_use_nan_2008)
 161                         state->nan_2008 = 1;
 162                 else
 163                         return -ENOEXEC;
 164         } else {
 165                 if (mips_use_nan_legacy)
 166                         state->nan_2008 = 0;
 167                 else
 168                         return -ENOEXEC;
 169         }
 170         if (has_interpreter) {
 171                 bool ielf32;
 172                 u32 iflags;
 173
 174                 ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
 175                 iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags;
 176
 177                 if ((flags ^ iflags) & EF_MIPS_NAN2008)
 178                         return -ELIBBAD;
 179         }
 180
 181         if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
 182                 return 0;
 183
 184         fp_abi = state->fp_abi;
 185
 186         if (has_interpreter) {
 187                 interp_fp_abi = state->interp_fp_abi;
 188
 189                 abi0 = min(fp_abi, interp_fp_abi);
 190                 abi1 = max(fp_abi, interp_fp_abi);
 191         } else {
 192                 abi0 = abi1 = fp_abi;
 193         }
 194
 195         if (elf32 && !(flags & EF_MIPS_ABI2)) {
 196                 /* Default to a mode capable of running code expecting FR=0 */
 197                 state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
 198
 199                 /* Allow all ABIs we know about */
 200                 max_abi = MIPS_ABI_FP_64A;
 201         } else {
 202                 /* MIPS64 code always uses FR=1, thus the default is easy */
 203                 state->overall_fp_mode = FP_FR1;
 204
 205                 /* Disallow access to the various FPXX & FP64 ABIs */
 206                 max_abi = MIPS_ABI_FP_SOFT;
 207         }
 208
 209         if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
 210             (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
 211                 return -ELIBBAD;
 212
 213         /* It's time to determine the FPU mode requirements */
 214         prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
 215         interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
 216
 217         /*
 218          * Check whether the program's and interp's ABIs have a matching FPU
 219          * mode requirement.
 220          */
 221         prog_req.single = interp_req.single && prog_req.single;
 222         prog_req.soft = interp_req.soft && prog_req.soft;
 223         prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
 224         prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
 225         prog_req.fre = interp_req.fre && prog_req.fre;
 226
 227         /*
 228          * Determine the desired FPU mode
 229          *
 230          * Decision making:
 231          *
 232          * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This
 233          *   means that we have a combination of program and interpreter
 234          *   that inherently require the hybrid FP mode.
 235          * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
 236          *   fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
 237          *   instructions so we don't care about the mode. We will simply use
 238          *   the one preferred by the hardware. In fpxx case, that ABI can
 239          *   handle both FR=1 and FR=0, so, again, we simply choose the one
 240          *   preferred by the hardware. Next, if we only use single-precision
 241          *   FPU instructions, and the default ABI FPU mode is not good
 242          *   (ie single + any ABI combination), we set again the FPU mode to the
 243          *   one is preferred by the hardware. Next, if we know that the code
 244          *   will only use single-precision instructions, shown by single being
 245          *   true but frdefault being false, then we again set the FPU mode to
 246          *   the one that is preferred by the hardware.
 247          * - We want FP_FR1 if that's the only matching mode and the default one
 248          *   is not good.
 249          * - Return with -ELIBADD if we can't find a matching FPU mode.
 250          */
 251         if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
 252                 state->overall_fp_mode = FP_FRE;
 253         else if ((prog_req.fr1 && prog_req.frdefault) ||
 254                  (prog_req.single && !prog_req.frdefault))
 255                 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
 256                 state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
 257                                           cpu_has_mips_r2_r6) ?
 258                                           FP_FR1 : FP_FR0;
 259         else if (prog_req.fr1)
 260                 state->overall_fp_mode = FP_FR1;
 261         else  if (!prog_req.fre && !prog_req.frdefault &&
 262                   !prog_req.fr1 && !prog_req.single && !prog_req.soft)
 263                 return -ELIBBAD;
 264
 265         return 0;
 266 }
 267
 268 static inline void set_thread_fp_mode(int hybrid, int regs32)
 269 {
 270         if (hybrid)
 271                 set_thread_flag(TIF_HYBRID_FPREGS);
 272         else
 273                 clear_thread_flag(TIF_HYBRID_FPREGS);
 274         if (regs32)
 275                 set_thread_flag(TIF_32BIT_FPREGS);
 276         else
 277                 clear_thread_flag(TIF_32BIT_FPREGS);
 278 }
 279
 280 void mips_set_personality_fp(struct arch_elf_state *state)
 281 {
 282         /*
 283          * This function is only ever called for O32 ELFs so we should
 284          * not be worried about N32/N64 binaries.
 285          */
 286
 287         if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
 288                 return;
 289
 290         switch (state->overall_fp_mode) {
 291         case FP_FRE:
 292                 set_thread_fp_mode(1, 0);
 293                 break;
 294         case FP_FR0:
 295                 set_thread_fp_mode(0, 1);
 296                 break;
 297         case FP_FR1:
 298                 set_thread_fp_mode(0, 0);
 299                 break;
 300         default:
 301                 BUG();
 302         }
 303 }
 304
 305 /*
 306  * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode
 307  * in FCSR according to the ELF NaN personality.
 308  */
 309 void mips_set_personality_nan(struct arch_elf_state *state)
 310 {
 311         struct cpuinfo_mips *c = &boot_cpu_data;
 312         struct task_struct *t = current;
 313
 314         t->thread.fpu.fcr31 = c->fpu_csr31;
 315         switch (state->nan_2008) {
 316         case 0:
 317                 break;
 318         case 1:
 319                 if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
 320                         t->thread.fpu.fcr31 |= FPU_CSR_NAN2008;
 321                 if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
 322                         t->thread.fpu.fcr31 |= FPU_CSR_ABS2008;
 323                 break;
 324         default:
 325                 BUG();
 326         }
 327 }
 328
 329 int mips_elf_read_implies_exec(void *elf_ex, int exstack)
 330 {
 331         if (exstack != EXSTACK_DISABLE_X) {
 332                 /* The binary doesn't request a non-executable stack */
 333                 return 1;
 334         }
 335
 336         if (!cpu_has_rixi) {
 337                 /* The CPU doesn't support non-executable memory */
 338                 return 1;
 339         }
 340
 341         return 0;
 342 }
 343 EXPORT_SYMBOL(mips_elf_read_implies_exec);