2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
12 #include <asm/asmmacro.h>
13 #include <asm/compiler.h>
14 #include <asm/irqflags.h>
15 #include <asm/regdef.h>
16 #include <asm/mipsregs.h>
17 #include <asm/stackframe.h>
18 #include <asm/isadep.h>
19 #include <asm/thread_info.h>
22 #ifndef CONFIG_PREEMPT
23 #define resume_kernel restore_all
25 #define __ret_from_irq ret_from_exception
30 #ifndef CONFIG_PREEMPT
31 FEXPORT(ret_from_exception)
32 local_irq_disable # preempt stop
36 LONG_S s0, TI_REGS($28)
37 FEXPORT(__ret_from_irq)
39 * We can be coming here from a syscall done in the kernel space,
40 * e.g. a failed kernel_execve().
42 resume_userspace_check:
43 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
45 beqz t0, resume_kernel
48 local_irq_disable # make sure we dont miss an
49 # interrupt setting need_resched
50 # between sampling and return
51 LONG_L a2, TI_FLAGS($28) # current->work
52 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
59 lw t0, TI_PRE_COUNT($28)
62 LONG_L t0, TI_FLAGS($28)
63 andi t1, t0, _TIF_NEED_RESCHED
65 LONG_L t0, PT_STATUS(sp) # Interrupts off?
68 jal preempt_schedule_irq
72 FEXPORT(ret_from_kernel_thread)
73 jal schedule_tail # a0 = struct task_struct *prev
78 FEXPORT(ret_from_fork)
79 jal schedule_tail # a0 = struct task_struct *prev
82 #ifdef CONFIG_DEBUG_RSEQ
86 local_irq_disable # make sure need_resched and
87 # signals dont change between
89 LONG_L a2, TI_FLAGS($28) # current->work
90 li t0, _TIF_ALLWORK_MASK
92 bnez t0, syscall_exit_work
94 restore_all: # restore full frame
99 restore_partial: # restore partial frame
100 #ifdef CONFIG_TRACE_IRQFLAGS
104 LONG_L v0, PT_STATUS(sp)
105 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
111 jal trace_hardirqs_on
113 1: jal trace_hardirqs_off
124 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
125 beqz t0, work_notifysig
130 local_irq_disable # make sure need_resched and
131 # signals dont change between
132 # sampling and return
133 LONG_L a2, TI_FLAGS($28)
134 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
135 # other than syscall tracing?
137 andi t0, a2, _TIF_NEED_RESCHED
138 bnez t0, work_resched
140 work_notifysig: # deal with pending signals and
141 # notify-resume requests
144 jal do_notify_resume # a2 already loaded
145 j resume_userspace_check
147 FEXPORT(syscall_exit_partial)
148 #ifdef CONFIG_DEBUG_RSEQ
152 local_irq_disable # make sure need_resched doesn't
153 # change between and return
154 LONG_L a2, TI_FLAGS($28) # current->work
155 li t0, _TIF_ALLWORK_MASK
157 beqz t0, restore_partial
160 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
162 beqz t0, resume_kernel
163 li t0, _TIF_WORK_SYSCALL_EXIT
164 and t0, a2 # a2 is preloaded with TI_FLAGS
165 beqz t0, work_pending # trace bit set?
166 local_irq_enable # could let syscall_trace_leave()
167 # call schedule() instead
170 jal syscall_trace_leave
173 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
174 defined(CONFIG_MIPS_MT)
177 * MIPS32R2 Instruction Hazard Barrier - must be called
179 * For C code use the inline version named instruction_hazard().
182 .set MIPS_ISA_LEVEL_RAW
187 #endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */