1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h>
3 #include <asm/thread_info.h>
5 #define PAGE_SIZE _PAGE_SIZE
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
13 #include <asm-generic/vmlinux.lds.h>
20 text PT_LOAD FLAGS(7); /* RWX */
21 #ifndef CONFIG_CAVIUM_OCTEON_SOC
22 note PT_NOTE FLAGS(4); /* R__ */
23 #endif /* CAVIUM_OCTEON_SOC */
27 #ifdef CONFIG_CPU_LITTLE_ENDIAN
30 jiffies = jiffies_64 + 4;
38 #ifdef CONFIG_BOOT_ELF64
39 /* Read-only sections, merged into text segment: */
40 /* . = 0xc000000000000000; */
42 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
43 /* . = 0xc00000000001c000; */
45 /* Set the vaddr for the text segment to a value
46 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
47 * >= 0xa800 0000 0030 0000 otherwise
50 /* . = 0xa800000000300000; */
51 . = 0xffffffff80300000;
53 . = VMLINUX_LOAD_ADDRESS;
55 _text = .; /* Text and read-only data */
68 _etext = .; /* End of text section */
72 /* Exception table for data bus errors */
74 __start___dbe_table = .;
76 __stop___dbe_table = .;
79 #ifdef CONFIG_CAVIUM_OCTEON_SOC
81 #else /* CONFIG_CAVIUM_OCTEON_SOC */
82 #define NOTES_HEADER :note
83 #endif /* CONFIG_CAVIUM_OCTEON_SOC */
84 NOTES :text NOTES_HEADER
85 .dummy : { *(.dummy) } :text
87 _sdata = .; /* Start of data section */
92 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
94 INIT_TASK_DATA(THREAD_SIZE)
96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
109 /* We want the small data sections together, so single-instruction offsets
110 can access them all, and initialized data all before uninitialized, so
111 we can shorten the on-disk segment size. */
115 _edata = .; /* End of data section */
117 /* will be freed after init */
118 . = ALIGN(PAGE_SIZE); /* Init code and data */
120 INIT_TEXT_SECTION(PAGE_SIZE)
121 INIT_DATA_SECTION(16)
124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
125 __mips_machines_start = .;
126 *(.mips.machines.init)
127 __mips_machines_end = .;
130 /* .exit.text is discarded at runtime, not link time, to deal with
131 * references from .rodata
140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
143 #ifdef CONFIG_RELOCATABLE
147 _relocation_start = .;
149 * Space for relocation table
150 * This needs to be filled so that the
151 * relocs tool can overwrite the content.
152 * An invalid value is left at the start of the
153 * section to abort relocation if the table
154 * has not been filled in.
158 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
163 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
165 /* leave space for appended DTB */
167 #elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
168 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
170 KEEP(*(.appended_dtb))
174 * Align to 64K in attempt to eliminate holes before the
175 * .bss..swapper_pg_dir section at the start of .bss. This
176 * also satisfies PAGE_SIZE alignment as the largest page size
181 /* freed after init ends here */
184 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
185 * gets that alignment. .sbss should be empty, so there will be
186 * no holes after __init_end. */
187 BSS_SECTION(0, 0x10000, 8)
191 /* These mark the ABI of the kernel for debuggers. */
193 KEEP(*(.mdebug.abi32))
196 KEEP(*(.mdebug.abi64))
199 /* This is the MIPS specific mdebug section. */
207 /* These must appear regardless of . */
217 /* Sections to be discarded */
220 /* ABI crap starts here */