drivers/watchdog/pm8916_wdt.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/bitops.h>
   3 #include <linux/interrupt.h>
   4 #include <linux/kernel.h>
   5 #include <linux/module.h>
   6 #include <linux/of.h>
   7 #include <linux/property.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/regmap.h>
  10 #include <linux/watchdog.h>
  11
  12 #define PON_INT_RT_STS                  0x10
  13 #define PMIC_WD_BARK_STS_BIT            BIT(6)
  14
  15 #define PON_PMIC_WD_RESET_S1_TIMER      0x54
  16 #define PON_PMIC_WD_RESET_S2_TIMER      0x55
  17
  18 #define PON_PMIC_WD_RESET_S2_CTL        0x56
  19 #define RESET_TYPE_WARM                 0x01
  20 #define RESET_TYPE_SHUTDOWN             0x04
  21 #define RESET_TYPE_HARD                 0x07
  22
  23 #define PON_PMIC_WD_RESET_S2_CTL2       0x57
  24 #define S2_RESET_EN_BIT                 BIT(7)
  25
  26 #define PON_PMIC_WD_RESET_PET           0x58
  27 #define WATCHDOG_PET_BIT                BIT(0)
  28
  29 #define PM8916_WDT_DEFAULT_TIMEOUT      32
  30 #define PM8916_WDT_MIN_TIMEOUT          1
  31 #define PM8916_WDT_MAX_TIMEOUT          127
  32
  33 struct pm8916_wdt {
  34         struct regmap *regmap;
  35         struct watchdog_device wdev;
  36         u32 baseaddr;
  37 };
  38
  39 static int pm8916_wdt_start(struct watchdog_device *wdev)
  40 {
  41         struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
  42
  43         return regmap_update_bits(wdt->regmap,
  44                                   wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2,
  45                                   S2_RESET_EN_BIT, S2_RESET_EN_BIT);
  46 }
  47
  48 static int pm8916_wdt_stop(struct watchdog_device *wdev)
  49 {
  50         struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
  51
  52         return regmap_update_bits(wdt->regmap,
  53                                   wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2,
  54                                   S2_RESET_EN_BIT, 0);
  55 }
  56
  57 static int pm8916_wdt_ping(struct watchdog_device *wdev)
  58 {
  59         struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
  60
  61         return regmap_update_bits(wdt->regmap,
  62                                   wdt->baseaddr + PON_PMIC_WD_RESET_PET,
  63                                   WATCHDOG_PET_BIT, WATCHDOG_PET_BIT);
  64 }
  65
  66 static int pm8916_wdt_configure_timers(struct watchdog_device *wdev)
  67 {
  68         struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev);
  69         int err;
  70
  71         err = regmap_write(wdt->regmap,
  72                            wdt->baseaddr + PON_PMIC_WD_RESET_S1_TIMER,
  73                            wdev->timeout - wdev->pretimeout);
  74         if (err)
  75                 return err;
  76
  77         return regmap_write(wdt->regmap,
  78                             wdt->baseaddr + PON_PMIC_WD_RESET_S2_TIMER,
  79                             wdev->pretimeout);
  80 }
  81
  82 static int pm8916_wdt_set_timeout(struct watchdog_device *wdev,
  83                                   unsigned int timeout)
  84 {
  85         wdev->timeout = timeout;
  86
  87         return pm8916_wdt_configure_timers(wdev);
  88 }
  89
  90 static int pm8916_wdt_set_pretimeout(struct watchdog_device *wdev,
  91                                      unsigned int pretimeout)
  92 {
  93         wdev->pretimeout = pretimeout;
  94
  95         return pm8916_wdt_configure_timers(wdev);
  96 }
  97
  98 static irqreturn_t pm8916_wdt_isr(int irq, void *arg)
  99 {
 100         struct pm8916_wdt *wdt = arg;
 101         int err, sts;
 102
 103         err = regmap_read(wdt->regmap, wdt->baseaddr + PON_INT_RT_STS, &sts);
 104         if (err)
 105                 return IRQ_HANDLED;
 106
 107         if (sts & PMIC_WD_BARK_STS_BIT)
 108                 watchdog_notify_pretimeout(&wdt->wdev);
 109
 110         return IRQ_HANDLED;
 111 }
 112
 113 static const struct watchdog_info pm8916_wdt_ident = {
 114         .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
 115         .identity = "QCOM PM8916 PON WDT",
 116 };
 117
 118 static const struct watchdog_info pm8916_wdt_pt_ident = {
 119         .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE |
 120                    WDIOF_PRETIMEOUT,
 121         .identity = "QCOM PM8916 PON WDT",
 122 };
 123
 124 static const struct watchdog_ops pm8916_wdt_ops = {
 125         .owner = THIS_MODULE,
 126         .start = pm8916_wdt_start,
 127         .stop = pm8916_wdt_stop,
 128         .ping = pm8916_wdt_ping,
 129         .set_timeout = pm8916_wdt_set_timeout,
 130         .set_pretimeout = pm8916_wdt_set_pretimeout,
 131 };
 132
 133 static int pm8916_wdt_probe(struct platform_device *pdev)
 134 {
 135         struct pm8916_wdt *wdt;
 136         struct device *parent;
 137         int err, irq;
 138
 139         wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
 140         if (!wdt)
 141                 return -ENOMEM;
 142
 143         parent = pdev->dev.parent;
 144
 145         /*
 146          * The pm8916-pon-wdt is a child of the pon device, which is a child
 147          * of the pm8916 mfd device. We want access to the pm8916 registers.
 148          * Retrieve regmap from pm8916 (parent->parent) and base address
 149          * from pm8916-pon (pon).
 150          */
 151         wdt->regmap = dev_get_regmap(parent->parent, NULL);
 152         if (!wdt->regmap) {
 153                 dev_err(&pdev->dev, "failed to locate regmap\n");
 154                 return -ENODEV;
 155         }
 156
 157         err = device_property_read_u32(parent, "reg", &wdt->baseaddr);
 158         if (err) {
 159                 dev_err(&pdev->dev, "failed to get pm8916-pon address\n");
 160                 return err;
 161         }
 162
 163         irq = platform_get_irq(pdev, 0);
 164         if (irq > 0) {
 165                 if (devm_request_irq(&pdev->dev, irq, pm8916_wdt_isr, 0,
 166                                      "pm8916_wdt", wdt))
 167                         irq = 0;
 168         }
 169
 170         /* Configure watchdog to hard-reset mode */
 171         err = regmap_write(wdt->regmap,
 172                            wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL,
 173                            RESET_TYPE_HARD);
 174         if (err) {
 175                 dev_err(&pdev->dev, "failed configure watchdog\n");
 176                 return err;
 177         }
 178
 179         wdt->wdev.info = (irq > 0) ? &pm8916_wdt_pt_ident : &pm8916_wdt_ident,
 180         wdt->wdev.ops = &pm8916_wdt_ops,
 181         wdt->wdev.parent = &pdev->dev;
 182         wdt->wdev.min_timeout = PM8916_WDT_MIN_TIMEOUT;
 183         wdt->wdev.max_timeout = PM8916_WDT_MAX_TIMEOUT;
 184         wdt->wdev.timeout = PM8916_WDT_DEFAULT_TIMEOUT;
 185         wdt->wdev.pretimeout = 0;
 186         watchdog_set_drvdata(&wdt->wdev, wdt);
 187
 188         watchdog_init_timeout(&wdt->wdev, 0, &pdev->dev);
 189         pm8916_wdt_configure_timers(&wdt->wdev);
 190
 191         return devm_watchdog_register_device(&pdev->dev, &wdt->wdev);
 192 }
 193
 194 static const struct of_device_id pm8916_wdt_id_table[] = {
 195         { .compatible = "qcom,pm8916-wdt" },
 196         { }
 197 };
 198 MODULE_DEVICE_TABLE(of, pm8916_wdt_id_table);
 199
 200 static struct platform_driver pm8916_wdt_driver = {
 201         .probe = pm8916_wdt_probe,
 202         .driver = {
 203                 .name = "pm8916-wdt",
 204                 .of_match_table = of_match_ptr(pm8916_wdt_id_table),
 205         },
 206 };
 207 module_platform_driver(pm8916_wdt_driver);
 208
 209 MODULE_AUTHOR("Loic Poulain <loic.poulain@linaro.org>");
 210 MODULE_DESCRIPTION("Qualcomm pm8916 watchdog driver");
 211 MODULE_LICENSE("GPL v2");