2 * Copyright (c) 2012 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
42 #include <linux/uio.h>
43 #include <linux/jiffies.h>
44 #include <asm/pgtable.h>
45 #include <linux/delay.h>
46 #include <linux/export.h>
49 #include "qib_common.h"
50 #include "qib_user_sdma.h"
53 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
55 static int qib_open(struct inode
*, struct file
*);
56 static int qib_close(struct inode
*, struct file
*);
57 static ssize_t
qib_write(struct file
*, const char __user
*, size_t, loff_t
*);
58 static ssize_t
qib_aio_write(struct kiocb
*, const struct iovec
*,
59 unsigned long, loff_t
);
60 static unsigned int qib_poll(struct file
*, struct poll_table_struct
*);
61 static int qib_mmapf(struct file
*, struct vm_area_struct
*);
63 static const struct file_operations qib_file_ops
= {
66 .aio_write
= qib_aio_write
,
71 .llseek
= noop_llseek
,
75 * Convert kernel virtual addresses to physical addresses so they don't
76 * potentially conflict with the chip addresses used as mmap offsets.
77 * It doesn't really matter what mmap offset we use as long as we can
78 * interpret it correctly.
80 static u64
cvt_kvaddr(void *p
)
85 page
= vmalloc_to_page(p
);
87 paddr
= page_to_pfn(page
) << PAGE_SHIFT
;
92 static int qib_get_base_info(struct file
*fp
, void __user
*ubase
,
95 struct qib_ctxtdata
*rcd
= ctxt_fp(fp
);
97 struct qib_base_info
*kinfo
= NULL
;
98 struct qib_devdata
*dd
= rcd
->dd
;
99 struct qib_pportdata
*ppd
= rcd
->ppd
;
100 unsigned subctxt_cnt
;
104 subctxt_cnt
= rcd
->subctxt_cnt
;
111 master
= !subctxt_fp(fp
);
115 /* If context sharing is not requested, allow the old size structure */
117 sz
-= 7 * sizeof(u64
);
118 if (ubase_size
< sz
) {
123 kinfo
= kzalloc(sizeof(*kinfo
), GFP_KERNEL
);
129 ret
= dd
->f_get_base_info(rcd
, kinfo
);
133 kinfo
->spi_rcvhdr_cnt
= dd
->rcvhdrcnt
;
134 kinfo
->spi_rcvhdrent_size
= dd
->rcvhdrentsize
;
135 kinfo
->spi_tidegrcnt
= rcd
->rcvegrcnt
;
136 kinfo
->spi_rcv_egrbufsize
= dd
->rcvegrbufsize
;
138 * have to mmap whole thing
140 kinfo
->spi_rcv_egrbuftotlen
=
141 rcd
->rcvegrbuf_chunks
* rcd
->rcvegrbuf_size
;
142 kinfo
->spi_rcv_egrperchunk
= rcd
->rcvegrbufs_perchunk
;
143 kinfo
->spi_rcv_egrchunksize
= kinfo
->spi_rcv_egrbuftotlen
/
144 rcd
->rcvegrbuf_chunks
;
145 kinfo
->spi_tidcnt
= dd
->rcvtidcnt
/ subctxt_cnt
;
147 kinfo
->spi_tidcnt
+= dd
->rcvtidcnt
% subctxt_cnt
;
149 * for this use, may be cfgctxts summed over all chips that
150 * are are configured and present
152 kinfo
->spi_nctxts
= dd
->cfgctxts
;
153 /* unit (chip/board) our context is on */
154 kinfo
->spi_unit
= dd
->unit
;
155 kinfo
->spi_port
= ppd
->port
;
156 /* for now, only a single page */
157 kinfo
->spi_tid_maxsize
= PAGE_SIZE
;
160 * Doing this per context, and based on the skip value, etc. This has
161 * to be the actual buffer size, since the protocol code treats it
164 * These have to be set to user addresses in the user code via mmap.
165 * These values are used on return to user code for the mmap target
166 * addresses only. For 32 bit, same 44 bit address problem, so use
167 * the physical address, not virtual. Before 2.6.11, using the
168 * page_address() macro worked, but in 2.6.11, even that returns the
169 * full 64 bit address (upper bits all 1's). So far, using the
170 * physical addresses (or chip offsets, for chip mapping) works, but
171 * no doubt some future kernel release will change that, and we'll be
172 * on to yet another method of dealing with this.
173 * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
174 * since the chips with non-zero rhf_offset don't normally
175 * enable tail register updates to host memory, but for testing,
176 * both can be enabled and used.
178 kinfo
->spi_rcvhdr_base
= (u64
) rcd
->rcvhdrq_phys
;
179 kinfo
->spi_rcvhdr_tailaddr
= (u64
) rcd
->rcvhdrqtailaddr_phys
;
180 kinfo
->spi_rhf_offset
= dd
->rhf_offset
;
181 kinfo
->spi_rcv_egrbufs
= (u64
) rcd
->rcvegr_phys
;
182 kinfo
->spi_pioavailaddr
= (u64
) dd
->pioavailregs_phys
;
183 /* setup per-unit (not port) status area for user programs */
184 kinfo
->spi_status
= (u64
) kinfo
->spi_pioavailaddr
+
185 (char *) ppd
->statusp
-
186 (char *) dd
->pioavailregs_dma
;
187 kinfo
->spi_uregbase
= (u64
) dd
->uregbase
+ dd
->ureg_align
* rcd
->ctxt
;
189 kinfo
->spi_piocnt
= rcd
->piocnt
;
190 kinfo
->spi_piobufbase
= (u64
) rcd
->piobufs
;
191 kinfo
->spi_sendbuf_status
= cvt_kvaddr(rcd
->user_event_mask
);
193 kinfo
->spi_piocnt
= (rcd
->piocnt
/ subctxt_cnt
) +
194 (rcd
->piocnt
% subctxt_cnt
);
195 /* Master's PIO buffers are after all the slave's */
196 kinfo
->spi_piobufbase
= (u64
) rcd
->piobufs
+
198 (rcd
->piocnt
- kinfo
->spi_piocnt
);
200 unsigned slave
= subctxt_fp(fp
) - 1;
202 kinfo
->spi_piocnt
= rcd
->piocnt
/ subctxt_cnt
;
203 kinfo
->spi_piobufbase
= (u64
) rcd
->piobufs
+
204 dd
->palign
* kinfo
->spi_piocnt
* slave
;
208 kinfo
->spi_sendbuf_status
=
209 cvt_kvaddr(&rcd
->user_event_mask
[subctxt_fp(fp
)]);
210 /* only spi_subctxt_* fields should be set in this block! */
211 kinfo
->spi_subctxt_uregbase
= cvt_kvaddr(rcd
->subctxt_uregbase
);
213 kinfo
->spi_subctxt_rcvegrbuf
=
214 cvt_kvaddr(rcd
->subctxt_rcvegrbuf
);
215 kinfo
->spi_subctxt_rcvhdr_base
=
216 cvt_kvaddr(rcd
->subctxt_rcvhdr_base
);
220 * All user buffers are 2KB buffers. If we ever support
221 * giving 4KB buffers to user processes, this will need some
222 * work. Can't use piobufbase directly, because it has
223 * both 2K and 4K buffer base values.
225 kinfo
->spi_pioindex
= (kinfo
->spi_piobufbase
- dd
->pio2k_bufbase
) /
227 kinfo
->spi_pioalign
= dd
->palign
;
228 kinfo
->spi_qpair
= QIB_KD_QP
;
230 * user mode PIO buffers are always 2KB, even when 4KB can
231 * be received, and sent via the kernel; this is ibmaxlen
234 kinfo
->spi_piosize
= dd
->piosize2k
- 2 * sizeof(u32
);
235 kinfo
->spi_mtu
= ppd
->ibmaxlen
; /* maxlen, not ibmtu */
236 kinfo
->spi_ctxt
= rcd
->ctxt
;
237 kinfo
->spi_subctxt
= subctxt_fp(fp
);
238 kinfo
->spi_sw_version
= QIB_KERN_SWVERSION
;
239 kinfo
->spi_sw_version
|= 1U << 31; /* QLogic-built, not kernel.org */
240 kinfo
->spi_hw_version
= dd
->revision
;
243 kinfo
->spi_runtime_flags
|= QIB_RUNTIME_MASTER
;
245 sz
= (ubase_size
< sizeof(*kinfo
)) ? ubase_size
: sizeof(*kinfo
);
246 if (copy_to_user(ubase
, kinfo
, sz
))
254 * qib_tid_update - update a context TID
256 * @fp: the qib device file
257 * @ti: the TID information
259 * The new implementation as of Oct 2004 is that the driver assigns
260 * the tid and returns it to the caller. To reduce search time, we
261 * keep a cursor for each context, walking the shadow tid array to find
262 * one that's not in use.
264 * For now, if we can't allocate the full list, we fail, although
265 * in the long run, we'll allocate as many as we can, and the
266 * caller will deal with that by trying the remaining pages later.
267 * That means that when we fail, we have to mark the tids as not in
268 * use again, in our shadow copy.
270 * It's up to the caller to free the tids when they are done.
271 * We'll unlock the pages as they free them.
273 * Also, right now we are locking one page at a time, but since
274 * the intended use of this routine is for a single group of
275 * virtually contiguous pages, that should change to improve
278 static int qib_tid_update(struct qib_ctxtdata
*rcd
, struct file
*fp
,
279 const struct qib_tid_info
*ti
)
282 u32 tid
, ctxttid
, cnt
, i
, tidcnt
, tidoff
;
284 struct qib_devdata
*dd
= rcd
->dd
;
287 u64 __iomem
*tidbase
;
288 unsigned long tidmap
[8];
289 struct page
**pagep
= NULL
;
290 unsigned subctxt
= subctxt_fp(fp
);
292 if (!dd
->pageshadow
) {
302 ctxttid
= rcd
->ctxt
* dd
->rcvtidcnt
;
303 if (!rcd
->subctxt_cnt
) {
304 tidcnt
= dd
->rcvtidcnt
;
305 tid
= rcd
->tidcursor
;
307 } else if (!subctxt
) {
308 tidcnt
= (dd
->rcvtidcnt
/ rcd
->subctxt_cnt
) +
309 (dd
->rcvtidcnt
% rcd
->subctxt_cnt
);
310 tidoff
= dd
->rcvtidcnt
- tidcnt
;
312 tid
= tidcursor_fp(fp
);
314 tidcnt
= dd
->rcvtidcnt
/ rcd
->subctxt_cnt
;
315 tidoff
= tidcnt
* (subctxt
- 1);
317 tid
= tidcursor_fp(fp
);
320 /* make sure it all fits in tid_pg_list */
321 qib_devinfo(dd
->pcidev
,
322 "Process tried to allocate %u TIDs, only trying max (%u)\n",
326 pagep
= (struct page
**) rcd
->tid_pg_list
;
327 tidlist
= (u16
*) &pagep
[dd
->rcvtidcnt
];
331 memset(tidmap
, 0, sizeof(tidmap
));
332 /* before decrement; chip actual # */
334 tidbase
= (u64 __iomem
*) (((char __iomem
*) dd
->kregbase
) +
336 ctxttid
* sizeof(*tidbase
));
338 /* virtual address of first page in transfer */
339 vaddr
= ti
->tidvaddr
;
340 if (!access_ok(VERIFY_WRITE
, (void __user
*) vaddr
,
345 ret
= qib_get_user_pages(vaddr
, cnt
, pagep
);
349 * We can't continue because the pagep array won't be
350 * initialized. This should never happen,
351 * unless perhaps the user has mpin'ed the pages
354 qib_devinfo(dd
->pcidev
,
355 "Failed to lock addr %p, %u pages: "
356 "errno %d\n", (void *) vaddr
, cnt
, -ret
);
359 for (i
= 0; i
< cnt
; i
++, vaddr
+= PAGE_SIZE
) {
360 for (; ntids
--; tid
++) {
363 if (!dd
->pageshadow
[ctxttid
+ tid
])
368 * Oops, wrapped all the way through their TIDs,
369 * and didn't have enough free; see comments at
372 i
--; /* last tidlist[i] not filled in */
376 tidlist
[i
] = tid
+ tidoff
;
377 /* we "know" system pages and TID pages are same size */
378 dd
->pageshadow
[ctxttid
+ tid
] = pagep
[i
];
379 dd
->physshadow
[ctxttid
+ tid
] =
380 qib_map_page(dd
->pcidev
, pagep
[i
], 0, PAGE_SIZE
,
383 * don't need atomic or it's overhead
385 __set_bit(tid
, tidmap
);
386 physaddr
= dd
->physshadow
[ctxttid
+ tid
];
387 /* PERFORMANCE: below should almost certainly be cached */
388 dd
->f_put_tid(dd
, &tidbase
[tid
],
389 RCVHQ_RCV_TYPE_EXPECTED
, physaddr
);
391 * don't check this tid in qib_ctxtshadow, since we
392 * just filled it in; start with the next one.
400 /* jump here if copy out of updated info failed... */
401 /* same code that's in qib_free_tid() */
402 limit
= sizeof(tidmap
) * BITS_PER_BYTE
;
404 /* just in case size changes in future */
406 tid
= find_first_bit((const unsigned long *)tidmap
, limit
);
407 for (; tid
< limit
; tid
++) {
408 if (!test_bit(tid
, tidmap
))
410 if (dd
->pageshadow
[ctxttid
+ tid
]) {
413 phys
= dd
->physshadow
[ctxttid
+ tid
];
414 dd
->physshadow
[ctxttid
+ tid
] = dd
->tidinvalid
;
415 /* PERFORMANCE: below should almost certainly
418 dd
->f_put_tid(dd
, &tidbase
[tid
],
419 RCVHQ_RCV_TYPE_EXPECTED
,
421 pci_unmap_page(dd
->pcidev
, phys
, PAGE_SIZE
,
423 dd
->pageshadow
[ctxttid
+ tid
] = NULL
;
426 qib_release_user_pages(pagep
, cnt
);
429 * Copy the updated array, with qib_tid's filled in, back
430 * to user. Since we did the copy in already, this "should
431 * never fail" If it does, we have to clean up...
433 if (copy_to_user((void __user
*)
434 (unsigned long) ti
->tidlist
,
435 tidlist
, cnt
* sizeof(*tidlist
))) {
439 if (copy_to_user((void __user
*) (unsigned long) ti
->tidmap
,
440 tidmap
, sizeof tidmap
)) {
446 if (!rcd
->subctxt_cnt
)
447 rcd
->tidcursor
= tid
;
449 tidcursor_fp(fp
) = tid
;
457 * qib_tid_free - free a context TID
459 * @subctxt: the subcontext
462 * right now we are unlocking one page at a time, but since
463 * the intended use of this routine is for a single group of
464 * virtually contiguous pages, that should change to improve
465 * performance. We check that the TID is in range for this context
466 * but otherwise don't check validity; if user has an error and
467 * frees the wrong tid, it's only their own data that can thereby
468 * be corrupted. We do check that the TID was in use, for sanity
469 * We always use our idea of the saved address, not the address that
470 * they pass in to us.
472 static int qib_tid_free(struct qib_ctxtdata
*rcd
, unsigned subctxt
,
473 const struct qib_tid_info
*ti
)
476 u32 tid
, ctxttid
, cnt
, limit
, tidcnt
;
477 struct qib_devdata
*dd
= rcd
->dd
;
478 u64 __iomem
*tidbase
;
479 unsigned long tidmap
[8];
481 if (!dd
->pageshadow
) {
486 if (copy_from_user(tidmap
, (void __user
*)(unsigned long)ti
->tidmap
,
492 ctxttid
= rcd
->ctxt
* dd
->rcvtidcnt
;
493 if (!rcd
->subctxt_cnt
)
494 tidcnt
= dd
->rcvtidcnt
;
496 tidcnt
= (dd
->rcvtidcnt
/ rcd
->subctxt_cnt
) +
497 (dd
->rcvtidcnt
% rcd
->subctxt_cnt
);
498 ctxttid
+= dd
->rcvtidcnt
- tidcnt
;
500 tidcnt
= dd
->rcvtidcnt
/ rcd
->subctxt_cnt
;
501 ctxttid
+= tidcnt
* (subctxt
- 1);
503 tidbase
= (u64 __iomem
*) ((char __iomem
*)(dd
->kregbase
) +
505 ctxttid
* sizeof(*tidbase
));
507 limit
= sizeof(tidmap
) * BITS_PER_BYTE
;
509 /* just in case size changes in future */
511 tid
= find_first_bit(tidmap
, limit
);
512 for (cnt
= 0; tid
< limit
; tid
++) {
514 * small optimization; if we detect a run of 3 or so without
515 * any set, use find_first_bit again. That's mainly to
516 * accelerate the case where we wrapped, so we have some at
517 * the beginning, and some at the end, and a big gap
520 if (!test_bit(tid
, tidmap
))
523 if (dd
->pageshadow
[ctxttid
+ tid
]) {
527 p
= dd
->pageshadow
[ctxttid
+ tid
];
528 dd
->pageshadow
[ctxttid
+ tid
] = NULL
;
529 phys
= dd
->physshadow
[ctxttid
+ tid
];
530 dd
->physshadow
[ctxttid
+ tid
] = dd
->tidinvalid
;
531 /* PERFORMANCE: below should almost certainly be
534 dd
->f_put_tid(dd
, &tidbase
[tid
],
535 RCVHQ_RCV_TYPE_EXPECTED
, dd
->tidinvalid
);
536 pci_unmap_page(dd
->pcidev
, phys
, PAGE_SIZE
,
538 qib_release_user_pages(&p
, 1);
546 * qib_set_part_key - set a partition key
550 * We can have up to 4 active at a time (other than the default, which is
551 * always allowed). This is somewhat tricky, since multiple contexts may set
552 * the same key, so we reference count them, and clean up at exit. All 4
553 * partition keys are packed into a single qlogic_ib register. It's an
554 * error for a process to set the same pkey multiple times. We provide no
555 * mechanism to de-allocate a pkey at this time, we may eventually need to
556 * do that. I've used the atomic operations, and no locking, and only make
557 * a single pass through what's available. This should be more than
558 * adequate for some time. I'll think about spinlocks or the like if and as
561 static int qib_set_part_key(struct qib_ctxtdata
*rcd
, u16 key
)
563 struct qib_pportdata
*ppd
= rcd
->ppd
;
564 int i
, any
= 0, pidx
= -1;
565 u16 lkey
= key
& 0x7FFF;
568 if (lkey
== (QIB_DEFAULT_P_KEY
& 0x7FFF)) {
569 /* nothing to do; this key always valid */
580 * Set the full membership bit, because it has to be
581 * set in the register or the packet, and it seems
582 * cleaner to set in the register than to force all
587 for (i
= 0; i
< ARRAY_SIZE(rcd
->pkeys
); i
++) {
588 if (!rcd
->pkeys
[i
] && pidx
== -1)
590 if (rcd
->pkeys
[i
] == key
) {
599 for (any
= i
= 0; i
< ARRAY_SIZE(ppd
->pkeys
); i
++) {
600 if (!ppd
->pkeys
[i
]) {
604 if (ppd
->pkeys
[i
] == key
) {
605 atomic_t
*pkrefs
= &ppd
->pkeyrefs
[i
];
607 if (atomic_inc_return(pkrefs
) > 1) {
608 rcd
->pkeys
[pidx
] = key
;
613 * lost race, decrement count, catch below
619 if ((ppd
->pkeys
[i
] & 0x7FFF) == lkey
) {
621 * It makes no sense to have both the limited and
622 * full membership PKEY set at the same time since
623 * the unlimited one will disable the limited one.
633 for (any
= i
= 0; i
< ARRAY_SIZE(ppd
->pkeys
); i
++) {
634 if (!ppd
->pkeys
[i
] &&
635 atomic_inc_return(&ppd
->pkeyrefs
[i
]) == 1) {
636 rcd
->pkeys
[pidx
] = key
;
638 (void) ppd
->dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_PKEYS
, 0);
650 * qib_manage_rcvq - manage a context's receive queue
652 * @subctxt: the subcontext
653 * @start_stop: action to carry out
655 * start_stop == 0 disables receive on the context, for use in queue
656 * overflow conditions. start_stop==1 re-enables, to be used to
657 * re-init the software copy of the head register
659 static int qib_manage_rcvq(struct qib_ctxtdata
*rcd
, unsigned subctxt
,
662 struct qib_devdata
*dd
= rcd
->dd
;
663 unsigned int rcvctrl_op
;
667 /* atomically clear receive enable ctxt. */
670 * On enable, force in-memory copy of the tail register to
671 * 0, so that protocol code doesn't have to worry about
672 * whether or not the chip has yet updated the in-memory
673 * copy or not on return from the system call. The chip
674 * always resets it's tail register back to 0 on a
675 * transition from disabled to enabled.
677 if (rcd
->rcvhdrtail_kvaddr
)
678 qib_clear_rcvhdrtail(rcd
);
679 rcvctrl_op
= QIB_RCVCTRL_CTXT_ENB
;
681 rcvctrl_op
= QIB_RCVCTRL_CTXT_DIS
;
682 dd
->f_rcvctrl(rcd
->ppd
, rcvctrl_op
, rcd
->ctxt
);
683 /* always; new head should be equal to new tail; see above */
688 static void qib_clean_part_key(struct qib_ctxtdata
*rcd
,
689 struct qib_devdata
*dd
)
691 int i
, j
, pchanged
= 0;
693 struct qib_pportdata
*ppd
= rcd
->ppd
;
695 /* for debugging only */
696 oldpkey
= (u64
) ppd
->pkeys
[0] |
697 ((u64
) ppd
->pkeys
[1] << 16) |
698 ((u64
) ppd
->pkeys
[2] << 32) |
699 ((u64
) ppd
->pkeys
[3] << 48);
701 for (i
= 0; i
< ARRAY_SIZE(rcd
->pkeys
); i
++) {
704 for (j
= 0; j
< ARRAY_SIZE(ppd
->pkeys
); j
++) {
705 /* check for match independent of the global bit */
706 if ((ppd
->pkeys
[j
] & 0x7fff) !=
707 (rcd
->pkeys
[i
] & 0x7fff))
709 if (atomic_dec_and_test(&ppd
->pkeyrefs
[j
])) {
718 (void) ppd
->dd
->f_set_ib_cfg(ppd
, QIB_IB_CFG_PKEYS
, 0);
721 /* common code for the mappings on dma_alloc_coherent mem */
722 static int qib_mmap_mem(struct vm_area_struct
*vma
, struct qib_ctxtdata
*rcd
,
723 unsigned len
, void *kvaddr
, u32 write_ok
, char *what
)
725 struct qib_devdata
*dd
= rcd
->dd
;
729 if ((vma
->vm_end
- vma
->vm_start
) > len
) {
730 qib_devinfo(dd
->pcidev
,
731 "FAIL on %s: len %lx > %x\n", what
,
732 vma
->vm_end
- vma
->vm_start
, len
);
738 * shared context user code requires rcvhdrq mapped r/w, others
739 * only allowed readonly mapping.
742 if (vma
->vm_flags
& VM_WRITE
) {
743 qib_devinfo(dd
->pcidev
,
744 "%s must be mapped readonly\n", what
);
749 /* don't allow them to later change with mprotect */
750 vma
->vm_flags
&= ~VM_MAYWRITE
;
753 pfn
= virt_to_phys(kvaddr
) >> PAGE_SHIFT
;
754 ret
= remap_pfn_range(vma
, vma
->vm_start
, pfn
,
755 len
, vma
->vm_page_prot
);
757 qib_devinfo(dd
->pcidev
,
758 "%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
759 what
, rcd
->ctxt
, pfn
, len
, ret
);
764 static int mmap_ureg(struct vm_area_struct
*vma
, struct qib_devdata
*dd
,
772 * This is real hardware, so use io_remap. This is the mechanism
773 * for the user process to update the head registers for their ctxt
776 sz
= dd
->flags
& QIB_HAS_HDRSUPP
? 2 * PAGE_SIZE
: PAGE_SIZE
;
777 if ((vma
->vm_end
- vma
->vm_start
) > sz
) {
778 qib_devinfo(dd
->pcidev
,
779 "FAIL mmap userreg: reqlen %lx > PAGE\n",
780 vma
->vm_end
- vma
->vm_start
);
783 phys
= dd
->physaddr
+ ureg
;
784 vma
->vm_page_prot
= pgprot_noncached(vma
->vm_page_prot
);
786 vma
->vm_flags
|= VM_DONTCOPY
| VM_DONTEXPAND
;
787 ret
= io_remap_pfn_range(vma
, vma
->vm_start
,
789 vma
->vm_end
- vma
->vm_start
,
795 static int mmap_piobufs(struct vm_area_struct
*vma
,
796 struct qib_devdata
*dd
,
797 struct qib_ctxtdata
*rcd
,
798 unsigned piobufs
, unsigned piocnt
)
804 * When we map the PIO buffers in the chip, we want to map them as
805 * writeonly, no read possible; unfortunately, x86 doesn't allow
806 * for this in hardware, but we still prevent users from asking
809 if ((vma
->vm_end
- vma
->vm_start
) > (piocnt
* dd
->palign
)) {
810 qib_devinfo(dd
->pcidev
,
811 "FAIL mmap piobufs: reqlen %lx > PAGE\n",
812 vma
->vm_end
- vma
->vm_start
);
817 phys
= dd
->physaddr
+ piobufs
;
819 #if defined(__powerpc__)
820 /* There isn't a generic way to specify writethrough mappings */
821 pgprot_val(vma
->vm_page_prot
) |= _PAGE_NO_CACHE
;
822 pgprot_val(vma
->vm_page_prot
) |= _PAGE_WRITETHRU
;
823 pgprot_val(vma
->vm_page_prot
) &= ~_PAGE_GUARDED
;
827 * don't allow them to later change to readable with mprotect (for when
828 * not initially mapped readable, as is normally the case)
830 vma
->vm_flags
&= ~VM_MAYREAD
;
831 vma
->vm_flags
|= VM_DONTCOPY
| VM_DONTEXPAND
;
834 vma
->vm_page_prot
= pgprot_writecombine(vma
->vm_page_prot
);
836 ret
= io_remap_pfn_range(vma
, vma
->vm_start
, phys
>> PAGE_SHIFT
,
837 vma
->vm_end
- vma
->vm_start
,
843 static int mmap_rcvegrbufs(struct vm_area_struct
*vma
,
844 struct qib_ctxtdata
*rcd
)
846 struct qib_devdata
*dd
= rcd
->dd
;
847 unsigned long start
, size
;
848 size_t total_size
, i
;
852 size
= rcd
->rcvegrbuf_size
;
853 total_size
= rcd
->rcvegrbuf_chunks
* size
;
854 if ((vma
->vm_end
- vma
->vm_start
) > total_size
) {
855 qib_devinfo(dd
->pcidev
,
856 "FAIL on egr bufs: reqlen %lx > actual %lx\n",
857 vma
->vm_end
- vma
->vm_start
,
858 (unsigned long) total_size
);
863 if (vma
->vm_flags
& VM_WRITE
) {
864 qib_devinfo(dd
->pcidev
,
865 "Can't map eager buffers as writable (flags=%lx)\n",
870 /* don't allow them to later change to writeable with mprotect */
871 vma
->vm_flags
&= ~VM_MAYWRITE
;
873 start
= vma
->vm_start
;
875 for (i
= 0; i
< rcd
->rcvegrbuf_chunks
; i
++, start
+= size
) {
876 pfn
= virt_to_phys(rcd
->rcvegrbuf
[i
]) >> PAGE_SHIFT
;
877 ret
= remap_pfn_range(vma
, start
, pfn
, size
,
889 * qib_file_vma_fault - handle a VMA page fault.
891 static int qib_file_vma_fault(struct vm_area_struct
*vma
, struct vm_fault
*vmf
)
895 page
= vmalloc_to_page((void *)(vmf
->pgoff
<< PAGE_SHIFT
));
897 return VM_FAULT_SIGBUS
;
905 static struct vm_operations_struct qib_file_vm_ops
= {
906 .fault
= qib_file_vma_fault
,
909 static int mmap_kvaddr(struct vm_area_struct
*vma
, u64 pgaddr
,
910 struct qib_ctxtdata
*rcd
, unsigned subctxt
)
912 struct qib_devdata
*dd
= rcd
->dd
;
913 unsigned subctxt_cnt
;
919 subctxt_cnt
= rcd
->subctxt_cnt
;
920 size
= rcd
->rcvegrbuf_chunks
* rcd
->rcvegrbuf_size
;
923 * Each process has all the subctxt uregbase, rcvhdrq, and
924 * rcvegrbufs mmapped - as an array for all the processes,
925 * and also separately for this process.
927 if (pgaddr
== cvt_kvaddr(rcd
->subctxt_uregbase
)) {
928 addr
= rcd
->subctxt_uregbase
;
929 size
= PAGE_SIZE
* subctxt_cnt
;
930 } else if (pgaddr
== cvt_kvaddr(rcd
->subctxt_rcvhdr_base
)) {
931 addr
= rcd
->subctxt_rcvhdr_base
;
932 size
= rcd
->rcvhdrq_size
* subctxt_cnt
;
933 } else if (pgaddr
== cvt_kvaddr(rcd
->subctxt_rcvegrbuf
)) {
934 addr
= rcd
->subctxt_rcvegrbuf
;
936 } else if (pgaddr
== cvt_kvaddr(rcd
->subctxt_uregbase
+
937 PAGE_SIZE
* subctxt
)) {
938 addr
= rcd
->subctxt_uregbase
+ PAGE_SIZE
* subctxt
;
940 } else if (pgaddr
== cvt_kvaddr(rcd
->subctxt_rcvhdr_base
+
941 rcd
->rcvhdrq_size
* subctxt
)) {
942 addr
= rcd
->subctxt_rcvhdr_base
+
943 rcd
->rcvhdrq_size
* subctxt
;
944 size
= rcd
->rcvhdrq_size
;
945 } else if (pgaddr
== cvt_kvaddr(&rcd
->user_event_mask
[subctxt
])) {
946 addr
= rcd
->user_event_mask
;
948 } else if (pgaddr
== cvt_kvaddr(rcd
->subctxt_rcvegrbuf
+
950 addr
= rcd
->subctxt_rcvegrbuf
+ size
* subctxt
;
951 /* rcvegrbufs are read-only on the slave */
952 if (vma
->vm_flags
& VM_WRITE
) {
953 qib_devinfo(dd
->pcidev
,
954 "Can't map eager buffers as "
955 "writable (flags=%lx)\n", vma
->vm_flags
);
960 * Don't allow permission to later change to writeable
963 vma
->vm_flags
&= ~VM_MAYWRITE
;
966 len
= vma
->vm_end
- vma
->vm_start
;
972 vma
->vm_pgoff
= (unsigned long) addr
>> PAGE_SHIFT
;
973 vma
->vm_ops
= &qib_file_vm_ops
;
974 vma
->vm_flags
|= VM_DONTEXPAND
| VM_DONTDUMP
;
982 * qib_mmapf - mmap various structures into user space
983 * @fp: the file pointer
986 * We use this to have a shared buffer between the kernel and the user code
987 * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
988 * buffers in the chip. We have the open and close entries so we can bump
989 * the ref count and keep the driver from being unloaded while still mapped.
991 static int qib_mmapf(struct file
*fp
, struct vm_area_struct
*vma
)
993 struct qib_ctxtdata
*rcd
;
994 struct qib_devdata
*dd
;
996 unsigned piobufs
, piocnt
;
1000 if (!rcd
|| !(vma
->vm_flags
& VM_SHARED
)) {
1007 * This is the qib_do_user_init() code, mapping the shared buffers
1008 * and per-context user registers into the user process. The address
1009 * referred to by vm_pgoff is the file offset passed via mmap().
1010 * For shared contexts, this is the kernel vmalloc() address of the
1011 * pages to share with the master.
1012 * For non-shared or master ctxts, this is a physical address.
1013 * We only do one mmap for each space mapped.
1015 pgaddr
= vma
->vm_pgoff
<< PAGE_SHIFT
;
1018 * Check for 0 in case one of the allocations failed, but user
1019 * called mmap anyway.
1027 * Physical addresses must fit in 40 bits for our hardware.
1028 * Check for kernel virtual addresses first, anything else must
1029 * match a HW or memory address.
1031 ret
= mmap_kvaddr(vma
, pgaddr
, rcd
, subctxt_fp(fp
));
1038 ureg
= dd
->uregbase
+ dd
->ureg_align
* rcd
->ctxt
;
1039 if (!rcd
->subctxt_cnt
) {
1040 /* ctxt is not shared */
1041 piocnt
= rcd
->piocnt
;
1042 piobufs
= rcd
->piobufs
;
1043 } else if (!subctxt_fp(fp
)) {
1044 /* caller is the master */
1045 piocnt
= (rcd
->piocnt
/ rcd
->subctxt_cnt
) +
1046 (rcd
->piocnt
% rcd
->subctxt_cnt
);
1047 piobufs
= rcd
->piobufs
+
1048 dd
->palign
* (rcd
->piocnt
- piocnt
);
1050 unsigned slave
= subctxt_fp(fp
) - 1;
1052 /* caller is a slave */
1053 piocnt
= rcd
->piocnt
/ rcd
->subctxt_cnt
;
1054 piobufs
= rcd
->piobufs
+ dd
->palign
* piocnt
* slave
;
1058 ret
= mmap_ureg(vma
, dd
, ureg
);
1059 else if (pgaddr
== piobufs
)
1060 ret
= mmap_piobufs(vma
, dd
, rcd
, piobufs
, piocnt
);
1061 else if (pgaddr
== dd
->pioavailregs_phys
)
1062 /* in-memory copy of pioavail registers */
1063 ret
= qib_mmap_mem(vma
, rcd
, PAGE_SIZE
,
1064 (void *) dd
->pioavailregs_dma
, 0,
1065 "pioavail registers");
1066 else if (pgaddr
== rcd
->rcvegr_phys
)
1067 ret
= mmap_rcvegrbufs(vma
, rcd
);
1068 else if (pgaddr
== (u64
) rcd
->rcvhdrq_phys
)
1070 * The rcvhdrq itself; multiple pages, contiguous
1071 * from an i/o perspective. Shared contexts need
1072 * to map r/w, so we allow writing.
1074 ret
= qib_mmap_mem(vma
, rcd
, rcd
->rcvhdrq_size
,
1075 rcd
->rcvhdrq
, 1, "rcvhdrq");
1076 else if (pgaddr
== (u64
) rcd
->rcvhdrqtailaddr_phys
)
1077 /* in-memory copy of rcvhdrq tail register */
1078 ret
= qib_mmap_mem(vma
, rcd
, PAGE_SIZE
,
1079 rcd
->rcvhdrtail_kvaddr
, 0,
1086 vma
->vm_private_data
= NULL
;
1089 qib_devinfo(dd
->pcidev
,
1090 "mmap Failure %d: off %llx len %lx\n",
1091 -ret
, (unsigned long long)pgaddr
,
1092 vma
->vm_end
- vma
->vm_start
);
1097 static unsigned int qib_poll_urgent(struct qib_ctxtdata
*rcd
,
1099 struct poll_table_struct
*pt
)
1101 struct qib_devdata
*dd
= rcd
->dd
;
1104 poll_wait(fp
, &rcd
->wait
, pt
);
1106 spin_lock_irq(&dd
->uctxt_lock
);
1107 if (rcd
->urgent
!= rcd
->urgent_poll
) {
1108 pollflag
= POLLIN
| POLLRDNORM
;
1109 rcd
->urgent_poll
= rcd
->urgent
;
1112 set_bit(QIB_CTXT_WAITING_URG
, &rcd
->flag
);
1114 spin_unlock_irq(&dd
->uctxt_lock
);
1119 static unsigned int qib_poll_next(struct qib_ctxtdata
*rcd
,
1121 struct poll_table_struct
*pt
)
1123 struct qib_devdata
*dd
= rcd
->dd
;
1126 poll_wait(fp
, &rcd
->wait
, pt
);
1128 spin_lock_irq(&dd
->uctxt_lock
);
1129 if (dd
->f_hdrqempty(rcd
)) {
1130 set_bit(QIB_CTXT_WAITING_RCV
, &rcd
->flag
);
1131 dd
->f_rcvctrl(rcd
->ppd
, QIB_RCVCTRL_INTRAVAIL_ENB
, rcd
->ctxt
);
1134 pollflag
= POLLIN
| POLLRDNORM
;
1135 spin_unlock_irq(&dd
->uctxt_lock
);
1140 static unsigned int qib_poll(struct file
*fp
, struct poll_table_struct
*pt
)
1142 struct qib_ctxtdata
*rcd
;
1148 else if (rcd
->poll_type
== QIB_POLL_TYPE_URGENT
)
1149 pollflag
= qib_poll_urgent(rcd
, fp
, pt
);
1150 else if (rcd
->poll_type
== QIB_POLL_TYPE_ANYRCV
)
1151 pollflag
= qib_poll_next(rcd
, fp
, pt
);
1159 * Check that userland and driver are compatible for subcontexts.
1161 static int qib_compatible_subctxts(int user_swmajor
, int user_swminor
)
1163 /* this code is written long-hand for clarity */
1164 if (QIB_USER_SWMAJOR
!= user_swmajor
) {
1165 /* no promise of compatibility if major mismatch */
1168 if (QIB_USER_SWMAJOR
== 1) {
1169 switch (QIB_USER_SWMINOR
) {
1173 /* no subctxt implementation so cannot be compatible */
1176 /* 3 is only compatible with itself */
1177 return user_swminor
== 3;
1179 /* >= 4 are compatible (or are expected to be) */
1180 return user_swminor
>= 4;
1183 /* make no promises yet for future major versions */
1187 static int init_subctxts(struct qib_devdata
*dd
,
1188 struct qib_ctxtdata
*rcd
,
1189 const struct qib_user_info
*uinfo
)
1192 unsigned num_subctxts
;
1196 * If the user is requesting zero subctxts,
1197 * skip the subctxt allocation.
1199 if (uinfo
->spu_subctxt_cnt
<= 0)
1201 num_subctxts
= uinfo
->spu_subctxt_cnt
;
1203 /* Check for subctxt compatibility */
1204 if (!qib_compatible_subctxts(uinfo
->spu_userversion
>> 16,
1205 uinfo
->spu_userversion
& 0xffff)) {
1206 qib_devinfo(dd
->pcidev
,
1207 "Mismatched user version (%d.%d) and driver "
1208 "version (%d.%d) while context sharing. Ensure "
1209 "that driver and library are from the same "
1211 (int) (uinfo
->spu_userversion
>> 16),
1212 (int) (uinfo
->spu_userversion
& 0xffff),
1213 QIB_USER_SWMAJOR
, QIB_USER_SWMINOR
);
1216 if (num_subctxts
> QLOGIC_IB_MAX_SUBCTXT
) {
1221 rcd
->subctxt_uregbase
= vmalloc_user(PAGE_SIZE
* num_subctxts
);
1222 if (!rcd
->subctxt_uregbase
) {
1226 /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1227 size
= ALIGN(dd
->rcvhdrcnt
* dd
->rcvhdrentsize
*
1228 sizeof(u32
), PAGE_SIZE
) * num_subctxts
;
1229 rcd
->subctxt_rcvhdr_base
= vmalloc_user(size
);
1230 if (!rcd
->subctxt_rcvhdr_base
) {
1235 rcd
->subctxt_rcvegrbuf
= vmalloc_user(rcd
->rcvegrbuf_chunks
*
1236 rcd
->rcvegrbuf_size
*
1238 if (!rcd
->subctxt_rcvegrbuf
) {
1243 rcd
->subctxt_cnt
= uinfo
->spu_subctxt_cnt
;
1244 rcd
->subctxt_id
= uinfo
->spu_subctxt_id
;
1245 rcd
->active_slaves
= 1;
1246 rcd
->redirect_seq_cnt
= 1;
1247 set_bit(QIB_CTXT_MASTER_UNINIT
, &rcd
->flag
);
1251 vfree(rcd
->subctxt_rcvhdr_base
);
1253 vfree(rcd
->subctxt_uregbase
);
1254 rcd
->subctxt_uregbase
= NULL
;
1259 static int setup_ctxt(struct qib_pportdata
*ppd
, int ctxt
,
1260 struct file
*fp
, const struct qib_user_info
*uinfo
)
1262 struct qib_devdata
*dd
= ppd
->dd
;
1263 struct qib_ctxtdata
*rcd
;
1267 rcd
= qib_create_ctxtdata(ppd
, ctxt
);
1270 * Allocate memory for use in qib_tid_update() at open to
1271 * reduce cost of expected send setup per message segment
1274 ptmp
= kmalloc(dd
->rcvtidcnt
* sizeof(u16
) +
1275 dd
->rcvtidcnt
* sizeof(struct page
**),
1278 if (!rcd
|| !ptmp
) {
1280 "Unable to allocate ctxtdata memory, failing open\n");
1284 rcd
->userversion
= uinfo
->spu_userversion
;
1285 ret
= init_subctxts(dd
, rcd
, uinfo
);
1288 rcd
->tid_pg_list
= ptmp
;
1289 rcd
->pid
= current
->pid
;
1290 init_waitqueue_head(&dd
->rcd
[ctxt
]->wait
);
1291 strlcpy(rcd
->comm
, current
->comm
, sizeof(rcd
->comm
));
1293 qib_stats
.sps_ctxts
++;
1299 dd
->rcd
[ctxt
] = NULL
;
1306 static inline int usable(struct qib_pportdata
*ppd
)
1308 struct qib_devdata
*dd
= ppd
->dd
;
1310 return dd
&& (dd
->flags
& QIB_PRESENT
) && dd
->kregbase
&& ppd
->lid
&&
1311 (ppd
->lflags
& QIBL_LINKACTIVE
);
1315 * Select a context on the given device, either using a requested port
1316 * or the port based on the context number.
1318 static int choose_port_ctxt(struct file
*fp
, struct qib_devdata
*dd
, u32 port
,
1319 const struct qib_user_info
*uinfo
)
1321 struct qib_pportdata
*ppd
= NULL
;
1325 if (!usable(dd
->pport
+ port
- 1)) {
1329 ppd
= dd
->pport
+ port
- 1;
1331 for (ctxt
= dd
->first_user_ctxt
; ctxt
< dd
->cfgctxts
&& dd
->rcd
[ctxt
];
1334 if (ctxt
== dd
->cfgctxts
) {
1339 u32 pidx
= ctxt
% dd
->num_pports
;
1340 if (usable(dd
->pport
+ pidx
))
1341 ppd
= dd
->pport
+ pidx
;
1343 for (pidx
= 0; pidx
< dd
->num_pports
&& !ppd
;
1345 if (usable(dd
->pport
+ pidx
))
1346 ppd
= dd
->pport
+ pidx
;
1349 ret
= ppd
? setup_ctxt(ppd
, ctxt
, fp
, uinfo
) : -ENETDOWN
;
1354 static int find_free_ctxt(int unit
, struct file
*fp
,
1355 const struct qib_user_info
*uinfo
)
1357 struct qib_devdata
*dd
= qib_lookup(unit
);
1360 if (!dd
|| (uinfo
->spu_port
&& uinfo
->spu_port
> dd
->num_pports
))
1363 ret
= choose_port_ctxt(fp
, dd
, uinfo
->spu_port
, uinfo
);
1368 static int get_a_ctxt(struct file
*fp
, const struct qib_user_info
*uinfo
,
1371 struct qib_devdata
*udd
= NULL
;
1372 int ret
= 0, devmax
, npresent
, nup
, ndev
, dusable
= 0, i
;
1373 u32 port
= uinfo
->spu_port
, ctxt
;
1375 devmax
= qib_count_units(&npresent
, &nup
);
1385 if (alg
== QIB_PORT_ALG_ACROSS
) {
1386 unsigned inuse
= ~0U;
1387 /* find device (with ACTIVE ports) with fewest ctxts in use */
1388 for (ndev
= 0; ndev
< devmax
; ndev
++) {
1389 struct qib_devdata
*dd
= qib_lookup(ndev
);
1390 unsigned cused
= 0, cfree
= 0, pusable
= 0;
1393 if (port
&& port
<= dd
->num_pports
&&
1394 usable(dd
->pport
+ port
- 1))
1397 for (i
= 0; i
< dd
->num_pports
; i
++)
1398 if (usable(dd
->pport
+ i
))
1402 for (ctxt
= dd
->first_user_ctxt
; ctxt
< dd
->cfgctxts
;
1408 if (pusable
&& cfree
&& cused
< inuse
) {
1414 ret
= choose_port_ctxt(fp
, udd
, port
, uinfo
);
1418 for (ndev
= 0; ndev
< devmax
; ndev
++) {
1419 struct qib_devdata
*dd
= qib_lookup(ndev
);
1421 ret
= choose_port_ctxt(fp
, dd
, port
, uinfo
);
1429 ret
= dusable
? -EBUSY
: -ENETDOWN
;
1435 static int find_shared_ctxt(struct file
*fp
,
1436 const struct qib_user_info
*uinfo
)
1438 int devmax
, ndev
, i
;
1441 devmax
= qib_count_units(NULL
, NULL
);
1443 for (ndev
= 0; ndev
< devmax
; ndev
++) {
1444 struct qib_devdata
*dd
= qib_lookup(ndev
);
1446 /* device portion of usable() */
1447 if (!(dd
&& (dd
->flags
& QIB_PRESENT
) && dd
->kregbase
))
1449 for (i
= dd
->first_user_ctxt
; i
< dd
->cfgctxts
; i
++) {
1450 struct qib_ctxtdata
*rcd
= dd
->rcd
[i
];
1452 /* Skip ctxts which are not yet open */
1453 if (!rcd
|| !rcd
->cnt
)
1455 /* Skip ctxt if it doesn't match the requested one */
1456 if (rcd
->subctxt_id
!= uinfo
->spu_subctxt_id
)
1458 /* Verify the sharing process matches the master */
1459 if (rcd
->subctxt_cnt
!= uinfo
->spu_subctxt_cnt
||
1460 rcd
->userversion
!= uinfo
->spu_userversion
||
1461 rcd
->cnt
>= rcd
->subctxt_cnt
) {
1466 subctxt_fp(fp
) = rcd
->cnt
++;
1467 rcd
->subpid
[subctxt_fp(fp
)] = current
->pid
;
1468 tidcursor_fp(fp
) = 0;
1469 rcd
->active_slaves
|= 1 << subctxt_fp(fp
);
1479 static int qib_open(struct inode
*in
, struct file
*fp
)
1481 /* The real work is performed later in qib_assign_ctxt() */
1482 fp
->private_data
= kzalloc(sizeof(struct qib_filedata
), GFP_KERNEL
);
1483 if (fp
->private_data
) /* no cpu affinity by default */
1484 ((struct qib_filedata
*)fp
->private_data
)->rec_cpu_num
= -1;
1485 return fp
->private_data
? 0 : -ENOMEM
;
1489 * Get ctxt early, so can set affinity prior to memory allocation.
1491 static int qib_assign_ctxt(struct file
*fp
, const struct qib_user_info
*uinfo
)
1495 unsigned swmajor
, swminor
, alg
= QIB_PORT_ALG_ACROSS
;
1497 /* Check to be sure we haven't already initialized this file */
1503 /* for now, if major version is different, bail */
1504 swmajor
= uinfo
->spu_userversion
>> 16;
1505 if (swmajor
!= QIB_USER_SWMAJOR
) {
1510 swminor
= uinfo
->spu_userversion
& 0xffff;
1512 if (swminor
>= 11 && uinfo
->spu_port_alg
< QIB_PORT_ALG_COUNT
)
1513 alg
= uinfo
->spu_port_alg
;
1515 mutex_lock(&qib_mutex
);
1517 if (qib_compatible_subctxts(swmajor
, swminor
) &&
1518 uinfo
->spu_subctxt_cnt
) {
1519 ret
= find_shared_ctxt(fp
, uinfo
);
1527 i_minor
= iminor(fp
->f_dentry
->d_inode
) - QIB_USER_MINOR_BASE
;
1529 ret
= find_free_ctxt(i_minor
- 1, fp
, uinfo
);
1531 ret
= get_a_ctxt(fp
, uinfo
, alg
);
1535 struct qib_filedata
*fd
= fp
->private_data
;
1536 const struct qib_ctxtdata
*rcd
= fd
->rcd
;
1537 const struct qib_devdata
*dd
= rcd
->dd
;
1538 unsigned int weight
;
1540 if (dd
->flags
& QIB_HAS_SEND_DMA
) {
1541 fd
->pq
= qib_user_sdma_queue_create(&dd
->pcidev
->dev
,
1550 * If process has NOT already set it's affinity, select and
1551 * reserve a processor for it, as a rendezvous for all
1552 * users of the driver. If they don't actually later
1553 * set affinity to this cpu, or set it to some other cpu,
1554 * it just means that sooner or later we don't recommend
1555 * a cpu, and let the scheduler do it's best.
1557 weight
= cpumask_weight(tsk_cpus_allowed(current
));
1558 if (!ret
&& weight
>= qib_cpulist_count
) {
1560 cpu
= find_first_zero_bit(qib_cpulist
,
1562 if (cpu
!= qib_cpulist_count
) {
1563 __set_bit(cpu
, qib_cpulist
);
1564 fd
->rec_cpu_num
= cpu
;
1566 } else if (weight
== 1 &&
1567 test_bit(cpumask_first(tsk_cpus_allowed(current
)),
1569 qib_devinfo(dd
->pcidev
,
1570 "%s PID %u affinity set to cpu %d; already allocated\n",
1571 current
->comm
, current
->pid
,
1572 cpumask_first(tsk_cpus_allowed(current
)));
1575 mutex_unlock(&qib_mutex
);
1582 static int qib_do_user_init(struct file
*fp
,
1583 const struct qib_user_info
*uinfo
)
1586 struct qib_ctxtdata
*rcd
= ctxt_fp(fp
);
1587 struct qib_devdata
*dd
;
1590 /* Subctxts don't need to initialize anything since master did it. */
1591 if (subctxt_fp(fp
)) {
1592 ret
= wait_event_interruptible(rcd
->wait
,
1593 !test_bit(QIB_CTXT_MASTER_UNINIT
, &rcd
->flag
));
1599 /* some ctxts may get extra buffers, calculate that here */
1600 uctxt
= rcd
->ctxt
- dd
->first_user_ctxt
;
1601 if (uctxt
< dd
->ctxts_extrabuf
) {
1602 rcd
->piocnt
= dd
->pbufsctxt
+ 1;
1603 rcd
->pio_base
= rcd
->piocnt
* uctxt
;
1605 rcd
->piocnt
= dd
->pbufsctxt
;
1606 rcd
->pio_base
= rcd
->piocnt
* uctxt
+
1611 * All user buffers are 2KB buffers. If we ever support
1612 * giving 4KB buffers to user processes, this will need some
1613 * work. Can't use piobufbase directly, because it has
1614 * both 2K and 4K buffer base values. So check and handle.
1616 if ((rcd
->pio_base
+ rcd
->piocnt
) > dd
->piobcnt2k
) {
1617 if (rcd
->pio_base
>= dd
->piobcnt2k
) {
1619 "%u:ctxt%u: no 2KB buffers available\n",
1620 dd
->unit
, rcd
->ctxt
);
1624 rcd
->piocnt
= dd
->piobcnt2k
- rcd
->pio_base
;
1625 qib_dev_err(dd
, "Ctxt%u: would use 4KB bufs, using %u\n",
1626 rcd
->ctxt
, rcd
->piocnt
);
1629 rcd
->piobufs
= dd
->pio2k_bufbase
+ rcd
->pio_base
* dd
->palign
;
1630 qib_chg_pioavailkernel(dd
, rcd
->pio_base
, rcd
->piocnt
,
1631 TXCHK_CHG_TYPE_USER
, rcd
);
1633 * try to ensure that processes start up with consistent avail update
1634 * for their own range, at least. If system very quiet, it might
1635 * have the in-memory copy out of date at startup for this range of
1636 * buffers, when a context gets re-used. Do after the chg_pioavail
1637 * and before the rest of setup, so it's "almost certain" the dma
1638 * will have occurred (can't 100% guarantee, but should be many
1639 * decimals of 9s, with this ordering), given how much else happens
1642 dd
->f_sendctrl(dd
->pport
, QIB_SENDCTRL_AVAIL_BLIP
);
1645 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1646 * array for time being. If rcd->ctxt > chip-supported,
1647 * we need to do extra stuff here to handle by handling overflow
1648 * through ctxt 0, someday
1650 ret
= qib_create_rcvhdrq(dd
, rcd
);
1652 ret
= qib_setup_eagerbufs(rcd
);
1656 rcd
->tidcursor
= 0; /* start at beginning after open */
1658 /* initialize poll variables... */
1660 rcd
->urgent_poll
= 0;
1663 * Now enable the ctxt for receive.
1664 * For chips that are set to DMA the tail register to memory
1665 * when they change (and when the update bit transitions from
1666 * 0 to 1. So for those chips, we turn it off and then back on.
1667 * This will (very briefly) affect any other open ctxts, but the
1668 * duration is very short, and therefore isn't an issue. We
1669 * explicitly set the in-memory tail copy to 0 beforehand, so we
1670 * don't have to wait to be sure the DMA update has happened
1671 * (chip resets head/tail to 0 on transition to enable).
1673 if (rcd
->rcvhdrtail_kvaddr
)
1674 qib_clear_rcvhdrtail(rcd
);
1676 dd
->f_rcvctrl(rcd
->ppd
, QIB_RCVCTRL_CTXT_ENB
| QIB_RCVCTRL_TIDFLOW_ENB
,
1679 /* Notify any waiting slaves */
1680 if (rcd
->subctxt_cnt
) {
1681 clear_bit(QIB_CTXT_MASTER_UNINIT
, &rcd
->flag
);
1682 wake_up(&rcd
->wait
);
1687 qib_chg_pioavailkernel(dd
, rcd
->pio_base
, rcd
->piocnt
,
1688 TXCHK_CHG_TYPE_KERN
, rcd
);
1694 * unlock_exptid - unlock any expected TID entries context still had in use
1697 * We don't actually update the chip here, because we do a bulk update
1698 * below, using f_clear_tids.
1700 static void unlock_expected_tids(struct qib_ctxtdata
*rcd
)
1702 struct qib_devdata
*dd
= rcd
->dd
;
1703 int ctxt_tidbase
= rcd
->ctxt
* dd
->rcvtidcnt
;
1704 int i
, cnt
= 0, maxtid
= ctxt_tidbase
+ dd
->rcvtidcnt
;
1706 for (i
= ctxt_tidbase
; i
< maxtid
; i
++) {
1707 struct page
*p
= dd
->pageshadow
[i
];
1713 phys
= dd
->physshadow
[i
];
1714 dd
->physshadow
[i
] = dd
->tidinvalid
;
1715 dd
->pageshadow
[i
] = NULL
;
1716 pci_unmap_page(dd
->pcidev
, phys
, PAGE_SIZE
,
1717 PCI_DMA_FROMDEVICE
);
1718 qib_release_user_pages(&p
, 1);
1723 static int qib_close(struct inode
*in
, struct file
*fp
)
1726 struct qib_filedata
*fd
;
1727 struct qib_ctxtdata
*rcd
;
1728 struct qib_devdata
*dd
;
1729 unsigned long flags
;
1733 mutex_lock(&qib_mutex
);
1735 fd
= fp
->private_data
;
1736 fp
->private_data
= NULL
;
1739 mutex_unlock(&qib_mutex
);
1745 /* ensure all pio buffer writes in progress are flushed */
1748 /* drain user sdma queue */
1750 qib_user_sdma_queue_drain(rcd
->ppd
, fd
->pq
);
1751 qib_user_sdma_queue_destroy(fd
->pq
);
1754 if (fd
->rec_cpu_num
!= -1)
1755 __clear_bit(fd
->rec_cpu_num
, qib_cpulist
);
1759 * XXX If the master closes the context before the slave(s),
1760 * revoke the mmap for the eager receive queue so
1761 * the slave(s) don't wait for receive data forever.
1763 rcd
->active_slaves
&= ~(1 << fd
->subctxt
);
1764 rcd
->subpid
[fd
->subctxt
] = 0;
1765 mutex_unlock(&qib_mutex
);
1769 /* early; no interrupt users after this */
1770 spin_lock_irqsave(&dd
->uctxt_lock
, flags
);
1772 dd
->rcd
[ctxt
] = NULL
;
1775 spin_unlock_irqrestore(&dd
->uctxt_lock
, flags
);
1777 if (rcd
->rcvwait_to
|| rcd
->piowait_to
||
1778 rcd
->rcvnowait
|| rcd
->pionowait
) {
1779 rcd
->rcvwait_to
= 0;
1780 rcd
->piowait_to
= 0;
1788 /* atomically clear receive enable ctxt and intr avail. */
1789 dd
->f_rcvctrl(rcd
->ppd
, QIB_RCVCTRL_CTXT_DIS
|
1790 QIB_RCVCTRL_INTRAVAIL_DIS
, ctxt
);
1792 /* clean up the pkeys for this ctxt user */
1793 qib_clean_part_key(rcd
, dd
);
1794 qib_disarm_piobufs(dd
, rcd
->pio_base
, rcd
->piocnt
);
1795 qib_chg_pioavailkernel(dd
, rcd
->pio_base
,
1796 rcd
->piocnt
, TXCHK_CHG_TYPE_KERN
, NULL
);
1798 dd
->f_clear_tids(dd
, rcd
);
1801 unlock_expected_tids(rcd
);
1802 qib_stats
.sps_ctxts
--;
1806 mutex_unlock(&qib_mutex
);
1807 qib_free_ctxtdata(dd
, rcd
); /* after releasing the mutex */
1814 static int qib_ctxt_info(struct file
*fp
, struct qib_ctxt_info __user
*uinfo
)
1816 struct qib_ctxt_info info
;
1819 struct qib_ctxtdata
*rcd
= ctxt_fp(fp
);
1820 struct qib_filedata
*fd
;
1822 fd
= fp
->private_data
;
1824 info
.num_active
= qib_count_active_units();
1825 info
.unit
= rcd
->dd
->unit
;
1826 info
.port
= rcd
->ppd
->port
;
1827 info
.ctxt
= rcd
->ctxt
;
1828 info
.subctxt
= subctxt_fp(fp
);
1829 /* Number of user ctxts available for this device. */
1830 info
.num_ctxts
= rcd
->dd
->cfgctxts
- rcd
->dd
->first_user_ctxt
;
1831 info
.num_subctxts
= rcd
->subctxt_cnt
;
1832 info
.rec_cpu
= fd
->rec_cpu_num
;
1835 if (copy_to_user(uinfo
, &info
, sz
)) {
1845 static int qib_sdma_get_inflight(struct qib_user_sdma_queue
*pq
,
1846 u32 __user
*inflightp
)
1848 const u32 val
= qib_user_sdma_inflight_counter(pq
);
1850 if (put_user(val
, inflightp
))
1856 static int qib_sdma_get_complete(struct qib_pportdata
*ppd
,
1857 struct qib_user_sdma_queue
*pq
,
1858 u32 __user
*completep
)
1866 err
= qib_user_sdma_make_progress(ppd
, pq
);
1870 val
= qib_user_sdma_complete_counter(pq
);
1871 if (put_user(val
, completep
))
1877 static int disarm_req_delay(struct qib_ctxtdata
*rcd
)
1881 if (!usable(rcd
->ppd
)) {
1884 * if link is down, or otherwise not usable, delay
1885 * the caller up to 30 seconds, so we don't thrash
1886 * in trying to get the chip back to ACTIVE, and
1887 * set flag so they make the call again.
1889 if (rcd
->user_event_mask
) {
1891 * subctxt_cnt is 0 if not shared, so do base
1892 * separately, first, then remaining subctxt, if any
1894 set_bit(_QIB_EVENT_DISARM_BUFS_BIT
,
1895 &rcd
->user_event_mask
[0]);
1896 for (i
= 1; i
< rcd
->subctxt_cnt
; i
++)
1897 set_bit(_QIB_EVENT_DISARM_BUFS_BIT
,
1898 &rcd
->user_event_mask
[i
]);
1900 for (i
= 0; !usable(rcd
->ppd
) && i
< 300; i
++)
1908 * Find all user contexts in use, and set the specified bit in their
1910 * See also find_ctxt() for a similar use, that is specific to send buffers.
1912 int qib_set_uevent_bits(struct qib_pportdata
*ppd
, const int evtbit
)
1914 struct qib_ctxtdata
*rcd
;
1917 unsigned long flags
;
1919 spin_lock_irqsave(&ppd
->dd
->uctxt_lock
, flags
);
1920 for (ctxt
= ppd
->dd
->first_user_ctxt
; ctxt
< ppd
->dd
->cfgctxts
;
1922 rcd
= ppd
->dd
->rcd
[ctxt
];
1925 if (rcd
->user_event_mask
) {
1928 * subctxt_cnt is 0 if not shared, so do base
1929 * separately, first, then remaining subctxt, if any
1931 set_bit(evtbit
, &rcd
->user_event_mask
[0]);
1932 for (i
= 1; i
< rcd
->subctxt_cnt
; i
++)
1933 set_bit(evtbit
, &rcd
->user_event_mask
[i
]);
1938 spin_unlock_irqrestore(&ppd
->dd
->uctxt_lock
, flags
);
1944 * clear the event notifier events for this context.
1945 * For the DISARM_BUFS case, we also take action (this obsoletes
1946 * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
1948 * Other bits don't currently require actions, just atomically clear.
1949 * User process then performs actions appropriate to bit having been
1950 * set, if desired, and checks again in future.
1952 static int qib_user_event_ack(struct qib_ctxtdata
*rcd
, int subctxt
,
1953 unsigned long events
)
1957 for (i
= 0; i
<= _QIB_MAX_EVENT_BIT
; i
++) {
1958 if (!test_bit(i
, &events
))
1960 if (i
== _QIB_EVENT_DISARM_BUFS_BIT
) {
1961 (void)qib_disarm_piobufs_ifneeded(rcd
);
1962 ret
= disarm_req_delay(rcd
);
1964 clear_bit(i
, &rcd
->user_event_mask
[subctxt
]);
1969 static ssize_t
qib_write(struct file
*fp
, const char __user
*data
,
1970 size_t count
, loff_t
*off
)
1972 const struct qib_cmd __user
*ucmd
;
1973 struct qib_ctxtdata
*rcd
;
1974 const void __user
*src
;
1975 size_t consumed
, copy
= 0;
1980 if (count
< sizeof(cmd
.type
)) {
1985 ucmd
= (const struct qib_cmd __user
*) data
;
1987 if (copy_from_user(&cmd
.type
, &ucmd
->type
, sizeof(cmd
.type
))) {
1992 consumed
= sizeof(cmd
.type
);
1995 case QIB_CMD_ASSIGN_CTXT
:
1996 case QIB_CMD_USER_INIT
:
1997 copy
= sizeof(cmd
.cmd
.user_info
);
1998 dest
= &cmd
.cmd
.user_info
;
1999 src
= &ucmd
->cmd
.user_info
;
2002 case QIB_CMD_RECV_CTRL
:
2003 copy
= sizeof(cmd
.cmd
.recv_ctrl
);
2004 dest
= &cmd
.cmd
.recv_ctrl
;
2005 src
= &ucmd
->cmd
.recv_ctrl
;
2008 case QIB_CMD_CTXT_INFO
:
2009 copy
= sizeof(cmd
.cmd
.ctxt_info
);
2010 dest
= &cmd
.cmd
.ctxt_info
;
2011 src
= &ucmd
->cmd
.ctxt_info
;
2014 case QIB_CMD_TID_UPDATE
:
2015 case QIB_CMD_TID_FREE
:
2016 copy
= sizeof(cmd
.cmd
.tid_info
);
2017 dest
= &cmd
.cmd
.tid_info
;
2018 src
= &ucmd
->cmd
.tid_info
;
2021 case QIB_CMD_SET_PART_KEY
:
2022 copy
= sizeof(cmd
.cmd
.part_key
);
2023 dest
= &cmd
.cmd
.part_key
;
2024 src
= &ucmd
->cmd
.part_key
;
2027 case QIB_CMD_DISARM_BUFS
:
2028 case QIB_CMD_PIOAVAILUPD
: /* force an update of PIOAvail reg */
2034 case QIB_CMD_POLL_TYPE
:
2035 copy
= sizeof(cmd
.cmd
.poll_type
);
2036 dest
= &cmd
.cmd
.poll_type
;
2037 src
= &ucmd
->cmd
.poll_type
;
2040 case QIB_CMD_ARMLAUNCH_CTRL
:
2041 copy
= sizeof(cmd
.cmd
.armlaunch_ctrl
);
2042 dest
= &cmd
.cmd
.armlaunch_ctrl
;
2043 src
= &ucmd
->cmd
.armlaunch_ctrl
;
2046 case QIB_CMD_SDMA_INFLIGHT
:
2047 copy
= sizeof(cmd
.cmd
.sdma_inflight
);
2048 dest
= &cmd
.cmd
.sdma_inflight
;
2049 src
= &ucmd
->cmd
.sdma_inflight
;
2052 case QIB_CMD_SDMA_COMPLETE
:
2053 copy
= sizeof(cmd
.cmd
.sdma_complete
);
2054 dest
= &cmd
.cmd
.sdma_complete
;
2055 src
= &ucmd
->cmd
.sdma_complete
;
2058 case QIB_CMD_ACK_EVENT
:
2059 copy
= sizeof(cmd
.cmd
.event_mask
);
2060 dest
= &cmd
.cmd
.event_mask
;
2061 src
= &ucmd
->cmd
.event_mask
;
2070 if ((count
- consumed
) < copy
) {
2074 if (copy_from_user(dest
, src
, copy
)) {
2082 if (!rcd
&& cmd
.type
!= QIB_CMD_ASSIGN_CTXT
) {
2088 case QIB_CMD_ASSIGN_CTXT
:
2089 ret
= qib_assign_ctxt(fp
, &cmd
.cmd
.user_info
);
2094 case QIB_CMD_USER_INIT
:
2095 ret
= qib_do_user_init(fp
, &cmd
.cmd
.user_info
);
2098 ret
= qib_get_base_info(fp
, (void __user
*) (unsigned long)
2099 cmd
.cmd
.user_info
.spu_base_info
,
2100 cmd
.cmd
.user_info
.spu_base_info_size
);
2103 case QIB_CMD_RECV_CTRL
:
2104 ret
= qib_manage_rcvq(rcd
, subctxt_fp(fp
), cmd
.cmd
.recv_ctrl
);
2107 case QIB_CMD_CTXT_INFO
:
2108 ret
= qib_ctxt_info(fp
, (struct qib_ctxt_info __user
*)
2109 (unsigned long) cmd
.cmd
.ctxt_info
);
2112 case QIB_CMD_TID_UPDATE
:
2113 ret
= qib_tid_update(rcd
, fp
, &cmd
.cmd
.tid_info
);
2116 case QIB_CMD_TID_FREE
:
2117 ret
= qib_tid_free(rcd
, subctxt_fp(fp
), &cmd
.cmd
.tid_info
);
2120 case QIB_CMD_SET_PART_KEY
:
2121 ret
= qib_set_part_key(rcd
, cmd
.cmd
.part_key
);
2124 case QIB_CMD_DISARM_BUFS
:
2125 (void)qib_disarm_piobufs_ifneeded(rcd
);
2126 ret
= disarm_req_delay(rcd
);
2129 case QIB_CMD_PIOAVAILUPD
:
2130 qib_force_pio_avail_update(rcd
->dd
);
2133 case QIB_CMD_POLL_TYPE
:
2134 rcd
->poll_type
= cmd
.cmd
.poll_type
;
2137 case QIB_CMD_ARMLAUNCH_CTRL
:
2138 rcd
->dd
->f_set_armlaunch(rcd
->dd
, cmd
.cmd
.armlaunch_ctrl
);
2141 case QIB_CMD_SDMA_INFLIGHT
:
2142 ret
= qib_sdma_get_inflight(user_sdma_queue_fp(fp
),
2143 (u32 __user
*) (unsigned long)
2144 cmd
.cmd
.sdma_inflight
);
2147 case QIB_CMD_SDMA_COMPLETE
:
2148 ret
= qib_sdma_get_complete(rcd
->ppd
,
2149 user_sdma_queue_fp(fp
),
2150 (u32 __user
*) (unsigned long)
2151 cmd
.cmd
.sdma_complete
);
2154 case QIB_CMD_ACK_EVENT
:
2155 ret
= qib_user_event_ack(rcd
, subctxt_fp(fp
),
2156 cmd
.cmd
.event_mask
);
2167 static ssize_t
qib_aio_write(struct kiocb
*iocb
, const struct iovec
*iov
,
2168 unsigned long dim
, loff_t off
)
2170 struct qib_filedata
*fp
= iocb
->ki_filp
->private_data
;
2171 struct qib_ctxtdata
*rcd
= ctxt_fp(iocb
->ki_filp
);
2172 struct qib_user_sdma_queue
*pq
= fp
->pq
;
2177 return qib_user_sdma_writev(rcd
, pq
, iov
, dim
);
2180 static struct class *qib_class
;
2181 static dev_t qib_dev
;
2183 int qib_cdev_init(int minor
, const char *name
,
2184 const struct file_operations
*fops
,
2185 struct cdev
**cdevp
, struct device
**devp
)
2187 const dev_t dev
= MKDEV(MAJOR(qib_dev
), minor
);
2189 struct device
*device
= NULL
;
2192 cdev
= cdev_alloc();
2194 pr_err("Could not allocate cdev for minor %d, %s\n",
2200 cdev
->owner
= THIS_MODULE
;
2202 kobject_set_name(&cdev
->kobj
, name
);
2204 ret
= cdev_add(cdev
, dev
, 1);
2206 pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2211 device
= device_create(qib_class
, NULL
, dev
, NULL
, name
);
2212 if (!IS_ERR(device
))
2214 ret
= PTR_ERR(device
);
2216 pr_err("Could not create device for minor %d, %s (err %d)\n",
2227 void qib_cdev_cleanup(struct cdev
**cdevp
, struct device
**devp
)
2229 struct device
*device
= *devp
;
2232 device_unregister(device
);
2242 static struct cdev
*wildcard_cdev
;
2243 static struct device
*wildcard_device
;
2245 int __init
qib_dev_init(void)
2249 ret
= alloc_chrdev_region(&qib_dev
, 0, QIB_NMINORS
, QIB_DRV_NAME
);
2251 pr_err("Could not allocate chrdev region (err %d)\n", -ret
);
2255 qib_class
= class_create(THIS_MODULE
, "ipath");
2256 if (IS_ERR(qib_class
)) {
2257 ret
= PTR_ERR(qib_class
);
2258 pr_err("Could not create device class (err %d)\n", -ret
);
2259 unregister_chrdev_region(qib_dev
, QIB_NMINORS
);
2266 void qib_dev_cleanup(void)
2269 class_destroy(qib_class
);
2273 unregister_chrdev_region(qib_dev
, QIB_NMINORS
);
2276 static atomic_t user_count
= ATOMIC_INIT(0);
2278 static void qib_user_remove(struct qib_devdata
*dd
)
2280 if (atomic_dec_return(&user_count
) == 0)
2281 qib_cdev_cleanup(&wildcard_cdev
, &wildcard_device
);
2283 qib_cdev_cleanup(&dd
->user_cdev
, &dd
->user_device
);
2286 static int qib_user_add(struct qib_devdata
*dd
)
2291 if (atomic_inc_return(&user_count
) == 1) {
2292 ret
= qib_cdev_init(0, "ipath", &qib_file_ops
,
2293 &wildcard_cdev
, &wildcard_device
);
2298 snprintf(name
, sizeof(name
), "ipath%d", dd
->unit
);
2299 ret
= qib_cdev_init(dd
->unit
+ 1, name
, &qib_file_ops
,
2300 &dd
->user_cdev
, &dd
->user_device
);
2302 qib_user_remove(dd
);
2308 * Create per-unit files in /dev
2310 int qib_device_create(struct qib_devdata
*dd
)
2314 r
= qib_user_add(dd
);
2315 ret
= qib_diag_add(dd
);
2322 * Remove per-unit files in /dev
2323 * void, core kernel returns no errors for this stuff
2325 void qib_device_remove(struct qib_devdata
*dd
)
2327 qib_user_remove(dd
);
2328 qib_diag_remove(dd
);