2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
4 * Copyright (C) 2007 David Brownell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/gpio.h>
22 #include <linux/i2c.h>
23 #include <linux/i2c/pcf857x.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/irqdomain.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
30 #include <linux/of_device.h>
31 #include <linux/slab.h>
32 #include <linux/spinlock.h>
35 static const struct i2c_device_id pcf857x_id
[] = {
52 MODULE_DEVICE_TABLE(i2c
, pcf857x_id
);
55 static const struct of_device_id pcf857x_of_table
[] = {
56 { .compatible
= "nxp,pcf8574" },
57 { .compatible
= "nxp,pcf8574a" },
58 { .compatible
= "nxp,pca8574" },
59 { .compatible
= "nxp,pca9670" },
60 { .compatible
= "nxp,pca9672" },
61 { .compatible
= "nxp,pca9674" },
62 { .compatible
= "nxp,pcf8575" },
63 { .compatible
= "nxp,pca8575" },
64 { .compatible
= "nxp,pca9671" },
65 { .compatible
= "nxp,pca9673" },
66 { .compatible
= "nxp,pca9675" },
67 { .compatible
= "maxim,max7328" },
68 { .compatible
= "maxim,max7329" },
69 { .compatible
= "ti,tca9554" },
72 MODULE_DEVICE_TABLE(of
, pcf857x_of_table
);
76 * The pcf857x, pca857x, and pca967x chips only expose one read and one
77 * write register. Writing a "one" bit (to match the reset state) lets
78 * that pin be used as an input; it's not an open-drain model, but acts
79 * a bit like one. This is described as "quasi-bidirectional"; read the
80 * chip documentation for details.
82 * Many other I2C GPIO expander chips (like the pca953x models) have
83 * more complex register models and more conventional circuitry using
84 * push/pull drivers. They often use the same 0x20..0x27 addresses as
85 * pcf857x parts, making the "legacy" I2C driver model problematic.
88 struct gpio_chip chip
;
89 struct i2c_client
*client
;
90 struct mutex lock
; /* protect 'out' */
91 unsigned out
; /* software latch */
92 unsigned status
; /* current status */
93 unsigned int irq_parent
;
94 unsigned irq_enabled
; /* enabled irqs */
96 int (*write
)(struct i2c_client
*client
, unsigned data
);
97 int (*read
)(struct i2c_client
*client
);
100 /*-------------------------------------------------------------------------*/
102 /* Talk to 8-bit I/O expander */
104 static int i2c_write_le8(struct i2c_client
*client
, unsigned data
)
106 return i2c_smbus_write_byte(client
, data
);
109 static int i2c_read_le8(struct i2c_client
*client
)
111 return (int)i2c_smbus_read_byte(client
);
114 /* Talk to 16-bit I/O expander */
116 static int i2c_write_le16(struct i2c_client
*client
, unsigned word
)
118 u8 buf
[2] = { word
& 0xff, word
>> 8, };
121 status
= i2c_master_send(client
, buf
, 2);
122 return (status
< 0) ? status
: 0;
125 static int i2c_read_le16(struct i2c_client
*client
)
130 status
= i2c_master_recv(client
, buf
, 2);
133 return (buf
[1] << 8) | buf
[0];
136 /*-------------------------------------------------------------------------*/
138 static int pcf857x_input(struct gpio_chip
*chip
, unsigned offset
)
140 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
143 mutex_lock(&gpio
->lock
);
144 gpio
->out
|= (1 << offset
);
145 status
= gpio
->write(gpio
->client
, gpio
->out
);
146 mutex_unlock(&gpio
->lock
);
151 static int pcf857x_get(struct gpio_chip
*chip
, unsigned offset
)
153 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
156 value
= gpio
->read(gpio
->client
);
157 return (value
< 0) ? value
: !!(value
& (1 << offset
));
160 static int pcf857x_output(struct gpio_chip
*chip
, unsigned offset
, int value
)
162 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
163 unsigned bit
= 1 << offset
;
166 mutex_lock(&gpio
->lock
);
171 status
= gpio
->write(gpio
->client
, gpio
->out
);
172 mutex_unlock(&gpio
->lock
);
177 static void pcf857x_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
179 pcf857x_output(chip
, offset
, value
);
182 /*-------------------------------------------------------------------------*/
184 static irqreturn_t
pcf857x_irq(int irq
, void *data
)
186 struct pcf857x
*gpio
= data
;
187 unsigned long change
, i
, status
;
189 status
= gpio
->read(gpio
->client
);
192 * call the interrupt handler iff gpio is used as
193 * interrupt source, just to avoid bad irqs
195 mutex_lock(&gpio
->lock
);
196 change
= (gpio
->status
^ status
) & gpio
->irq_enabled
;
197 gpio
->status
= status
;
198 mutex_unlock(&gpio
->lock
);
200 for_each_set_bit(i
, &change
, gpio
->chip
.ngpio
)
201 handle_nested_irq(irq_find_mapping(gpio
->chip
.irqdomain
, i
));
209 static void noop(struct irq_data
*data
) { }
211 static int pcf857x_irq_set_wake(struct irq_data
*data
, unsigned int on
)
213 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
217 if (gpio
->irq_parent
) {
218 error
= irq_set_irq_wake(gpio
->irq_parent
, on
);
220 dev_dbg(&gpio
->client
->dev
,
221 "irq %u doesn't support irq_set_wake\n",
223 gpio
->irq_parent
= 0;
229 static void pcf857x_irq_enable(struct irq_data
*data
)
231 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
233 gpio
->irq_enabled
|= (1 << data
->hwirq
);
236 static void pcf857x_irq_disable(struct irq_data
*data
)
238 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
240 gpio
->irq_enabled
&= ~(1 << data
->hwirq
);
243 static void pcf857x_irq_bus_lock(struct irq_data
*data
)
245 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
247 mutex_lock(&gpio
->lock
);
250 static void pcf857x_irq_bus_sync_unlock(struct irq_data
*data
)
252 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
254 mutex_unlock(&gpio
->lock
);
257 static struct irq_chip pcf857x_irq_chip
= {
259 .irq_enable
= pcf857x_irq_enable
,
260 .irq_disable
= pcf857x_irq_disable
,
264 .irq_set_wake
= pcf857x_irq_set_wake
,
265 .irq_bus_lock
= pcf857x_irq_bus_lock
,
266 .irq_bus_sync_unlock
= pcf857x_irq_bus_sync_unlock
,
269 /*-------------------------------------------------------------------------*/
271 static int pcf857x_probe(struct i2c_client
*client
,
272 const struct i2c_device_id
*id
)
274 struct pcf857x_platform_data
*pdata
= dev_get_platdata(&client
->dev
);
275 struct device_node
*np
= client
->dev
.of_node
;
276 struct pcf857x
*gpio
;
277 unsigned int n_latch
= 0;
280 if (IS_ENABLED(CONFIG_OF
) && np
)
281 of_property_read_u32(np
, "lines-initial-states", &n_latch
);
283 n_latch
= pdata
->n_latch
;
285 dev_dbg(&client
->dev
, "no platform data\n");
287 /* Allocate, initialize, and register this gpio_chip. */
288 gpio
= devm_kzalloc(&client
->dev
, sizeof(*gpio
), GFP_KERNEL
);
292 mutex_init(&gpio
->lock
);
294 gpio
->chip
.base
= pdata
? pdata
->gpio_base
: -1;
295 gpio
->chip
.can_sleep
= true;
296 gpio
->chip
.parent
= &client
->dev
;
297 gpio
->chip
.owner
= THIS_MODULE
;
298 gpio
->chip
.get
= pcf857x_get
;
299 gpio
->chip
.set
= pcf857x_set
;
300 gpio
->chip
.direction_input
= pcf857x_input
;
301 gpio
->chip
.direction_output
= pcf857x_output
;
302 gpio
->chip
.ngpio
= id
->driver_data
;
304 /* NOTE: the OnSemi jlc1562b is also largely compatible with
305 * these parts, notably for output. It has a low-resolution
306 * DAC instead of pin change IRQs; and its inputs can be the
307 * result of comparators.
310 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
311 * 9670, 9672, 9764, and 9764a use quite a variety.
313 * NOTE: we don't distinguish here between *4 and *4a parts.
315 if (gpio
->chip
.ngpio
== 8) {
316 gpio
->write
= i2c_write_le8
;
317 gpio
->read
= i2c_read_le8
;
319 if (!i2c_check_functionality(client
->adapter
,
320 I2C_FUNC_SMBUS_BYTE
))
323 /* fail if there's no chip present */
325 status
= i2c_smbus_read_byte(client
);
327 /* '75/'75c addresses are 0x20..0x27, just like the '74;
328 * the '75c doesn't have a current source pulling high.
329 * 9671, 9673, and 9765 use quite a variety of addresses.
331 * NOTE: we don't distinguish here between '75 and '75c parts.
333 } else if (gpio
->chip
.ngpio
== 16) {
334 gpio
->write
= i2c_write_le16
;
335 gpio
->read
= i2c_read_le16
;
337 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
))
340 /* fail if there's no chip present */
342 status
= i2c_read_le16(client
);
345 dev_dbg(&client
->dev
, "unsupported number of gpios\n");
352 gpio
->chip
.label
= client
->name
;
354 gpio
->client
= client
;
355 i2c_set_clientdata(client
, gpio
);
357 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
358 * We can't actually know whether a pin is configured (a) as output
359 * and driving the signal low, or (b) as input and reporting a low
360 * value ... without knowing the last value written since the chip
361 * came out of reset (if any). We can't read the latched output.
363 * In short, the only reliable solution for setting up pin direction
364 * is to do it explicitly. The setup() method can do that, but it
365 * may cause transient glitching since it can't know the last value
366 * written (some pins may need to be driven low).
368 * Using n_latch avoids that trouble. When left initialized to zero,
369 * our software copy of the "latch" then matches the chip's all-ones
370 * reset state. Otherwise it flags pins to be driven low.
372 gpio
->out
= ~n_latch
;
373 gpio
->status
= gpio
->out
;
375 status
= devm_gpiochip_add_data(&client
->dev
, &gpio
->chip
, gpio
);
379 /* Enable irqchip if we have an interrupt */
381 status
= gpiochip_irqchip_add(&gpio
->chip
, &pcf857x_irq_chip
,
385 dev_err(&client
->dev
, "cannot add irqchip\n");
389 status
= devm_request_threaded_irq(&client
->dev
, client
->irq
,
390 NULL
, pcf857x_irq
, IRQF_ONESHOT
|
391 IRQF_TRIGGER_FALLING
| IRQF_SHARED
,
392 dev_name(&client
->dev
), gpio
);
396 gpiochip_set_chained_irqchip(&gpio
->chip
, &pcf857x_irq_chip
,
398 gpio
->irq_parent
= client
->irq
;
401 /* Let platform code set up the GPIOs and their users.
402 * Now is the first time anyone could use them.
404 if (pdata
&& pdata
->setup
) {
405 status
= pdata
->setup(client
,
406 gpio
->chip
.base
, gpio
->chip
.ngpio
,
409 dev_warn(&client
->dev
, "setup --> %d\n", status
);
412 dev_info(&client
->dev
, "probed\n");
417 dev_dbg(&client
->dev
, "probe error %d for '%s'\n", status
,
423 static int pcf857x_remove(struct i2c_client
*client
)
425 struct pcf857x_platform_data
*pdata
= dev_get_platdata(&client
->dev
);
426 struct pcf857x
*gpio
= i2c_get_clientdata(client
);
429 if (pdata
&& pdata
->teardown
) {
430 status
= pdata
->teardown(client
,
431 gpio
->chip
.base
, gpio
->chip
.ngpio
,
434 dev_err(&client
->dev
, "%s --> %d\n",
443 static struct i2c_driver pcf857x_driver
= {
446 .of_match_table
= of_match_ptr(pcf857x_of_table
),
448 .probe
= pcf857x_probe
,
449 .remove
= pcf857x_remove
,
450 .id_table
= pcf857x_id
,
453 static int __init
pcf857x_init(void)
455 return i2c_add_driver(&pcf857x_driver
);
457 /* register after i2c postcore initcall and before
458 * subsys initcalls that may rely on these GPIOs
460 subsys_initcall(pcf857x_init
);
462 static void __exit
pcf857x_exit(void)
464 i2c_del_driver(&pcf857x_driver
);
466 module_exit(pcf857x_exit
);
468 MODULE_LICENSE("GPL");
469 MODULE_AUTHOR("David Brownell");