drivers/scsi/qla2xxx/qla_bsg.h

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #ifndef __QLA_BSG_H
   8 #define __QLA_BSG_H
   9
  10 /* BSG Vendor specific commands */
  11 #define QL_VND_LOOPBACK         0x01
  12 #define QL_VND_A84_RESET        0x02
  13 #define QL_VND_A84_UPDATE_FW    0x03
  14 #define QL_VND_A84_MGMT_CMD     0x04
  15 #define QL_VND_IIDMA            0x05
  16 #define QL_VND_FCP_PRIO_CFG_CMD 0x06
  17 #define QL_VND_READ_FLASH       0x07
  18 #define QL_VND_UPDATE_FLASH     0x08
  19 #define QL_VND_SET_FRU_VERSION  0x0B
  20 #define QL_VND_READ_FRU_STATUS  0x0C
  21 #define QL_VND_WRITE_FRU_STATUS 0x0D
  22 #define QL_VND_DIAG_IO_CMD      0x0A
  23 #define QL_VND_WRITE_I2C        0x10
  24 #define QL_VND_READ_I2C         0x11
  25 #define QL_VND_FX00_MGMT_CMD    0x12
  26 #define QL_VND_SERDES_OP        0x13
  27 #define QL_VND_SERDES_OP_EX     0x14
  28 #define QL_VND_GET_FLASH_UPDATE_CAPS    0x15
  29 #define QL_VND_SET_FLASH_UPDATE_CAPS    0x16
  30 #define QL_VND_GET_BBCR_DATA    0x17
  31 #define QL_VND_GET_PRIV_STATS   0x18
  32
  33 /* BSG Vendor specific subcode returns */
  34 #define EXT_STATUS_OK                   0
  35 #define EXT_STATUS_ERR                  1
  36 #define EXT_STATUS_BUSY                 2
  37 #define EXT_STATUS_INVALID_PARAM        6
  38 #define EXT_STATUS_DATA_OVERRUN         7
  39 #define EXT_STATUS_DATA_UNDERRUN        8
  40 #define EXT_STATUS_MAILBOX              11
  41 #define EXT_STATUS_NO_MEMORY            17
  42 #define EXT_STATUS_DEVICE_OFFLINE       22
  43
  44 /*
  45  * To support bidirectional iocb
  46  * BSG Vendor specific returns
  47  */
  48 #define EXT_STATUS_NOT_SUPPORTED        27
  49 #define EXT_STATUS_INVALID_CFG          28
  50 #define EXT_STATUS_DMA_ERR              29
  51 #define EXT_STATUS_TIMEOUT              30
  52 #define EXT_STATUS_THREAD_FAILED        31
  53 #define EXT_STATUS_DATA_CMP_FAILED      32
  54
  55 /* BSG definations for interpreting CommandSent field */
  56 #define INT_DEF_LB_LOOPBACK_CMD         0
  57 #define INT_DEF_LB_ECHO_CMD             1
  58
  59 /* Loopback related definations */
  60 #define INTERNAL_LOOPBACK               0xF1
  61 #define EXTERNAL_LOOPBACK               0xF2
  62 #define ENABLE_INTERNAL_LOOPBACK        0x02
  63 #define ENABLE_EXTERNAL_LOOPBACK        0x04
  64 #define INTERNAL_LOOPBACK_MASK          0x000E
  65 #define MAX_ELS_FRAME_PAYLOAD           252
  66 #define ELS_OPCODE_BYTE                 0x10
  67
  68 /* BSG Vendor specific definations */
  69 #define A84_ISSUE_WRITE_TYPE_CMD        0
  70 #define A84_ISSUE_READ_TYPE_CMD         1
  71 #define A84_CLEANUP_CMD                 2
  72 #define A84_ISSUE_RESET_OP_FW           3
  73 #define A84_ISSUE_RESET_DIAG_FW         4
  74 #define A84_ISSUE_UPDATE_OPFW_CMD       5
  75 #define A84_ISSUE_UPDATE_DIAGFW_CMD     6
  76
  77 struct qla84_mgmt_param {
  78         union {
  79                 struct {
  80                         uint32_t start_addr;
  81                 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
  82                 struct {
  83                         uint32_t id;
  84 #define QLA84_MGMT_CONFIG_ID_UIF        1
  85 #define QLA84_MGMT_CONFIG_ID_FCOE_COS   2
  86 #define QLA84_MGMT_CONFIG_ID_PAUSE      3
  87 #define QLA84_MGMT_CONFIG_ID_TIMEOUTS   4
  88
  89                 uint32_t param0;
  90                 uint32_t param1;
  91         } config; /* for QLA84_MGMT_CHNG_CONFIG */
  92
  93         struct {
  94                 uint32_t type;
  95 #define QLA84_MGMT_INFO_CONFIG_LOG_DATA         1 /* Get Config Log Data */
  96 #define QLA84_MGMT_INFO_LOG_DATA                2 /* Get Log Data */
  97 #define QLA84_MGMT_INFO_PORT_STAT               3 /* Get Port Statistics */
  98 #define QLA84_MGMT_INFO_LIF_STAT                4 /* Get LIF Statistics  */
  99 #define QLA84_MGMT_INFO_ASIC_STAT               5 /* Get ASIC Statistics */
 100 #define QLA84_MGMT_INFO_CONFIG_PARAMS           6 /* Get Config Parameters */
 101 #define QLA84_MGMT_INFO_PANIC_LOG               7 /* Get Panic Log */
 102
 103                 uint32_t context;
 104 /*
 105 * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
 106 */
 107 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG                    0
 108 #define IC_LOG_DATA_LOG_ID_LEARN_LOG                    1
 109 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG           2
 110 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG            3
 111 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG     4
 112 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG      5
 113 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG         6
 114 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG          7
 115 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG               8
 116 #define IC_LOG_DATA_LOG_ID_DCX_LOG                      9
 117
 118 /*
 119 * context definitions for QLA84_MGMT_INFO_PORT_STAT
 120 */
 121 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0   0
 122 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1   1
 123 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0        2
 124 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1        3
 125 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0         4
 126 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1         5
 127
 128
 129 /*
 130 * context definitions for QLA84_MGMT_INFO_LIF_STAT
 131 */
 132 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0     0
 133 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1     1
 134 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0           2
 135 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1           3
 136 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU                6
 137
 138                 } info; /* for QLA84_MGMT_GET_INFO */
 139         } u;
 140 };
 141
 142 struct qla84_msg_mgmt {
 143         uint16_t cmd;
 144 #define QLA84_MGMT_READ_MEM     0x00
 145 #define QLA84_MGMT_WRITE_MEM    0x01
 146 #define QLA84_MGMT_CHNG_CONFIG  0x02
 147 #define QLA84_MGMT_GET_INFO     0x03
 148         uint16_t rsrvd;
 149         struct qla84_mgmt_param mgmtp;/* parameters for cmd */
 150         uint32_t len; /* bytes in payload following this struct */
 151         uint8_t payload[0]; /* payload for cmd */
 152 };
 153
 154 struct qla_bsg_a84_mgmt {
 155         struct qla84_msg_mgmt mgmt;
 156 } __attribute__ ((packed));
 157
 158 struct qla_scsi_addr {
 159         uint16_t bus;
 160         uint16_t target;
 161 } __attribute__ ((packed));
 162
 163 struct qla_ext_dest_addr {
 164         union {
 165                 uint8_t wwnn[8];
 166                 uint8_t wwpn[8];
 167                 uint8_t id[4];
 168                 struct qla_scsi_addr scsi_addr;
 169         } dest_addr;
 170         uint16_t dest_type;
 171 #define EXT_DEF_TYPE_WWPN       2
 172         uint16_t lun;
 173         uint16_t padding[2];
 174 } __attribute__ ((packed));
 175
 176 struct qla_port_param {
 177         struct qla_ext_dest_addr fc_scsi_addr;
 178         uint16_t mode;
 179         uint16_t speed;
 180 } __attribute__ ((packed));
 181
 182
 183 /* FRU VPD */
 184
 185 #define MAX_FRU_SIZE    36
 186
 187 struct qla_field_address {
 188         uint16_t offset;
 189         uint16_t device;
 190         uint16_t option;
 191 } __packed;
 192
 193 struct qla_field_info {
 194         uint8_t version[MAX_FRU_SIZE];
 195 } __packed;
 196
 197 struct qla_image_version {
 198         struct qla_field_address field_address;
 199         struct qla_field_info field_info;
 200 } __packed;
 201
 202 struct qla_image_version_list {
 203         uint32_t count;
 204         struct qla_image_version version[0];
 205 } __packed;
 206
 207 struct qla_status_reg {
 208         struct qla_field_address field_address;
 209         uint8_t status_reg;
 210         uint8_t reserved[7];
 211 } __packed;
 212
 213 struct qla_i2c_access {
 214         uint16_t device;
 215         uint16_t offset;
 216         uint16_t option;
 217         uint16_t length;
 218         uint8_t  buffer[0x40];
 219 } __packed;
 220
 221 /* 26xx serdes register interface */
 222
 223 /* serdes reg commands */
 224 #define INT_SC_SERDES_READ_REG          1
 225 #define INT_SC_SERDES_WRITE_REG         2
 226
 227 struct qla_serdes_reg {
 228         uint16_t cmd;
 229         uint16_t addr;
 230         uint16_t val;
 231 } __packed;
 232
 233 struct qla_serdes_reg_ex {
 234         uint16_t cmd;
 235         uint32_t addr;
 236         uint32_t val;
 237 } __packed;
 238
 239 struct qla_flash_update_caps {
 240         uint64_t  capabilities;
 241         uint32_t  outage_duration;
 242         uint8_t   reserved[20];
 243 } __packed;
 244
 245 /* BB_CR Status */
 246 #define QLA_BBCR_STATUS_DISABLED       0
 247 #define QLA_BBCR_STATUS_ENABLED        1
 248 #define QLA_BBCR_STATUS_UNKNOWN        2
 249
 250 /* BB_CR State */
 251 #define QLA_BBCR_STATE_OFFLINE         0
 252 #define QLA_BBCR_STATE_ONLINE          1
 253
 254 /* BB_CR Offline Reason Code */
 255 #define QLA_BBCR_REASON_PORT_SPEED     1
 256 #define QLA_BBCR_REASON_PEER_PORT      2
 257 #define QLA_BBCR_REASON_SWITCH         3
 258 #define QLA_BBCR_REASON_LOGIN_REJECT   4
 259
 260 struct  qla_bbcr_data {
 261         uint8_t   status;         /* 1 - enabled, 0 - Disabled */
 262         uint8_t   state;          /* 1 - online, 0 - offline */
 263         uint8_t   configured_bbscn;       /* 0-15 */
 264         uint8_t   negotiated_bbscn;       /* 0-15 */
 265         uint8_t   offline_reason_code;
 266         uint16_t  mbx1;                 /* Port state */
 267         uint8_t   reserved[9];
 268 } __packed;
 269 #endif