drivers/scsi/qla2xxx/qla_tmpl.h

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7
   8 #ifndef __QLA_DMP27_H__
   9 #define __QLA_DMP27_H__
  10
  11 #define IOBASE_ADDR     offsetof(struct device_reg_24xx, iobase_addr)
  12
  13 struct __packed qla27xx_fwdt_template {
  14         uint32_t template_type;
  15         uint32_t entry_offset;
  16         uint32_t template_size;
  17         uint32_t reserved_1;
  18
  19         uint32_t entry_count;
  20         uint32_t template_version;
  21         uint32_t capture_timestamp;
  22         uint32_t template_checksum;
  23
  24         uint32_t reserved_2;
  25         uint32_t driver_info[3];
  26
  27         uint32_t saved_state[16];
  28
  29         uint32_t reserved_3[8];
  30         uint32_t firmware_version[5];
  31 };
  32
  33 #define TEMPLATE_TYPE_FWDUMP            99
  34
  35 #define ENTRY_TYPE_NOP                  0
  36 #define ENTRY_TYPE_TMP_END              255
  37 #define ENTRY_TYPE_RD_IOB_T1            256
  38 #define ENTRY_TYPE_WR_IOB_T1            257
  39 #define ENTRY_TYPE_RD_IOB_T2            258
  40 #define ENTRY_TYPE_WR_IOB_T2            259
  41 #define ENTRY_TYPE_RD_PCI               260
  42 #define ENTRY_TYPE_WR_PCI               261
  43 #define ENTRY_TYPE_RD_RAM               262
  44 #define ENTRY_TYPE_GET_QUEUE            263
  45 #define ENTRY_TYPE_GET_FCE              264
  46 #define ENTRY_TYPE_PSE_RISC             265
  47 #define ENTRY_TYPE_RST_RISC             266
  48 #define ENTRY_TYPE_DIS_INTR             267
  49 #define ENTRY_TYPE_GET_HBUF             268
  50 #define ENTRY_TYPE_SCRATCH              269
  51 #define ENTRY_TYPE_RDREMREG             270
  52 #define ENTRY_TYPE_WRREMREG             271
  53 #define ENTRY_TYPE_RDREMRAM             272
  54 #define ENTRY_TYPE_PCICFG               273
  55 #define ENTRY_TYPE_GET_SHADOW           274
  56 #define ENTRY_TYPE_WRITE_BUF            275
  57
  58 #define CAPTURE_FLAG_PHYS_ONLY          BIT_0
  59 #define CAPTURE_FLAG_PHYS_VIRT          BIT_1
  60
  61 #define DRIVER_FLAG_SKIP_ENTRY          BIT_7
  62
  63 struct __packed qla27xx_fwdt_entry {
  64         struct __packed {
  65                 uint32_t entry_type;
  66                 uint32_t entry_size;
  67                 uint32_t reserved_1;
  68
  69                 uint8_t  capture_flags;
  70                 uint8_t  reserved_2[2];
  71                 uint8_t  driver_flags;
  72         } hdr;
  73         union __packed {
  74                 struct __packed {
  75                 } t0;
  76
  77                 struct __packed {
  78                 } t255;
  79
  80                 struct __packed {
  81                         uint32_t base_addr;
  82                         uint8_t  reg_width;
  83                         uint16_t reg_count;
  84                         uint8_t  pci_offset;
  85                 } t256;
  86
  87                 struct __packed {
  88                         uint32_t base_addr;
  89                         uint32_t write_data;
  90                         uint8_t  pci_offset;
  91                         uint8_t  reserved[3];
  92                 } t257;
  93
  94                 struct __packed {
  95                         uint32_t base_addr;
  96                         uint8_t  reg_width;
  97                         uint16_t reg_count;
  98                         uint8_t  pci_offset;
  99                         uint8_t  banksel_offset;
 100                         uint8_t  reserved[3];
 101                         uint32_t bank;
 102                 } t258;
 103
 104                 struct __packed {
 105                         uint32_t base_addr;
 106                         uint32_t write_data;
 107                         uint8_t  reserved[2];
 108                         uint8_t  pci_offset;
 109                         uint8_t  banksel_offset;
 110                         uint32_t bank;
 111                 } t259;
 112
 113                 struct __packed {
 114                         uint8_t pci_offset;
 115                         uint8_t reserved[3];
 116                 } t260;
 117
 118                 struct __packed {
 119                         uint8_t pci_offset;
 120                         uint8_t reserved[3];
 121                         uint32_t write_data;
 122                 } t261;
 123
 124                 struct __packed {
 125                         uint8_t  ram_area;
 126                         uint8_t  reserved[3];
 127                         uint32_t start_addr;
 128                         uint32_t end_addr;
 129                 } t262;
 130
 131                 struct __packed {
 132                         uint32_t num_queues;
 133                         uint8_t  queue_type;
 134                         uint8_t  reserved[3];
 135                 } t263;
 136
 137                 struct __packed {
 138                         uint32_t fce_trace_size;
 139                         uint64_t write_pointer;
 140                         uint64_t base_pointer;
 141                         uint32_t fce_enable_mb0;
 142                         uint32_t fce_enable_mb2;
 143                         uint32_t fce_enable_mb3;
 144                         uint32_t fce_enable_mb4;
 145                         uint32_t fce_enable_mb5;
 146                         uint32_t fce_enable_mb6;
 147                 } t264;
 148
 149                 struct __packed {
 150                 } t265;
 151
 152                 struct __packed {
 153                 } t266;
 154
 155                 struct __packed {
 156                         uint8_t  pci_offset;
 157                         uint8_t  reserved[3];
 158                         uint32_t data;
 159                 } t267;
 160
 161                 struct __packed {
 162                         uint8_t  buf_type;
 163                         uint8_t  reserved[3];
 164                         uint32_t buf_size;
 165                         uint64_t start_addr;
 166                 } t268;
 167
 168                 struct __packed {
 169                         uint32_t scratch_size;
 170                 } t269;
 171
 172                 struct __packed {
 173                         uint32_t addr;
 174                         uint32_t count;
 175                 } t270;
 176
 177                 struct __packed {
 178                         uint32_t addr;
 179                         uint32_t data;
 180                 } t271;
 181
 182                 struct __packed {
 183                         uint32_t addr;
 184                         uint32_t count;
 185                 } t272;
 186
 187                 struct __packed {
 188                         uint32_t addr;
 189                         uint32_t count;
 190                 } t273;
 191
 192                 struct __packed {
 193                         uint32_t num_queues;
 194                         uint8_t  queue_type;
 195                         uint8_t  reserved[3];
 196                 } t274;
 197
 198                 struct __packed {
 199                         uint32_t length;
 200                         uint8_t  buffer[];
 201                 } t275;
 202         };
 203 };
 204
 205 #define T262_RAM_AREA_CRITICAL_RAM      1
 206 #define T262_RAM_AREA_EXTERNAL_RAM      2
 207 #define T262_RAM_AREA_SHARED_RAM        3
 208 #define T262_RAM_AREA_DDR_RAM           4
 209
 210 #define T263_QUEUE_TYPE_REQ             1
 211 #define T263_QUEUE_TYPE_RSP             2
 212 #define T263_QUEUE_TYPE_ATIO            3
 213
 214 #define T268_BUF_TYPE_EXTD_TRACE        1
 215 #define T268_BUF_TYPE_EXCH_BUFOFF       2
 216 #define T268_BUF_TYPE_EXTD_LOGIN        3
 217 #define T268_BUF_TYPE_REQ_MIRROR        4
 218 #define T268_BUF_TYPE_RSP_MIRROR        5
 219
 220 #define T274_QUEUE_TYPE_REQ_SHAD        1
 221 #define T274_QUEUE_TYPE_RSP_SHAD        2
 222 #define T274_QUEUE_TYPE_ATIO_SHAD       3
 223
 224 #endif