xhci: Add missing CAS workaround for Intel Sunrise Point xHCI
[linux/fpc-iii.git] / drivers / gpu / drm / drm_modes.c
blobe14366de0e6eb1e57ec357df25b82d42baa24972
1 /*
2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include <linux/export.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_crtc.h>
38 #include <video/of_videomode.h>
39 #include <video/videomode.h>
40 #include <drm/drm_modes.h>
42 #include "drm_crtc_internal.h"
44 /**
45 * drm_mode_debug_printmodeline - print a mode to dmesg
46 * @mode: mode to print
48 * Describe @mode using DRM_DEBUG.
50 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
53 "0x%x 0x%x\n",
54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
60 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
62 /**
63 * drm_mode_create - create a new display mode
64 * @dev: DRM device
66 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it
67 * and return it.
69 * Returns:
70 * Pointer to new mode on success, NULL on error.
72 struct drm_display_mode *drm_mode_create(struct drm_device *dev)
74 struct drm_display_mode *nmode;
76 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
77 if (!nmode)
78 return NULL;
80 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
81 kfree(nmode);
82 return NULL;
85 return nmode;
87 EXPORT_SYMBOL(drm_mode_create);
89 /**
90 * drm_mode_destroy - remove a mode
91 * @dev: DRM device
92 * @mode: mode to remove
94 * Release @mode's unique ID, then free it @mode structure itself using kfree.
96 void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode)
98 if (!mode)
99 return;
101 drm_mode_object_unregister(dev, &mode->base);
103 kfree(mode);
105 EXPORT_SYMBOL(drm_mode_destroy);
108 * drm_mode_probed_add - add a mode to a connector's probed_mode list
109 * @connector: connector the new mode
110 * @mode: mode data
112 * Add @mode to @connector's probed_mode list for later use. This list should
113 * then in a second step get filtered and all the modes actually supported by
114 * the hardware moved to the @connector's modes list.
116 void drm_mode_probed_add(struct drm_connector *connector,
117 struct drm_display_mode *mode)
119 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
121 list_add_tail(&mode->head, &connector->probed_modes);
123 EXPORT_SYMBOL(drm_mode_probed_add);
126 * drm_cvt_mode -create a modeline based on the CVT algorithm
127 * @dev: drm device
128 * @hdisplay: hdisplay size
129 * @vdisplay: vdisplay size
130 * @vrefresh: vrefresh rate
131 * @reduced: whether to use reduced blanking
132 * @interlaced: whether to compute an interlaced mode
133 * @margins: whether to add margins (borders)
135 * This function is called to generate the modeline based on CVT algorithm
136 * according to the hdisplay, vdisplay, vrefresh.
137 * It is based from the VESA(TM) Coordinated Video Timing Generator by
138 * Graham Loveridge April 9, 2003 available at
139 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
141 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
142 * What I have done is to translate it by using integer calculation.
144 * Returns:
145 * The modeline based on the CVT algorithm stored in a drm_display_mode object.
146 * The display mode object is allocated with drm_mode_create(). Returns NULL
147 * when no mode could be allocated.
149 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
150 int vdisplay, int vrefresh,
151 bool reduced, bool interlaced, bool margins)
153 #define HV_FACTOR 1000
154 /* 1) top/bottom margin size (% of height) - default: 1.8, */
155 #define CVT_MARGIN_PERCENTAGE 18
156 /* 2) character cell horizontal granularity (pixels) - default 8 */
157 #define CVT_H_GRANULARITY 8
158 /* 3) Minimum vertical porch (lines) - default 3 */
159 #define CVT_MIN_V_PORCH 3
160 /* 4) Minimum number of vertical back porch lines - default 6 */
161 #define CVT_MIN_V_BPORCH 6
162 /* Pixel Clock step (kHz) */
163 #define CVT_CLOCK_STEP 250
164 struct drm_display_mode *drm_mode;
165 unsigned int vfieldrate, hperiod;
166 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
167 int interlace;
169 /* allocate the drm_display_mode structure. If failure, we will
170 * return directly
172 drm_mode = drm_mode_create(dev);
173 if (!drm_mode)
174 return NULL;
176 /* the CVT default refresh rate is 60Hz */
177 if (!vrefresh)
178 vrefresh = 60;
180 /* the required field fresh rate */
181 if (interlaced)
182 vfieldrate = vrefresh * 2;
183 else
184 vfieldrate = vrefresh;
186 /* horizontal pixels */
187 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
189 /* determine the left&right borders */
190 hmargin = 0;
191 if (margins) {
192 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
193 hmargin -= hmargin % CVT_H_GRANULARITY;
195 /* find the total active pixels */
196 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
198 /* find the number of lines per field */
199 if (interlaced)
200 vdisplay_rnd = vdisplay / 2;
201 else
202 vdisplay_rnd = vdisplay;
204 /* find the top & bottom borders */
205 vmargin = 0;
206 if (margins)
207 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
209 drm_mode->vdisplay = vdisplay + 2 * vmargin;
211 /* Interlaced */
212 if (interlaced)
213 interlace = 1;
214 else
215 interlace = 0;
217 /* Determine VSync Width from aspect ratio */
218 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
219 vsync = 4;
220 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
221 vsync = 5;
222 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
223 vsync = 6;
224 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
225 vsync = 7;
226 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
227 vsync = 7;
228 else /* custom */
229 vsync = 10;
231 if (!reduced) {
232 /* simplify the GTF calculation */
233 /* 4) Minimum time of vertical sync + back porch interval (µs)
234 * default 550.0
236 int tmp1, tmp2;
237 #define CVT_MIN_VSYNC_BP 550
238 /* 3) Nominal HSync width (% of line period) - default 8 */
239 #define CVT_HSYNC_PERCENTAGE 8
240 unsigned int hblank_percentage;
241 int vsyncandback_porch, vback_porch, hblank;
243 /* estimated the horizontal period */
244 tmp1 = HV_FACTOR * 1000000 -
245 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
246 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
247 interlace;
248 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
250 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
251 /* 9. Find number of lines in sync + backporch */
252 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
253 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
254 else
255 vsyncandback_porch = tmp1;
256 /* 10. Find number of lines in back porch */
257 vback_porch = vsyncandback_porch - vsync;
258 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
259 vsyncandback_porch + CVT_MIN_V_PORCH;
260 /* 5) Definition of Horizontal blanking time limitation */
261 /* Gradient (%/kHz) - default 600 */
262 #define CVT_M_FACTOR 600
263 /* Offset (%) - default 40 */
264 #define CVT_C_FACTOR 40
265 /* Blanking time scaling factor - default 128 */
266 #define CVT_K_FACTOR 128
267 /* Scaling factor weighting - default 20 */
268 #define CVT_J_FACTOR 20
269 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
270 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
271 CVT_J_FACTOR)
272 /* 12. Find ideal blanking duty cycle from formula */
273 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
274 hperiod / 1000;
275 /* 13. Blanking time */
276 if (hblank_percentage < 20 * HV_FACTOR)
277 hblank_percentage = 20 * HV_FACTOR;
278 hblank = drm_mode->hdisplay * hblank_percentage /
279 (100 * HV_FACTOR - hblank_percentage);
280 hblank -= hblank % (2 * CVT_H_GRANULARITY);
281 /* 14. find the total pixels per line */
282 drm_mode->htotal = drm_mode->hdisplay + hblank;
283 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
284 drm_mode->hsync_start = drm_mode->hsync_end -
285 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
286 drm_mode->hsync_start += CVT_H_GRANULARITY -
287 drm_mode->hsync_start % CVT_H_GRANULARITY;
288 /* fill the Vsync values */
289 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
290 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
291 } else {
292 /* Reduced blanking */
293 /* Minimum vertical blanking interval time (µs)- default 460 */
294 #define CVT_RB_MIN_VBLANK 460
295 /* Fixed number of clocks for horizontal sync */
296 #define CVT_RB_H_SYNC 32
297 /* Fixed number of clocks for horizontal blanking */
298 #define CVT_RB_H_BLANK 160
299 /* Fixed number of lines for vertical front porch - default 3*/
300 #define CVT_RB_VFPORCH 3
301 int vbilines;
302 int tmp1, tmp2;
303 /* 8. Estimate Horizontal period. */
304 tmp1 = HV_FACTOR * 1000000 -
305 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
306 tmp2 = vdisplay_rnd + 2 * vmargin;
307 hperiod = tmp1 / (tmp2 * vfieldrate);
308 /* 9. Find number of lines in vertical blanking */
309 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
310 /* 10. Check if vertical blanking is sufficient */
311 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
312 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
313 /* 11. Find total number of lines in vertical field */
314 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
315 /* 12. Find total number of pixels in a line */
316 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
317 /* Fill in HSync values */
318 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
319 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
320 /* Fill in VSync values */
321 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
322 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
324 /* 15/13. Find pixel clock frequency (kHz for xf86) */
325 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
326 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
327 /* 18/16. Find actual vertical frame frequency */
328 /* ignore - just set the mode flag for interlaced */
329 if (interlaced) {
330 drm_mode->vtotal *= 2;
331 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
333 /* Fill the mode line name */
334 drm_mode_set_name(drm_mode);
335 if (reduced)
336 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
337 DRM_MODE_FLAG_NVSYNC);
338 else
339 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
340 DRM_MODE_FLAG_NHSYNC);
342 return drm_mode;
344 EXPORT_SYMBOL(drm_cvt_mode);
347 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm
348 * @dev: drm device
349 * @hdisplay: hdisplay size
350 * @vdisplay: vdisplay size
351 * @vrefresh: vrefresh rate.
352 * @interlaced: whether to compute an interlaced mode
353 * @margins: desired margin (borders) size
354 * @GTF_M: extended GTF formula parameters
355 * @GTF_2C: extended GTF formula parameters
356 * @GTF_K: extended GTF formula parameters
357 * @GTF_2J: extended GTF formula parameters
359 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
360 * in here multiplied by two. For a C of 40, pass in 80.
362 * Returns:
363 * The modeline based on the full GTF algorithm stored in a drm_display_mode object.
364 * The display mode object is allocated with drm_mode_create(). Returns NULL
365 * when no mode could be allocated.
367 struct drm_display_mode *
368 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
369 int vrefresh, bool interlaced, int margins,
370 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
371 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
372 #define GTF_MARGIN_PERCENTAGE 18
373 /* 2) character cell horizontal granularity (pixels) - default 8 */
374 #define GTF_CELL_GRAN 8
375 /* 3) Minimum vertical porch (lines) - default 3 */
376 #define GTF_MIN_V_PORCH 1
377 /* width of vsync in lines */
378 #define V_SYNC_RQD 3
379 /* width of hsync as % of total line */
380 #define H_SYNC_PERCENT 8
381 /* min time of vsync + back porch (microsec) */
382 #define MIN_VSYNC_PLUS_BP 550
383 /* C' and M' are part of the Blanking Duty Cycle computation */
384 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
385 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
386 struct drm_display_mode *drm_mode;
387 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
388 int top_margin, bottom_margin;
389 int interlace;
390 unsigned int hfreq_est;
391 int vsync_plus_bp, vback_porch;
392 unsigned int vtotal_lines, vfieldrate_est, hperiod;
393 unsigned int vfield_rate, vframe_rate;
394 int left_margin, right_margin;
395 unsigned int total_active_pixels, ideal_duty_cycle;
396 unsigned int hblank, total_pixels, pixel_freq;
397 int hsync, hfront_porch, vodd_front_porch_lines;
398 unsigned int tmp1, tmp2;
400 drm_mode = drm_mode_create(dev);
401 if (!drm_mode)
402 return NULL;
404 /* 1. In order to give correct results, the number of horizontal
405 * pixels requested is first processed to ensure that it is divisible
406 * by the character size, by rounding it to the nearest character
407 * cell boundary:
409 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
410 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
412 /* 2. If interlace is requested, the number of vertical lines assumed
413 * by the calculation must be halved, as the computation calculates
414 * the number of vertical lines per field.
416 if (interlaced)
417 vdisplay_rnd = vdisplay / 2;
418 else
419 vdisplay_rnd = vdisplay;
421 /* 3. Find the frame rate required: */
422 if (interlaced)
423 vfieldrate_rqd = vrefresh * 2;
424 else
425 vfieldrate_rqd = vrefresh;
427 /* 4. Find number of lines in Top margin: */
428 top_margin = 0;
429 if (margins)
430 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
431 1000;
432 /* 5. Find number of lines in bottom margin: */
433 bottom_margin = top_margin;
435 /* 6. If interlace is required, then set variable interlace: */
436 if (interlaced)
437 interlace = 1;
438 else
439 interlace = 0;
441 /* 7. Estimate the Horizontal frequency */
443 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
444 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
445 2 + interlace;
446 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
449 /* 8. Find the number of lines in V sync + back porch */
450 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
451 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
452 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
453 /* 9. Find the number of lines in V back porch alone: */
454 vback_porch = vsync_plus_bp - V_SYNC_RQD;
455 /* 10. Find the total number of lines in Vertical field period: */
456 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
457 vsync_plus_bp + GTF_MIN_V_PORCH;
458 /* 11. Estimate the Vertical field frequency: */
459 vfieldrate_est = hfreq_est / vtotal_lines;
460 /* 12. Find the actual horizontal period: */
461 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
463 /* 13. Find the actual Vertical field frequency: */
464 vfield_rate = hfreq_est / vtotal_lines;
465 /* 14. Find the Vertical frame frequency: */
466 if (interlaced)
467 vframe_rate = vfield_rate / 2;
468 else
469 vframe_rate = vfield_rate;
470 /* 15. Find number of pixels in left margin: */
471 if (margins)
472 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
473 1000;
474 else
475 left_margin = 0;
477 /* 16.Find number of pixels in right margin: */
478 right_margin = left_margin;
479 /* 17.Find total number of active pixels in image and left and right */
480 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
481 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
482 ideal_duty_cycle = GTF_C_PRIME * 1000 -
483 (GTF_M_PRIME * 1000000 / hfreq_est);
484 /* 19.Find the number of pixels in the blanking time to the nearest
485 * double character cell: */
486 hblank = total_active_pixels * ideal_duty_cycle /
487 (100000 - ideal_duty_cycle);
488 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
489 hblank = hblank * 2 * GTF_CELL_GRAN;
490 /* 20.Find total number of pixels: */
491 total_pixels = total_active_pixels + hblank;
492 /* 21.Find pixel clock frequency: */
493 pixel_freq = total_pixels * hfreq_est / 1000;
494 /* Stage 1 computations are now complete; I should really pass
495 * the results to another function and do the Stage 2 computations,
496 * but I only need a few more values so I'll just append the
497 * computations here for now */
498 /* 17. Find the number of pixels in the horizontal sync period: */
499 hsync = H_SYNC_PERCENT * total_pixels / 100;
500 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
501 hsync = hsync * GTF_CELL_GRAN;
502 /* 18. Find the number of pixels in horizontal front porch period */
503 hfront_porch = hblank / 2 - hsync;
504 /* 36. Find the number of lines in the odd front porch period: */
505 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
507 /* finally, pack the results in the mode struct */
508 drm_mode->hdisplay = hdisplay_rnd;
509 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
510 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
511 drm_mode->htotal = total_pixels;
512 drm_mode->vdisplay = vdisplay_rnd;
513 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
514 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
515 drm_mode->vtotal = vtotal_lines;
517 drm_mode->clock = pixel_freq;
519 if (interlaced) {
520 drm_mode->vtotal *= 2;
521 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
524 drm_mode_set_name(drm_mode);
525 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
526 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
527 else
528 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
530 return drm_mode;
532 EXPORT_SYMBOL(drm_gtf_mode_complex);
535 * drm_gtf_mode - create the modeline based on the GTF algorithm
536 * @dev: drm device
537 * @hdisplay: hdisplay size
538 * @vdisplay: vdisplay size
539 * @vrefresh: vrefresh rate.
540 * @interlaced: whether to compute an interlaced mode
541 * @margins: desired margin (borders) size
543 * return the modeline based on GTF algorithm
545 * This function is to create the modeline based on the GTF algorithm.
546 * Generalized Timing Formula is derived from:
548 * GTF Spreadsheet by Andy Morrish (1/5/97)
549 * available at http://www.vesa.org
551 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
552 * What I have done is to translate it by using integer calculation.
553 * I also refer to the function of fb_get_mode in the file of
554 * drivers/video/fbmon.c
556 * Standard GTF parameters::
558 * M = 600
559 * C = 40
560 * K = 128
561 * J = 20
563 * Returns:
564 * The modeline based on the GTF algorithm stored in a drm_display_mode object.
565 * The display mode object is allocated with drm_mode_create(). Returns NULL
566 * when no mode could be allocated.
568 struct drm_display_mode *
569 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
570 bool interlaced, int margins)
572 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
573 interlaced, margins,
574 600, 40 * 2, 128, 20 * 2);
576 EXPORT_SYMBOL(drm_gtf_mode);
578 #ifdef CONFIG_VIDEOMODE_HELPERS
580 * drm_display_mode_from_videomode - fill in @dmode using @vm,
581 * @vm: videomode structure to use as source
582 * @dmode: drm_display_mode structure to use as destination
584 * Fills out @dmode using the display mode specified in @vm.
586 void drm_display_mode_from_videomode(const struct videomode *vm,
587 struct drm_display_mode *dmode)
589 dmode->hdisplay = vm->hactive;
590 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
591 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
592 dmode->htotal = dmode->hsync_end + vm->hback_porch;
594 dmode->vdisplay = vm->vactive;
595 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
596 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
597 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
599 dmode->clock = vm->pixelclock / 1000;
601 dmode->flags = 0;
602 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
603 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
604 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
605 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
606 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
607 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
608 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
609 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
610 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
611 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
612 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
613 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
614 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
615 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
616 drm_mode_set_name(dmode);
618 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
621 * drm_display_mode_to_videomode - fill in @vm using @dmode,
622 * @dmode: drm_display_mode structure to use as source
623 * @vm: videomode structure to use as destination
625 * Fills out @vm using the display mode specified in @dmode.
627 void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
628 struct videomode *vm)
630 vm->hactive = dmode->hdisplay;
631 vm->hfront_porch = dmode->hsync_start - dmode->hdisplay;
632 vm->hsync_len = dmode->hsync_end - dmode->hsync_start;
633 vm->hback_porch = dmode->htotal - dmode->hsync_end;
635 vm->vactive = dmode->vdisplay;
636 vm->vfront_porch = dmode->vsync_start - dmode->vdisplay;
637 vm->vsync_len = dmode->vsync_end - dmode->vsync_start;
638 vm->vback_porch = dmode->vtotal - dmode->vsync_end;
640 vm->pixelclock = dmode->clock * 1000;
642 vm->flags = 0;
643 if (dmode->flags & DRM_MODE_FLAG_PHSYNC)
644 vm->flags |= DISPLAY_FLAGS_HSYNC_HIGH;
645 else if (dmode->flags & DRM_MODE_FLAG_NHSYNC)
646 vm->flags |= DISPLAY_FLAGS_HSYNC_LOW;
647 if (dmode->flags & DRM_MODE_FLAG_PVSYNC)
648 vm->flags |= DISPLAY_FLAGS_VSYNC_HIGH;
649 else if (dmode->flags & DRM_MODE_FLAG_NVSYNC)
650 vm->flags |= DISPLAY_FLAGS_VSYNC_LOW;
651 if (dmode->flags & DRM_MODE_FLAG_INTERLACE)
652 vm->flags |= DISPLAY_FLAGS_INTERLACED;
653 if (dmode->flags & DRM_MODE_FLAG_DBLSCAN)
654 vm->flags |= DISPLAY_FLAGS_DOUBLESCAN;
655 if (dmode->flags & DRM_MODE_FLAG_DBLCLK)
656 vm->flags |= DISPLAY_FLAGS_DOUBLECLK;
658 EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode);
661 * drm_bus_flags_from_videomode - extract information about pixelclk and
662 * DE polarity from videomode and store it in a separate variable
663 * @vm: videomode structure to use
664 * @bus_flags: information about pixelclk and DE polarity will be stored here
666 * Sets DRM_BUS_FLAG_DE_(LOW|HIGH) and DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE
667 * in @bus_flags according to DISPLAY_FLAGS found in @vm
669 void drm_bus_flags_from_videomode(const struct videomode *vm, u32 *bus_flags)
671 *bus_flags = 0;
672 if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
673 *bus_flags |= DRM_BUS_FLAG_PIXDATA_POSEDGE;
674 if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
675 *bus_flags |= DRM_BUS_FLAG_PIXDATA_NEGEDGE;
677 if (vm->flags & DISPLAY_FLAGS_DE_LOW)
678 *bus_flags |= DRM_BUS_FLAG_DE_LOW;
679 if (vm->flags & DISPLAY_FLAGS_DE_HIGH)
680 *bus_flags |= DRM_BUS_FLAG_DE_HIGH;
682 EXPORT_SYMBOL_GPL(drm_bus_flags_from_videomode);
684 #ifdef CONFIG_OF
686 * of_get_drm_display_mode - get a drm_display_mode from devicetree
687 * @np: device_node with the timing specification
688 * @dmode: will be set to the return value
689 * @bus_flags: information about pixelclk and DE polarity
690 * @index: index into the list of display timings in devicetree
692 * This function is expensive and should only be used, if only one mode is to be
693 * read from DT. To get multiple modes start with of_get_display_timings and
694 * work with that instead.
696 * Returns:
697 * 0 on success, a negative errno code when no of videomode node was found.
699 int of_get_drm_display_mode(struct device_node *np,
700 struct drm_display_mode *dmode, u32 *bus_flags,
701 int index)
703 struct videomode vm;
704 int ret;
706 ret = of_get_videomode(np, &vm, index);
707 if (ret)
708 return ret;
710 drm_display_mode_from_videomode(&vm, dmode);
711 if (bus_flags)
712 drm_bus_flags_from_videomode(&vm, bus_flags);
714 pr_debug("%s: got %dx%d display mode from %s\n",
715 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
716 drm_mode_debug_printmodeline(dmode);
718 return 0;
720 EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
721 #endif /* CONFIG_OF */
722 #endif /* CONFIG_VIDEOMODE_HELPERS */
725 * drm_mode_set_name - set the name on a mode
726 * @mode: name will be set in this mode
728 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay>
729 * with an optional 'i' suffix for interlaced modes.
731 void drm_mode_set_name(struct drm_display_mode *mode)
733 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
735 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
736 mode->hdisplay, mode->vdisplay,
737 interlaced ? "i" : "");
739 EXPORT_SYMBOL(drm_mode_set_name);
742 * drm_mode_hsync - get the hsync of a mode
743 * @mode: mode
745 * Returns:
746 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
747 * value first if it is not yet set.
749 int drm_mode_hsync(const struct drm_display_mode *mode)
751 unsigned int calc_val;
753 if (mode->hsync)
754 return mode->hsync;
756 if (mode->htotal < 0)
757 return 0;
759 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
760 calc_val += 500; /* round to 1000Hz */
761 calc_val /= 1000; /* truncate to kHz */
763 return calc_val;
765 EXPORT_SYMBOL(drm_mode_hsync);
768 * drm_mode_vrefresh - get the vrefresh of a mode
769 * @mode: mode
771 * Returns:
772 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the
773 * value first if it is not yet set.
775 int drm_mode_vrefresh(const struct drm_display_mode *mode)
777 int refresh = 0;
778 unsigned int calc_val;
780 if (mode->vrefresh > 0)
781 refresh = mode->vrefresh;
782 else if (mode->htotal > 0 && mode->vtotal > 0) {
783 int vtotal;
784 vtotal = mode->vtotal;
785 /* work out vrefresh the value will be x1000 */
786 calc_val = (mode->clock * 1000);
787 calc_val /= mode->htotal;
788 refresh = (calc_val + vtotal / 2) / vtotal;
790 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
791 refresh *= 2;
792 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
793 refresh /= 2;
794 if (mode->vscan > 1)
795 refresh /= mode->vscan;
797 return refresh;
799 EXPORT_SYMBOL(drm_mode_vrefresh);
802 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
803 * @p: mode
804 * @adjust_flags: a combination of adjustment flags
806 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
808 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
809 * interlaced modes.
810 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
811 * buffers containing two eyes (only adjust the timings when needed, eg. for
812 * "frame packing" or "side by side full").
813 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
814 * be performed for doublescan and vscan > 1 modes respectively.
816 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
818 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
819 return;
821 p->crtc_clock = p->clock;
822 p->crtc_hdisplay = p->hdisplay;
823 p->crtc_hsync_start = p->hsync_start;
824 p->crtc_hsync_end = p->hsync_end;
825 p->crtc_htotal = p->htotal;
826 p->crtc_hskew = p->hskew;
827 p->crtc_vdisplay = p->vdisplay;
828 p->crtc_vsync_start = p->vsync_start;
829 p->crtc_vsync_end = p->vsync_end;
830 p->crtc_vtotal = p->vtotal;
832 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
833 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
834 p->crtc_vdisplay /= 2;
835 p->crtc_vsync_start /= 2;
836 p->crtc_vsync_end /= 2;
837 p->crtc_vtotal /= 2;
841 if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
842 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
843 p->crtc_vdisplay *= 2;
844 p->crtc_vsync_start *= 2;
845 p->crtc_vsync_end *= 2;
846 p->crtc_vtotal *= 2;
850 if (!(adjust_flags & CRTC_NO_VSCAN)) {
851 if (p->vscan > 1) {
852 p->crtc_vdisplay *= p->vscan;
853 p->crtc_vsync_start *= p->vscan;
854 p->crtc_vsync_end *= p->vscan;
855 p->crtc_vtotal *= p->vscan;
859 if (adjust_flags & CRTC_STEREO_DOUBLE) {
860 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
862 switch (layout) {
863 case DRM_MODE_FLAG_3D_FRAME_PACKING:
864 p->crtc_clock *= 2;
865 p->crtc_vdisplay += p->crtc_vtotal;
866 p->crtc_vsync_start += p->crtc_vtotal;
867 p->crtc_vsync_end += p->crtc_vtotal;
868 p->crtc_vtotal += p->crtc_vtotal;
869 break;
873 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
874 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
875 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
876 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
878 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
881 * drm_mode_copy - copy the mode
882 * @dst: mode to overwrite
883 * @src: mode to copy
885 * Copy an existing mode into another mode, preserving the object id and
886 * list head of the destination mode.
888 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
890 int id = dst->base.id;
891 struct list_head head = dst->head;
893 *dst = *src;
894 dst->base.id = id;
895 dst->head = head;
897 EXPORT_SYMBOL(drm_mode_copy);
900 * drm_mode_duplicate - allocate and duplicate an existing mode
901 * @dev: drm_device to allocate the duplicated mode for
902 * @mode: mode to duplicate
904 * Just allocate a new mode, copy the existing mode into it, and return
905 * a pointer to it. Used to create new instances of established modes.
907 * Returns:
908 * Pointer to duplicated mode on success, NULL on error.
910 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
911 const struct drm_display_mode *mode)
913 struct drm_display_mode *nmode;
915 nmode = drm_mode_create(dev);
916 if (!nmode)
917 return NULL;
919 drm_mode_copy(nmode, mode);
921 return nmode;
923 EXPORT_SYMBOL(drm_mode_duplicate);
926 * drm_mode_equal - test modes for equality
927 * @mode1: first mode
928 * @mode2: second mode
930 * Check to see if @mode1 and @mode2 are equivalent.
932 * Returns:
933 * True if the modes are equal, false otherwise.
935 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
937 if (!mode1 && !mode2)
938 return true;
940 if (!mode1 || !mode2)
941 return false;
943 /* do clock check convert to PICOS so fb modes get matched
944 * the same */
945 if (mode1->clock && mode2->clock) {
946 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
947 return false;
948 } else if (mode1->clock != mode2->clock)
949 return false;
951 return drm_mode_equal_no_clocks(mode1, mode2);
953 EXPORT_SYMBOL(drm_mode_equal);
956 * drm_mode_equal_no_clocks - test modes for equality
957 * @mode1: first mode
958 * @mode2: second mode
960 * Check to see if @mode1 and @mode2 are equivalent, but
961 * don't check the pixel clocks.
963 * Returns:
964 * True if the modes are equal, false otherwise.
966 bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
968 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
969 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
970 return false;
972 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
974 EXPORT_SYMBOL(drm_mode_equal_no_clocks);
977 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
978 * @mode1: first mode
979 * @mode2: second mode
981 * Check to see if @mode1 and @mode2 are equivalent, but
982 * don't check the pixel clocks nor the stereo layout.
984 * Returns:
985 * True if the modes are equal, false otherwise.
987 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
988 const struct drm_display_mode *mode2)
990 if (mode1->hdisplay == mode2->hdisplay &&
991 mode1->hsync_start == mode2->hsync_start &&
992 mode1->hsync_end == mode2->hsync_end &&
993 mode1->htotal == mode2->htotal &&
994 mode1->hskew == mode2->hskew &&
995 mode1->vdisplay == mode2->vdisplay &&
996 mode1->vsync_start == mode2->vsync_start &&
997 mode1->vsync_end == mode2->vsync_end &&
998 mode1->vtotal == mode2->vtotal &&
999 mode1->vscan == mode2->vscan &&
1000 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
1001 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
1002 return true;
1004 return false;
1006 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
1009 * drm_mode_validate_basic - make sure the mode is somewhat sane
1010 * @mode: mode to check
1012 * Check that the mode timings are at least somewhat reasonable.
1013 * Any hardware specific limits are left up for each driver to check.
1015 * Returns:
1016 * The mode status
1018 enum drm_mode_status
1019 drm_mode_validate_basic(const struct drm_display_mode *mode)
1021 if (mode->clock == 0)
1022 return MODE_CLOCK_LOW;
1024 if (mode->hdisplay == 0 ||
1025 mode->hsync_start < mode->hdisplay ||
1026 mode->hsync_end < mode->hsync_start ||
1027 mode->htotal < mode->hsync_end)
1028 return MODE_H_ILLEGAL;
1030 if (mode->vdisplay == 0 ||
1031 mode->vsync_start < mode->vdisplay ||
1032 mode->vsync_end < mode->vsync_start ||
1033 mode->vtotal < mode->vsync_end)
1034 return MODE_V_ILLEGAL;
1036 return MODE_OK;
1038 EXPORT_SYMBOL(drm_mode_validate_basic);
1041 * drm_mode_validate_size - make sure modes adhere to size constraints
1042 * @mode: mode to check
1043 * @maxX: maximum width
1044 * @maxY: maximum height
1046 * This function is a helper which can be used to validate modes against size
1047 * limitations of the DRM device/connector. If a mode is too big its status
1048 * member is updated with the appropriate validation failure code. The list
1049 * itself is not changed.
1051 * Returns:
1052 * The mode status
1054 enum drm_mode_status
1055 drm_mode_validate_size(const struct drm_display_mode *mode,
1056 int maxX, int maxY)
1058 if (maxX > 0 && mode->hdisplay > maxX)
1059 return MODE_VIRTUAL_X;
1061 if (maxY > 0 && mode->vdisplay > maxY)
1062 return MODE_VIRTUAL_Y;
1064 return MODE_OK;
1066 EXPORT_SYMBOL(drm_mode_validate_size);
1068 #define MODE_STATUS(status) [MODE_ ## status + 3] = #status
1070 static const char * const drm_mode_status_names[] = {
1071 MODE_STATUS(OK),
1072 MODE_STATUS(HSYNC),
1073 MODE_STATUS(VSYNC),
1074 MODE_STATUS(H_ILLEGAL),
1075 MODE_STATUS(V_ILLEGAL),
1076 MODE_STATUS(BAD_WIDTH),
1077 MODE_STATUS(NOMODE),
1078 MODE_STATUS(NO_INTERLACE),
1079 MODE_STATUS(NO_DBLESCAN),
1080 MODE_STATUS(NO_VSCAN),
1081 MODE_STATUS(MEM),
1082 MODE_STATUS(VIRTUAL_X),
1083 MODE_STATUS(VIRTUAL_Y),
1084 MODE_STATUS(MEM_VIRT),
1085 MODE_STATUS(NOCLOCK),
1086 MODE_STATUS(CLOCK_HIGH),
1087 MODE_STATUS(CLOCK_LOW),
1088 MODE_STATUS(CLOCK_RANGE),
1089 MODE_STATUS(BAD_HVALUE),
1090 MODE_STATUS(BAD_VVALUE),
1091 MODE_STATUS(BAD_VSCAN),
1092 MODE_STATUS(HSYNC_NARROW),
1093 MODE_STATUS(HSYNC_WIDE),
1094 MODE_STATUS(HBLANK_NARROW),
1095 MODE_STATUS(HBLANK_WIDE),
1096 MODE_STATUS(VSYNC_NARROW),
1097 MODE_STATUS(VSYNC_WIDE),
1098 MODE_STATUS(VBLANK_NARROW),
1099 MODE_STATUS(VBLANK_WIDE),
1100 MODE_STATUS(PANEL),
1101 MODE_STATUS(INTERLACE_WIDTH),
1102 MODE_STATUS(ONE_WIDTH),
1103 MODE_STATUS(ONE_HEIGHT),
1104 MODE_STATUS(ONE_SIZE),
1105 MODE_STATUS(NO_REDUCED),
1106 MODE_STATUS(NO_STEREO),
1107 MODE_STATUS(STALE),
1108 MODE_STATUS(BAD),
1109 MODE_STATUS(ERROR),
1112 #undef MODE_STATUS
1114 static const char *drm_get_mode_status_name(enum drm_mode_status status)
1116 int index = status + 3;
1118 if (WARN_ON(index < 0 || index >= ARRAY_SIZE(drm_mode_status_names)))
1119 return "";
1121 return drm_mode_status_names[index];
1125 * drm_mode_prune_invalid - remove invalid modes from mode list
1126 * @dev: DRM device
1127 * @mode_list: list of modes to check
1128 * @verbose: be verbose about it
1130 * This helper function can be used to prune a display mode list after
1131 * validation has been completed. All modes who's status is not MODE_OK will be
1132 * removed from the list, and if @verbose the status code and mode name is also
1133 * printed to dmesg.
1135 void drm_mode_prune_invalid(struct drm_device *dev,
1136 struct list_head *mode_list, bool verbose)
1138 struct drm_display_mode *mode, *t;
1140 list_for_each_entry_safe(mode, t, mode_list, head) {
1141 if (mode->status != MODE_OK) {
1142 list_del(&mode->head);
1143 if (verbose) {
1144 drm_mode_debug_printmodeline(mode);
1145 DRM_DEBUG_KMS("Not using %s mode: %s\n",
1146 mode->name,
1147 drm_get_mode_status_name(mode->status));
1149 drm_mode_destroy(dev, mode);
1153 EXPORT_SYMBOL(drm_mode_prune_invalid);
1156 * drm_mode_compare - compare modes for favorability
1157 * @priv: unused
1158 * @lh_a: list_head for first mode
1159 * @lh_b: list_head for second mode
1161 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
1162 * which is better.
1164 * Returns:
1165 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
1166 * positive if @lh_b is better than @lh_a.
1168 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
1170 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
1171 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
1172 int diff;
1174 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
1175 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
1176 if (diff)
1177 return diff;
1178 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
1179 if (diff)
1180 return diff;
1182 diff = b->vrefresh - a->vrefresh;
1183 if (diff)
1184 return diff;
1186 diff = b->clock - a->clock;
1187 return diff;
1191 * drm_mode_sort - sort mode list
1192 * @mode_list: list of drm_display_mode structures to sort
1194 * Sort @mode_list by favorability, moving good modes to the head of the list.
1196 void drm_mode_sort(struct list_head *mode_list)
1198 list_sort(NULL, mode_list, drm_mode_compare);
1200 EXPORT_SYMBOL(drm_mode_sort);
1203 * drm_mode_connector_list_update - update the mode list for the connector
1204 * @connector: the connector to update
1206 * This moves the modes from the @connector probed_modes list
1207 * to the actual mode list. It compares the probed mode against the current
1208 * list and only adds different/new modes.
1210 * This is just a helper functions doesn't validate any modes itself and also
1211 * doesn't prune any invalid modes. Callers need to do that themselves.
1213 void drm_mode_connector_list_update(struct drm_connector *connector)
1215 struct drm_display_mode *pmode, *pt;
1217 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
1219 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, head) {
1220 struct drm_display_mode *mode;
1221 bool found_it = false;
1223 /* go through current modes checking for the new probed mode */
1224 list_for_each_entry(mode, &connector->modes, head) {
1225 if (!drm_mode_equal(pmode, mode))
1226 continue;
1228 found_it = true;
1231 * If the old matching mode is stale (ie. left over
1232 * from a previous probe) just replace it outright.
1233 * Otherwise just merge the type bits between all
1234 * equal probed modes.
1236 * If two probed modes are considered equal, pick the
1237 * actual timings from the one that's marked as
1238 * preferred (in case the match isn't 100%). If
1239 * multiple or zero preferred modes are present, favor
1240 * the mode added to the probed_modes list first.
1242 if (mode->status == MODE_STALE) {
1243 drm_mode_copy(mode, pmode);
1244 } else if ((mode->type & DRM_MODE_TYPE_PREFERRED) == 0 &&
1245 (pmode->type & DRM_MODE_TYPE_PREFERRED) != 0) {
1246 pmode->type |= mode->type;
1247 drm_mode_copy(mode, pmode);
1248 } else {
1249 mode->type |= pmode->type;
1252 list_del(&pmode->head);
1253 drm_mode_destroy(connector->dev, pmode);
1254 break;
1257 if (!found_it) {
1258 list_move_tail(&pmode->head, &connector->modes);
1262 EXPORT_SYMBOL(drm_mode_connector_list_update);
1265 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector
1266 * @mode_option: optional per connector mode option
1267 * @connector: connector to parse modeline for
1268 * @mode: preallocated drm_cmdline_mode structure to fill out
1270 * This parses @mode_option command line modeline for modes and options to
1271 * configure the connector. If @mode_option is NULL the default command line
1272 * modeline in fb_mode_option will be parsed instead.
1274 * This uses the same parameters as the fb modedb.c, except for an extra
1275 * force-enable, force-enable-digital and force-disable bit at the end:
1277 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1279 * The intermediate drm_cmdline_mode structure is required to store additional
1280 * options from the command line modline like the force-enable/disable flag.
1282 * Returns:
1283 * True if a valid modeline has been parsed, false otherwise.
1285 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1286 struct drm_connector *connector,
1287 struct drm_cmdline_mode *mode)
1289 const char *name;
1290 unsigned int namelen;
1291 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1292 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1293 bool yres_specified = false, cvt = false, rb = false;
1294 bool interlace = false, margins = false, was_digit = false;
1295 int i;
1296 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1298 #ifdef CONFIG_FB
1299 if (!mode_option)
1300 mode_option = fb_mode_option;
1301 #endif
1303 if (!mode_option) {
1304 mode->specified = false;
1305 return false;
1308 name = mode_option;
1309 namelen = strlen(name);
1310 for (i = namelen-1; i >= 0; i--) {
1311 switch (name[i]) {
1312 case '@':
1313 if (!refresh_specified && !bpp_specified &&
1314 !yres_specified && !cvt && !rb && was_digit) {
1315 refresh = simple_strtol(&name[i+1], NULL, 10);
1316 refresh_specified = true;
1317 was_digit = false;
1318 } else
1319 goto done;
1320 break;
1321 case '-':
1322 if (!bpp_specified && !yres_specified && !cvt &&
1323 !rb && was_digit) {
1324 bpp = simple_strtol(&name[i+1], NULL, 10);
1325 bpp_specified = true;
1326 was_digit = false;
1327 } else
1328 goto done;
1329 break;
1330 case 'x':
1331 if (!yres_specified && was_digit) {
1332 yres = simple_strtol(&name[i+1], NULL, 10);
1333 yres_specified = true;
1334 was_digit = false;
1335 } else
1336 goto done;
1337 break;
1338 case '0' ... '9':
1339 was_digit = true;
1340 break;
1341 case 'M':
1342 if (yres_specified || cvt || was_digit)
1343 goto done;
1344 cvt = true;
1345 break;
1346 case 'R':
1347 if (yres_specified || cvt || rb || was_digit)
1348 goto done;
1349 rb = true;
1350 break;
1351 case 'm':
1352 if (cvt || yres_specified || was_digit)
1353 goto done;
1354 margins = true;
1355 break;
1356 case 'i':
1357 if (cvt || yres_specified || was_digit)
1358 goto done;
1359 interlace = true;
1360 break;
1361 case 'e':
1362 if (yres_specified || bpp_specified || refresh_specified ||
1363 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1364 goto done;
1366 force = DRM_FORCE_ON;
1367 break;
1368 case 'D':
1369 if (yres_specified || bpp_specified || refresh_specified ||
1370 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1371 goto done;
1373 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1374 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1375 force = DRM_FORCE_ON;
1376 else
1377 force = DRM_FORCE_ON_DIGITAL;
1378 break;
1379 case 'd':
1380 if (yres_specified || bpp_specified || refresh_specified ||
1381 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1382 goto done;
1384 force = DRM_FORCE_OFF;
1385 break;
1386 default:
1387 goto done;
1391 if (i < 0 && yres_specified) {
1392 char *ch;
1393 xres = simple_strtol(name, &ch, 10);
1394 if ((ch != NULL) && (*ch == 'x'))
1395 res_specified = true;
1396 else
1397 i = ch - name;
1398 } else if (!yres_specified && was_digit) {
1399 /* catch mode that begins with digits but has no 'x' */
1400 i = 0;
1402 done:
1403 if (i >= 0) {
1404 pr_warn("[drm] parse error at position %i in video mode '%s'\n",
1405 i, name);
1406 mode->specified = false;
1407 return false;
1410 if (res_specified) {
1411 mode->specified = true;
1412 mode->xres = xres;
1413 mode->yres = yres;
1416 if (refresh_specified) {
1417 mode->refresh_specified = true;
1418 mode->refresh = refresh;
1421 if (bpp_specified) {
1422 mode->bpp_specified = true;
1423 mode->bpp = bpp;
1425 mode->rb = rb;
1426 mode->cvt = cvt;
1427 mode->interlace = interlace;
1428 mode->margins = margins;
1429 mode->force = force;
1431 return true;
1433 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1436 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode
1437 * @dev: DRM device to create the new mode for
1438 * @cmd: input command line modeline
1440 * Returns:
1441 * Pointer to converted mode on success, NULL on error.
1443 struct drm_display_mode *
1444 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1445 struct drm_cmdline_mode *cmd)
1447 struct drm_display_mode *mode;
1449 if (cmd->cvt)
1450 mode = drm_cvt_mode(dev,
1451 cmd->xres, cmd->yres,
1452 cmd->refresh_specified ? cmd->refresh : 60,
1453 cmd->rb, cmd->interlace,
1454 cmd->margins);
1455 else
1456 mode = drm_gtf_mode(dev,
1457 cmd->xres, cmd->yres,
1458 cmd->refresh_specified ? cmd->refresh : 60,
1459 cmd->interlace,
1460 cmd->margins);
1461 if (!mode)
1462 return NULL;
1464 mode->type |= DRM_MODE_TYPE_USERDEF;
1465 /* fix up 1368x768: GFT/CVT can't express 1366 width due to alignment */
1466 if (cmd->xres == 1366 && mode->hdisplay == 1368) {
1467 mode->hdisplay = 1366;
1468 mode->hsync_start--;
1469 mode->hsync_end--;
1470 drm_mode_set_name(mode);
1472 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1473 return mode;
1475 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
1478 * drm_crtc_convert_to_umode - convert a drm_display_mode into a modeinfo
1479 * @out: drm_mode_modeinfo struct to return to the user
1480 * @in: drm_display_mode to use
1482 * Convert a drm_display_mode into a drm_mode_modeinfo structure to return to
1483 * the user.
1485 void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out,
1486 const struct drm_display_mode *in)
1488 WARN(in->hdisplay > USHRT_MAX || in->hsync_start > USHRT_MAX ||
1489 in->hsync_end > USHRT_MAX || in->htotal > USHRT_MAX ||
1490 in->hskew > USHRT_MAX || in->vdisplay > USHRT_MAX ||
1491 in->vsync_start > USHRT_MAX || in->vsync_end > USHRT_MAX ||
1492 in->vtotal > USHRT_MAX || in->vscan > USHRT_MAX,
1493 "timing values too large for mode info\n");
1495 out->clock = in->clock;
1496 out->hdisplay = in->hdisplay;
1497 out->hsync_start = in->hsync_start;
1498 out->hsync_end = in->hsync_end;
1499 out->htotal = in->htotal;
1500 out->hskew = in->hskew;
1501 out->vdisplay = in->vdisplay;
1502 out->vsync_start = in->vsync_start;
1503 out->vsync_end = in->vsync_end;
1504 out->vtotal = in->vtotal;
1505 out->vscan = in->vscan;
1506 out->vrefresh = in->vrefresh;
1507 out->flags = in->flags;
1508 out->type = in->type;
1509 strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
1510 out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
1514 * drm_crtc_convert_umode - convert a modeinfo into a drm_display_mode
1515 * @out: drm_display_mode to return to the user
1516 * @in: drm_mode_modeinfo to use
1518 * Convert a drm_mode_modeinfo into a drm_display_mode structure to return to
1519 * the caller.
1521 * Returns:
1522 * Zero on success, negative errno on failure.
1524 int drm_mode_convert_umode(struct drm_display_mode *out,
1525 const struct drm_mode_modeinfo *in)
1527 int ret = -EINVAL;
1529 if (in->clock > INT_MAX || in->vrefresh > INT_MAX) {
1530 ret = -ERANGE;
1531 goto out;
1534 if ((in->flags & DRM_MODE_FLAG_3D_MASK) > DRM_MODE_FLAG_3D_MAX)
1535 goto out;
1537 out->clock = in->clock;
1538 out->hdisplay = in->hdisplay;
1539 out->hsync_start = in->hsync_start;
1540 out->hsync_end = in->hsync_end;
1541 out->htotal = in->htotal;
1542 out->hskew = in->hskew;
1543 out->vdisplay = in->vdisplay;
1544 out->vsync_start = in->vsync_start;
1545 out->vsync_end = in->vsync_end;
1546 out->vtotal = in->vtotal;
1547 out->vscan = in->vscan;
1548 out->vrefresh = in->vrefresh;
1549 out->flags = in->flags;
1550 out->type = in->type;
1551 strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
1552 out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
1554 out->status = drm_mode_validate_basic(out);
1555 if (out->status != MODE_OK)
1556 goto out;
1558 drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V);
1560 ret = 0;
1562 out:
1563 return ret;