2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/clk.h>
14 #include <linux/clkdev.h>
15 #include <linux/cpuidle.h>
16 #include <linux/delay.h>
17 #include <linux/export.h>
18 #include <linux/init.h>
20 #include <linux/irq.h>
22 #include <linux/of_address.h>
23 #include <linux/of_irq.h>
24 #include <linux/of_platform.h>
25 #include <linux/pinctrl/machine.h>
26 #include <linux/phy.h>
27 #include <linux/micrel_phy.h>
28 #include <linux/mfd/anatop.h>
29 #include <asm/cpuidle.h>
30 #include <asm/smp_twd.h>
31 #include <asm/hardware/cache-l2x0.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/time.h>
35 #include <asm/system_misc.h>
36 #include <mach/common.h>
37 #include <mach/cpuidle.h>
38 #include <mach/hardware.h>
41 void imx6q_restart(char mode
, const char *cmd
)
43 struct device_node
*np
;
44 void __iomem
*wdog_base
;
46 np
= of_find_compatible_node(NULL
, NULL
, "fsl,imx6q-wdt");
47 wdog_base
= of_iomap(np
, 0);
51 imx_src_prepare_restart();
54 writew_relaxed(1 << 2, wdog_base
);
55 /* write twice to ensure the request will not get ignored */
56 writew_relaxed(1 << 2, wdog_base
);
58 /* wait for reset to assert ... */
61 pr_err("Watchdog reset failed to assert reset\n");
63 /* delay to allow the serial port to show the message */
67 /* we'll take a jump through zero as a poor second */
71 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
72 static int ksz9021rn_phy_fixup(struct phy_device
*phydev
)
74 if (IS_ENABLED(CONFIG_PHYLIB
)) {
75 /* min rx data delay */
76 phy_write(phydev
, 0x0b, 0x8105);
77 phy_write(phydev
, 0x0c, 0x0000);
79 /* max rx/tx clock delay, min rx/tx control delay */
80 phy_write(phydev
, 0x0b, 0x8104);
81 phy_write(phydev
, 0x0c, 0xf0f0);
82 phy_write(phydev
, 0x0b, 0x104);
88 static void __init
imx6q_sabrelite_cko1_setup(void)
90 struct clk
*cko1_sel
, *ahb
, *cko1
;
93 cko1_sel
= clk_get_sys(NULL
, "cko1_sel");
94 ahb
= clk_get_sys(NULL
, "ahb");
95 cko1
= clk_get_sys(NULL
, "cko1");
96 if (IS_ERR(cko1_sel
) || IS_ERR(ahb
) || IS_ERR(cko1
)) {
97 pr_err("cko1 setup failed!\n");
100 clk_set_parent(cko1_sel
, ahb
);
101 rate
= clk_round_rate(cko1
, 16000000);
102 clk_set_rate(cko1
, rate
);
103 clk_register_clkdev(cko1
, NULL
, "0-000a");
105 if (!IS_ERR(cko1_sel
))
113 static void __init
imx6q_sabrelite_init(void)
115 if (IS_ENABLED(CONFIG_PHYLIB
))
116 phy_register_fixup_for_uid(PHY_ID_KSZ9021
, MICREL_PHY_ID_MASK
,
117 ksz9021rn_phy_fixup
);
118 imx6q_sabrelite_cko1_setup();
121 static void __init
imx6q_usb_init(void)
123 struct device_node
*np
;
124 struct platform_device
*pdev
= NULL
;
125 struct anatop
*adata
= NULL
;
127 np
= of_find_compatible_node(NULL
, NULL
, "fsl,imx6q-anatop");
129 pdev
= of_find_device_by_node(np
);
131 adata
= platform_get_drvdata(pdev
);
138 #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
139 #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
141 #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
142 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
145 * The external charger detector needs to be disabled,
146 * or the signal at DP will be poor
148 anatop_write_reg(adata
, HW_ANADIG_USB1_CHRG_DETECT
,
149 BM_ANADIG_USB_CHRG_DETECT_EN_B
150 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B
,
152 anatop_write_reg(adata
, HW_ANADIG_USB2_CHRG_DETECT
,
153 BM_ANADIG_USB_CHRG_DETECT_EN_B
|
154 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B
,
160 static void __init
imx6q_init_machine(void)
163 * This should be removed when all imx6q boards have pinctrl
164 * states for devices defined in device tree.
166 pinctrl_provide_dummies();
168 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
169 imx6q_sabrelite_init();
171 of_platform_populate(NULL
, of_default_bus_match_table
, NULL
, NULL
);
177 static struct cpuidle_driver imx6q_cpuidle_driver
= {
178 .name
= "imx6q_cpuidle",
179 .owner
= THIS_MODULE
,
180 .en_core_tk_irqen
= 1,
181 .states
[0] = ARM_CPUIDLE_WFI_STATE
,
185 static void __init
imx6q_init_late(void)
187 imx_cpuidle_init(&imx6q_cpuidle_driver
);
190 static void __init
imx6q_map_io(void)
194 imx6q_clock_map_io();
197 static const struct of_device_id imx6q_irq_match
[] __initconst
= {
198 { .compatible
= "arm,cortex-a9-gic", .data
= gic_of_init
, },
202 static void __init
imx6q_init_irq(void)
204 l2x0_of_init(0, ~0UL);
207 of_irq_init(imx6q_irq_match
);
210 static void __init
imx6q_timer_init(void)
213 twd_local_timer_of_register();
216 static struct sys_timer imx6q_timer
= {
217 .init
= imx6q_timer_init
,
220 static const char *imx6q_dt_compat
[] __initdata
= {
222 "fsl,imx6q-sabrelite",
228 DT_MACHINE_START(IMX6Q
, "Freescale i.MX6 Quad (Device Tree)")
229 .map_io
= imx6q_map_io
,
230 .init_irq
= imx6q_init_irq
,
231 .handle_irq
= imx6q_handle_irq
,
232 .timer
= &imx6q_timer
,
233 .init_machine
= imx6q_init_machine
,
234 .init_late
= imx6q_init_late
,
235 .dt_compat
= imx6q_dt_compat
,
236 .restart
= imx6q_restart
,