arch/arm/mach-iop32x/iq80321.c

   1 /*
   2  * arch/arm/mach-iop32x/iq80321.c
   3  *
   4  * Board support code for the Intel IQ80321 platform.
   5  *
   6  * Author: Rory Bolt <rorybolt@pacbell.net>
   7  * Copyright (C) 2002 Rory Bolt
   8  * Copyright (C) 2004 Intel Corp.
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License as published by the
  12  * Free Software Foundation; either version 2 of the License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/mm.h>
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/pci.h>
  20 #include <linux/string.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/serial_8250.h>
  23 #include <linux/mtd/physmap.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/io.h>
  26 #include <mach/hardware.h>
  27 #include <asm/irq.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/mach/pci.h>
  31 #include <asm/mach/time.h>
  32 #include <asm/mach-types.h>
  33 #include <asm/page.h>
  34 #include <asm/pgtable.h>
  35 #include <mach/time.h>
  36
  37 /*
  38  * IQ80321 timer tick configuration.
  39  */
  40 static void __init iq80321_timer_init(void)
  41 {
  42         /* 33.333 MHz crystal.  */
  43         iop_init_time(200000000);
  44 }
  45
  46 static struct sys_timer iq80321_timer = {
  47         .init           = iq80321_timer_init,
  48 };
  49
  50
  51 /*
  52  * IQ80321 I/O.
  53  */
  54 static struct map_desc iq80321_io_desc[] __initdata = {
  55         {       /* on-board devices */
  56                 .virtual        = IQ80321_UART,
  57                 .pfn            = __phys_to_pfn(IQ80321_UART),
  58                 .length         = 0x00100000,
  59                 .type           = MT_DEVICE,
  60         },
  61 };
  62
  63 void __init iq80321_map_io(void)
  64 {
  65         iop3xx_map_io();
  66         iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
  67 }
  68
  69
  70 /*
  71  * IQ80321 PCI.
  72  */
  73 static int __init
  74 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  75 {
  76         int irq;
  77
  78         if ((slot == 2 || slot == 6) && pin == 1) {
  79                 /* PCI-X Slot INTA */
  80                 irq = IRQ_IOP32X_XINT2;
  81         } else if ((slot == 2 || slot == 6) && pin == 2) {
  82                 /* PCI-X Slot INTA */
  83                 irq = IRQ_IOP32X_XINT3;
  84         } else if ((slot == 2 || slot == 6) && pin == 3) {
  85                 /* PCI-X Slot INTA */
  86                 irq = IRQ_IOP32X_XINT0;
  87         } else if ((slot == 2 || slot == 6) && pin == 4) {
  88                 /* PCI-X Slot INTA */
  89                 irq = IRQ_IOP32X_XINT1;
  90         } else if (slot == 4 || slot == 8) {
  91                 /* Gig-E */
  92                 irq = IRQ_IOP32X_XINT0;
  93         } else {
  94                 printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
  95                         "device PCI:%d:%d:%d\n", dev->bus->number,
  96                         PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  97                 irq = -1;
  98         }
  99
 100         return irq;
 101 }
 102
 103 static struct hw_pci iq80321_pci __initdata = {
 104         .nr_controllers = 1,
 105         .ops            = &iop3xx_ops,
 106         .setup          = iop3xx_pci_setup,
 107         .preinit        = iop3xx_pci_preinit_cond,
 108         .map_irq        = iq80321_pci_map_irq,
 109 };
 110
 111 static int __init iq80321_pci_init(void)
 112 {
 113         if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
 114                 machine_is_iq80321())
 115                 pci_common_init(&iq80321_pci);
 116
 117         return 0;
 118 }
 119
 120 subsys_initcall(iq80321_pci_init);
 121
 122
 123 /*
 124  * IQ80321 machine initialisation.
 125  */
 126 static struct physmap_flash_data iq80321_flash_data = {
 127         .width          = 1,
 128 };
 129
 130 static struct resource iq80321_flash_resource = {
 131         .start          = 0xf0000000,
 132         .end            = 0xf07fffff,
 133         .flags          = IORESOURCE_MEM,
 134 };
 135
 136 static struct platform_device iq80321_flash_device = {
 137         .name           = "physmap-flash",
 138         .id             = 0,
 139         .dev            = {
 140                 .platform_data  = &iq80321_flash_data,
 141         },
 142         .num_resources  = 1,
 143         .resource       = &iq80321_flash_resource,
 144 };
 145
 146 static struct plat_serial8250_port iq80321_serial_port[] = {
 147         {
 148                 .mapbase        = IQ80321_UART,
 149                 .membase        = (char *)IQ80321_UART,
 150                 .irq            = IRQ_IOP32X_XINT1,
 151                 .flags          = UPF_SKIP_TEST,
 152                 .iotype         = UPIO_MEM,
 153                 .regshift       = 0,
 154                 .uartclk        = 1843200,
 155         },
 156         { },
 157 };
 158
 159 static struct resource iq80321_uart_resource = {
 160         .start          = IQ80321_UART,
 161         .end            = IQ80321_UART + 7,
 162         .flags          = IORESOURCE_MEM,
 163 };
 164
 165 static struct platform_device iq80321_serial_device = {
 166         .name           = "serial8250",
 167         .id             = PLAT8250_DEV_PLATFORM,
 168         .dev            = {
 169                 .platform_data          = iq80321_serial_port,
 170         },
 171         .num_resources  = 1,
 172         .resource       = &iq80321_uart_resource,
 173 };
 174
 175 static void __init iq80321_init_machine(void)
 176 {
 177         platform_device_register(&iop3xx_i2c0_device);
 178         platform_device_register(&iop3xx_i2c1_device);
 179         platform_device_register(&iq80321_flash_device);
 180         platform_device_register(&iq80321_serial_device);
 181         platform_device_register(&iop3xx_dma_0_channel);
 182         platform_device_register(&iop3xx_dma_1_channel);
 183         platform_device_register(&iop3xx_aau_channel);
 184 }
 185
 186 MACHINE_START(IQ80321, "Intel IQ80321")
 187         /* Maintainer: Intel Corp. */
 188         .atag_offset    = 0x100,
 189         .map_io         = iq80321_map_io,
 190         .init_irq       = iop32x_init_irq,
 191         .timer          = &iq80321_timer,
 192         .init_machine   = iq80321_init_machine,
 193         .restart        = iop3xx_restart,
 194 MACHINE_END