2 * include/asm-xtensa/processor.h
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 #ifndef _XTENSA_PROCESSOR_H
12 #define _XTENSA_PROCESSOR_H
14 #include <variant/core.h>
15 #include <platform/hardware.h>
17 #include <linux/compiler.h>
18 #include <asm/ptrace.h>
19 #include <asm/types.h>
24 #if (XCHAL_HAVE_WINDOWED != 1)
25 # error Linux requires the Xtensa Windowed Registers Option.
28 #define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH
31 * User space process size: 1 GB.
32 * Windowed call ABI requires caller and callee to be located within the same
33 * 1 GB region. The C compiler places trampoline code on the stack for sources
34 * that take the address of a nested C function (a feature used by glibc), so
35 * the 1 GB requirement applies to the stack as well.
39 #define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
41 #define TASK_SIZE (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
44 #define STACK_TOP TASK_SIZE
45 #define STACK_TOP_MAX STACK_TOP
48 * General exception cause assigned to debug exceptions. Debug exceptions go
49 * to their own vector, rather than the general exception vectors (user,
50 * kernel, double); and their specific causes are reported via DEBUGCAUSE
51 * rather than EXCCAUSE. However it is sometimes convenient to redirect debug
52 * exceptions to the general exception mechanism. To do this, an otherwise
53 * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
56 #define EXCCAUSE_MAPPED_DEBUG 63
59 * We use DEPC also as a flag to distinguish between double and regular
60 * exceptions. For performance reasons, DEPC might contain the value of
61 * EXCCAUSE for regular exceptions, so we use this definition to mark a
62 * valid double exception address.
63 * (Note: We use it in bgeui, so it should be 64, 128, or 256)
66 #define VALID_DOUBLE_EXCEPTION_ADDRESS 64
68 /* LOCKLEVEL defines the interrupt level that masks all
69 * general-purpose interrupts.
73 /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
76 #define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */
77 #define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
81 /* Build a valid return address for the specified call winsize.
82 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
84 #define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
86 /* Convert return address to a valid pc
87 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
89 #define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
95 struct thread_struct
{
97 /* kernel's return address and stack pointer for context switching */
98 unsigned long ra
; /* kernel's a0: return address and window call size */
99 unsigned long sp
; /* kernel's a1: stack pointer */
101 mm_segment_t current_ds
; /* see uaccess.h for example uses */
103 /* struct xtensa_cpuinfo info; */
105 unsigned long bad_vaddr
; /* last user fault */
106 unsigned long bad_uaddr
; /* last kernel fault accessing user space */
107 unsigned long error_code
;
109 unsigned long ibreak
[XCHAL_NUM_IBREAK
];
110 unsigned long dbreaka
[XCHAL_NUM_DBREAK
];
111 unsigned long dbreakc
[XCHAL_NUM_DBREAK
];
113 /* Make structure 16 bytes aligned. */
114 int align
[0] __attribute__ ((aligned(16)));
119 * Default implementation of macro that returns current
120 * instruction pointer ("program counter").
122 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
125 /* This decides where the kernel will search for a free chunk of vm
126 * space during mmap's.
128 #define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
130 #define INIT_THREAD \
133 sp: sizeof(init_stack) + (long) &init_stack, \
143 * Do necessary setup to start up a newly executed thread.
144 * Note: We set-up ps as if we did a call4 to the new pc.
145 * set_thread_state in signal.c depends on it.
147 #define USER_PS_VALUE ((1 << PS_WOE_BIT) | \
148 (1 << PS_CALLINC_SHIFT) | \
149 (USER_RING << PS_RING_SHIFT) | \
153 /* Clearing a0 terminates the backtrace. */
154 #define start_thread(regs, new_pc, new_sp) \
156 regs->ps = USER_PS_VALUE; \
157 regs->areg[1] = new_sp; \
161 regs->windowbase = 0; \
162 regs->windowstart = 1;
164 /* Forward declaration */
168 /* Free all resources held by a thread. */
169 #define release_thread(thread) do { } while(0)
171 /* Create a kernel thread without removing it from tasklists */
172 extern int kernel_thread(int (*fn
)(void *), void * arg
, unsigned long flags
);
174 /* Copy and release all segment info associated with a VM */
175 #define copy_segments(p, mm) do { } while(0)
176 #define release_segments(mm) do { } while(0)
177 #define forget_segments() do { } while (0)
179 #define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
181 extern unsigned long get_wchan(struct task_struct
*p
);
183 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
184 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
186 #define cpu_relax() barrier()
188 /* Special register access. */
190 #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
191 #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
193 #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
194 #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
196 #endif /* __ASSEMBLY__ */
197 #endif /* _XTENSA_PROCESSOR_H */