2 * cs4265.c -- CS4265 ALSA SoC audio driver
4 * Copyright 2014 Cirrus Logic, Inc.
6 * Author: Paul Handrigan <paul.handrigan@cirrus.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/kernel.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/input.h>
22 #include <linux/regmap.h>
23 #include <linux/slab.h>
24 #include <linux/platform_device.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <sound/tlv.h>
34 struct cs4265_private
{
35 struct regmap
*regmap
;
36 struct gpio_desc
*reset_gpio
;
41 static const struct reg_default cs4265_reg_defaults
[] = {
42 { CS4265_PWRCTL
, 0x0F },
43 { CS4265_DAC_CTL
, 0x08 },
44 { CS4265_ADC_CTL
, 0x00 },
45 { CS4265_MCLK_FREQ
, 0x00 },
46 { CS4265_SIG_SEL
, 0x40 },
47 { CS4265_CHB_PGA_CTL
, 0x00 },
48 { CS4265_CHA_PGA_CTL
, 0x00 },
49 { CS4265_ADC_CTL2
, 0x19 },
50 { CS4265_DAC_CHA_VOL
, 0x00 },
51 { CS4265_DAC_CHB_VOL
, 0x00 },
52 { CS4265_DAC_CTL2
, 0xC0 },
53 { CS4265_SPDIF_CTL1
, 0x00 },
54 { CS4265_SPDIF_CTL2
, 0x00 },
55 { CS4265_INT_MASK
, 0x00 },
56 { CS4265_STATUS_MODE_MSB
, 0x00 },
57 { CS4265_STATUS_MODE_LSB
, 0x00 },
60 static bool cs4265_readable_register(struct device
*dev
, unsigned int reg
)
63 case CS4265_CHIP_ID
... CS4265_SPDIF_CTL2
:
70 static bool cs4265_volatile_register(struct device
*dev
, unsigned int reg
)
73 case CS4265_INT_STATUS
:
80 static DECLARE_TLV_DB_SCALE(pga_tlv
, -1200, 50, 0);
82 static DECLARE_TLV_DB_SCALE(dac_tlv
, -12750, 50, 0);
84 static const char * const digital_input_mux_text
[] = {
88 static SOC_ENUM_SINGLE_DECL(digital_input_mux_enum
, CS4265_SIG_SEL
, 7,
89 digital_input_mux_text
);
91 static const struct snd_kcontrol_new digital_input_mux
=
92 SOC_DAPM_ENUM("Digital Input Mux", digital_input_mux_enum
);
94 static const char * const mic_linein_text
[] = {
98 static SOC_ENUM_SINGLE_DECL(mic_linein_enum
, CS4265_ADC_CTL2
, 0,
101 static const char * const cam_mode_text
[] = {
102 "One Byte", "Two Byte"
105 static SOC_ENUM_SINGLE_DECL(cam_mode_enum
, CS4265_SPDIF_CTL1
, 5,
108 static const char * const cam_mono_stereo_text
[] = {
112 static SOC_ENUM_SINGLE_DECL(spdif_mono_stereo_enum
, CS4265_SPDIF_CTL2
, 2,
113 cam_mono_stereo_text
);
115 static const char * const mono_select_text
[] = {
116 "Channel A", "Channel B"
119 static SOC_ENUM_SINGLE_DECL(spdif_mono_select_enum
, CS4265_SPDIF_CTL2
, 0,
122 static const struct snd_kcontrol_new mic_linein_mux
=
123 SOC_DAPM_ENUM("ADC Input Capture Mux", mic_linein_enum
);
125 static const struct snd_kcontrol_new loopback_ctl
=
126 SOC_DAPM_SINGLE("Switch", CS4265_SIG_SEL
, 1, 1, 0);
128 static const struct snd_kcontrol_new spdif_switch
=
129 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM
, 0, 0, 0);
131 static const struct snd_kcontrol_new dac_switch
=
132 SOC_DAPM_SINGLE("Switch", CS4265_PWRCTL
, 1, 1, 0);
134 static const struct snd_kcontrol_new cs4265_snd_controls
[] = {
136 SOC_DOUBLE_R_SX_TLV("PGA Volume", CS4265_CHA_PGA_CTL
,
137 CS4265_CHB_PGA_CTL
, 0, 0x28, 0x30, pga_tlv
),
138 SOC_DOUBLE_R_TLV("DAC Volume", CS4265_DAC_CHA_VOL
,
139 CS4265_DAC_CHB_VOL
, 0, 0xFF, 1, dac_tlv
),
140 SOC_SINGLE("De-emp 44.1kHz Switch", CS4265_DAC_CTL
, 1,
142 SOC_SINGLE("DAC INV Switch", CS4265_DAC_CTL2
, 5,
144 SOC_SINGLE("DAC Zero Cross Switch", CS4265_DAC_CTL2
, 6,
146 SOC_SINGLE("DAC Soft Ramp Switch", CS4265_DAC_CTL2
, 7,
148 SOC_SINGLE("ADC HPF Switch", CS4265_ADC_CTL
, 1,
150 SOC_SINGLE("ADC Zero Cross Switch", CS4265_ADC_CTL2
, 3,
152 SOC_SINGLE("ADC Soft Ramp Switch", CS4265_ADC_CTL2
, 7,
154 SOC_SINGLE("E to F Buffer Disable Switch", CS4265_SPDIF_CTL1
,
156 SOC_ENUM("C Data Access", cam_mode_enum
),
157 SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2
,
159 SOC_ENUM("SPDIF Mono/Stereo", spdif_mono_stereo_enum
),
160 SOC_SINGLE("MMTLR Data Switch", 0,
162 SOC_ENUM("Mono Channel Select", spdif_mono_select_enum
),
163 SND_SOC_BYTES("C Data Buffer", CS4265_C_DATA_BUFF
, 24),
166 static const struct snd_soc_dapm_widget cs4265_dapm_widgets
[] = {
168 SND_SOC_DAPM_INPUT("LINEINL"),
169 SND_SOC_DAPM_INPUT("LINEINR"),
170 SND_SOC_DAPM_INPUT("MICL"),
171 SND_SOC_DAPM_INPUT("MICR"),
173 SND_SOC_DAPM_AIF_OUT("DOUT", NULL
, 0,
175 SND_SOC_DAPM_AIF_OUT("SPDIFOUT", NULL
, 0,
178 SND_SOC_DAPM_MUX("ADC Mux", SND_SOC_NOPM
, 0, 0, &mic_linein_mux
),
180 SND_SOC_DAPM_ADC("ADC", NULL
, CS4265_PWRCTL
, 2, 1),
181 SND_SOC_DAPM_PGA("Pre-amp MIC", CS4265_PWRCTL
, 3,
184 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM
,
185 0, 0, &digital_input_mux
),
187 SND_SOC_DAPM_MIXER("SDIN1 Input Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
188 SND_SOC_DAPM_MIXER("SDIN2 Input Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
189 SND_SOC_DAPM_MIXER("SPDIF Transmitter", SND_SOC_NOPM
, 0, 0, NULL
, 0),
191 SND_SOC_DAPM_SWITCH("Loopback", SND_SOC_NOPM
, 0, 0,
193 SND_SOC_DAPM_SWITCH("SPDIF", SND_SOC_NOPM
, 0, 0,
195 SND_SOC_DAPM_SWITCH("DAC", CS4265_PWRCTL
, 1, 1,
198 SND_SOC_DAPM_AIF_IN("DIN1", NULL
, 0,
200 SND_SOC_DAPM_AIF_IN("DIN2", NULL
, 0,
202 SND_SOC_DAPM_AIF_IN("TXIN", NULL
, 0,
203 CS4265_SPDIF_CTL2
, 5, 1),
205 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
206 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
210 static const struct snd_soc_dapm_route cs4265_audio_map
[] = {
212 {"DIN1", NULL
, "DAI1 Playback"},
213 {"DIN2", NULL
, "DAI2 Playback"},
214 {"SDIN1 Input Mixer", NULL
, "DIN1"},
215 {"SDIN2 Input Mixer", NULL
, "DIN2"},
216 {"Input Mux", "SDIN1", "SDIN1 Input Mixer"},
217 {"Input Mux", "SDIN2", "SDIN2 Input Mixer"},
218 {"DAC", "Switch", "Input Mux"},
219 {"SPDIF", "Switch", "Input Mux"},
220 {"LINEOUTL", NULL
, "DAC"},
221 {"LINEOUTR", NULL
, "DAC"},
222 {"SPDIFOUT", NULL
, "SPDIF"},
224 {"ADC Mux", "LINEIN", "LINEINL"},
225 {"ADC Mux", "LINEIN", "LINEINR"},
226 {"ADC Mux", "MIC", "MICL"},
227 {"ADC Mux", "MIC", "MICR"},
228 {"ADC", NULL
, "ADC Mux"},
229 {"DOUT", NULL
, "ADC"},
230 {"DAI1 Capture", NULL
, "DOUT"},
231 {"DAI2 Capture", NULL
, "DOUT"},
234 {"Loopback", "Switch", "ADC"},
235 {"DAC", NULL
, "Loopback"},
238 struct cs4265_clk_para
{
241 u8 fm_mode
; /* values 1, 2, or 4 */
245 static const struct cs4265_clk_para clk_map_table
[] = {
247 {8192000, 32000, 0, 0},
248 {12288000, 32000, 0, 1},
249 {16384000, 32000, 0, 2},
250 {24576000, 32000, 0, 3},
251 {32768000, 32000, 0, 4},
254 {11289600, 44100, 0, 0},
255 {16934400, 44100, 0, 1},
256 {22579200, 44100, 0, 2},
257 {33868000, 44100, 0, 3},
258 {45158400, 44100, 0, 4},
261 {12288000, 48000, 0, 0},
262 {18432000, 48000, 0, 1},
263 {24576000, 48000, 0, 2},
264 {36864000, 48000, 0, 3},
265 {49152000, 48000, 0, 4},
268 {8192000, 64000, 1, 0},
269 {12288000, 64000, 1, 1},
270 {16934400, 64000, 1, 2},
271 {24576000, 64000, 1, 3},
272 {32768000, 64000, 1, 4},
275 {11289600, 88200, 1, 0},
276 {16934400, 88200, 1, 1},
277 {22579200, 88200, 1, 2},
278 {33868000, 88200, 1, 3},
279 {45158400, 88200, 1, 4},
282 {12288000, 96000, 1, 0},
283 {18432000, 96000, 1, 1},
284 {24576000, 96000, 1, 2},
285 {36864000, 96000, 1, 3},
286 {49152000, 96000, 1, 4},
289 {8192000, 128000, 2, 0},
290 {12288000, 128000, 2, 1},
291 {16934400, 128000, 2, 2},
292 {24576000, 128000, 2, 3},
293 {32768000, 128000, 2, 4},
296 {11289600, 176400, 2, 0},
297 {16934400, 176400, 2, 1},
298 {22579200, 176400, 2, 2},
299 {33868000, 176400, 2, 3},
300 {49152000, 176400, 2, 4},
303 {12288000, 192000, 2, 0},
304 {18432000, 192000, 2, 1},
305 {24576000, 192000, 2, 2},
306 {36864000, 192000, 2, 3},
307 {49152000, 192000, 2, 4},
310 static int cs4265_get_clk_index(int mclk
, int rate
)
314 for (i
= 0; i
< ARRAY_SIZE(clk_map_table
); i
++) {
315 if (clk_map_table
[i
].rate
== rate
&&
316 clk_map_table
[i
].mclk
== mclk
)
322 static int cs4265_set_sysclk(struct snd_soc_dai
*codec_dai
, int clk_id
,
323 unsigned int freq
, int dir
)
325 struct snd_soc_codec
*codec
= codec_dai
->codec
;
326 struct cs4265_private
*cs4265
= snd_soc_codec_get_drvdata(codec
);
330 dev_err(codec
->dev
, "Invalid clk_id %d\n", clk_id
);
333 for (i
= 0; i
< ARRAY_SIZE(clk_map_table
); i
++) {
334 if (clk_map_table
[i
].mclk
== freq
) {
335 cs4265
->sysclk
= freq
;
340 dev_err(codec
->dev
, "Invalid freq parameter %d\n", freq
);
344 static int cs4265_set_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
346 struct snd_soc_codec
*codec
= codec_dai
->codec
;
347 struct cs4265_private
*cs4265
= snd_soc_codec_get_drvdata(codec
);
350 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
351 case SND_SOC_DAIFMT_CBM_CFM
:
352 snd_soc_update_bits(codec
, CS4265_ADC_CTL
,
356 case SND_SOC_DAIFMT_CBS_CFS
:
357 snd_soc_update_bits(codec
, CS4265_ADC_CTL
,
365 /* interface format */
366 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
367 case SND_SOC_DAIFMT_I2S
:
368 iface
|= SND_SOC_DAIFMT_I2S
;
370 case SND_SOC_DAIFMT_RIGHT_J
:
371 iface
|= SND_SOC_DAIFMT_RIGHT_J
;
373 case SND_SOC_DAIFMT_LEFT_J
:
374 iface
|= SND_SOC_DAIFMT_LEFT_J
;
380 cs4265
->format
= iface
;
384 static int cs4265_digital_mute(struct snd_soc_dai
*dai
, int mute
)
386 struct snd_soc_codec
*codec
= dai
->codec
;
389 snd_soc_update_bits(codec
, CS4265_DAC_CTL
,
391 CS4265_DAC_CTL_MUTE
);
392 snd_soc_update_bits(codec
, CS4265_SPDIF_CTL2
,
393 CS4265_SPDIF_CTL2_MUTE
,
394 CS4265_SPDIF_CTL2_MUTE
);
396 snd_soc_update_bits(codec
, CS4265_DAC_CTL
,
399 snd_soc_update_bits(codec
, CS4265_SPDIF_CTL2
,
400 CS4265_SPDIF_CTL2_MUTE
,
406 static int cs4265_pcm_hw_params(struct snd_pcm_substream
*substream
,
407 struct snd_pcm_hw_params
*params
,
408 struct snd_soc_dai
*dai
)
410 struct snd_soc_codec
*codec
= dai
->codec
;
411 struct cs4265_private
*cs4265
= snd_soc_codec_get_drvdata(codec
);
414 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
&&
415 ((cs4265
->format
& SND_SOC_DAIFMT_FORMAT_MASK
)
416 == SND_SOC_DAIFMT_RIGHT_J
))
419 index
= cs4265_get_clk_index(cs4265
->sysclk
, params_rate(params
));
421 snd_soc_update_bits(codec
, CS4265_ADC_CTL
,
422 CS4265_ADC_FM
, clk_map_table
[index
].fm_mode
<< 6);
423 snd_soc_update_bits(codec
, CS4265_MCLK_FREQ
,
424 CS4265_MCLK_FREQ_MASK
,
425 clk_map_table
[index
].mclkdiv
<< 4);
428 dev_err(codec
->dev
, "can't get correct mclk\n");
432 switch (cs4265
->format
& SND_SOC_DAIFMT_FORMAT_MASK
) {
433 case SND_SOC_DAIFMT_I2S
:
434 snd_soc_update_bits(codec
, CS4265_DAC_CTL
,
435 CS4265_DAC_CTL_DIF
, (1 << 4));
436 snd_soc_update_bits(codec
, CS4265_ADC_CTL
,
437 CS4265_ADC_DIF
, (1 << 4));
438 snd_soc_update_bits(codec
, CS4265_SPDIF_CTL2
,
439 CS4265_SPDIF_CTL2_DIF
, (1 << 6));
441 case SND_SOC_DAIFMT_RIGHT_J
:
442 if (params_width(params
) == 16) {
443 snd_soc_update_bits(codec
, CS4265_DAC_CTL
,
444 CS4265_DAC_CTL_DIF
, (2 << 4));
445 snd_soc_update_bits(codec
, CS4265_SPDIF_CTL2
,
446 CS4265_SPDIF_CTL2_DIF
, (2 << 6));
448 snd_soc_update_bits(codec
, CS4265_DAC_CTL
,
449 CS4265_DAC_CTL_DIF
, (3 << 4));
450 snd_soc_update_bits(codec
, CS4265_SPDIF_CTL2
,
451 CS4265_SPDIF_CTL2_DIF
, (3 << 6));
454 case SND_SOC_DAIFMT_LEFT_J
:
455 snd_soc_update_bits(codec
, CS4265_DAC_CTL
,
456 CS4265_DAC_CTL_DIF
, 0);
457 snd_soc_update_bits(codec
, CS4265_ADC_CTL
,
459 snd_soc_update_bits(codec
, CS4265_SPDIF_CTL2
,
460 CS4265_SPDIF_CTL2_DIF
, 0);
469 static int cs4265_set_bias_level(struct snd_soc_codec
*codec
,
470 enum snd_soc_bias_level level
)
473 case SND_SOC_BIAS_ON
:
475 case SND_SOC_BIAS_PREPARE
:
476 snd_soc_update_bits(codec
, CS4265_PWRCTL
,
477 CS4265_PWRCTL_PDN
, 0);
479 case SND_SOC_BIAS_STANDBY
:
480 snd_soc_update_bits(codec
, CS4265_PWRCTL
,
484 case SND_SOC_BIAS_OFF
:
485 snd_soc_update_bits(codec
, CS4265_PWRCTL
,
493 #define CS4265_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
494 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
495 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
496 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
498 #define CS4265_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
499 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE)
501 static const struct snd_soc_dai_ops cs4265_ops
= {
502 .hw_params
= cs4265_pcm_hw_params
,
503 .digital_mute
= cs4265_digital_mute
,
504 .set_fmt
= cs4265_set_fmt
,
505 .set_sysclk
= cs4265_set_sysclk
,
508 static struct snd_soc_dai_driver cs4265_dai
[] = {
510 .name
= "cs4265-dai1",
512 .stream_name
= "DAI1 Playback",
515 .rates
= CS4265_RATES
,
516 .formats
= CS4265_FORMATS
,
519 .stream_name
= "DAI1 Capture",
522 .rates
= CS4265_RATES
,
523 .formats
= CS4265_FORMATS
,
528 .name
= "cs4265-dai2",
530 .stream_name
= "DAI2 Playback",
533 .rates
= CS4265_RATES
,
534 .formats
= CS4265_FORMATS
,
537 .stream_name
= "DAI2 Capture",
540 .rates
= CS4265_RATES
,
541 .formats
= CS4265_FORMATS
,
547 static const struct snd_soc_codec_driver soc_codec_cs4265
= {
548 .set_bias_level
= cs4265_set_bias_level
,
550 .dapm_widgets
= cs4265_dapm_widgets
,
551 .num_dapm_widgets
= ARRAY_SIZE(cs4265_dapm_widgets
),
552 .dapm_routes
= cs4265_audio_map
,
553 .num_dapm_routes
= ARRAY_SIZE(cs4265_audio_map
),
555 .controls
= cs4265_snd_controls
,
556 .num_controls
= ARRAY_SIZE(cs4265_snd_controls
),
559 static const struct regmap_config cs4265_regmap
= {
563 .max_register
= CS4265_MAX_REGISTER
,
564 .reg_defaults
= cs4265_reg_defaults
,
565 .num_reg_defaults
= ARRAY_SIZE(cs4265_reg_defaults
),
566 .readable_reg
= cs4265_readable_register
,
567 .volatile_reg
= cs4265_volatile_register
,
568 .cache_type
= REGCACHE_RBTREE
,
571 static int cs4265_i2c_probe(struct i2c_client
*i2c_client
,
572 const struct i2c_device_id
*id
)
574 struct cs4265_private
*cs4265
;
576 unsigned int devid
= 0;
579 cs4265
= devm_kzalloc(&i2c_client
->dev
, sizeof(struct cs4265_private
),
584 cs4265
->regmap
= devm_regmap_init_i2c(i2c_client
, &cs4265_regmap
);
585 if (IS_ERR(cs4265
->regmap
)) {
586 ret
= PTR_ERR(cs4265
->regmap
);
587 dev_err(&i2c_client
->dev
, "regmap_init() failed: %d\n", ret
);
591 cs4265
->reset_gpio
= devm_gpiod_get_optional(&i2c_client
->dev
,
592 "reset", GPIOD_OUT_LOW
);
593 if (IS_ERR(cs4265
->reset_gpio
))
594 return PTR_ERR(cs4265
->reset_gpio
);
596 if (cs4265
->reset_gpio
) {
598 gpiod_set_value_cansleep(cs4265
->reset_gpio
, 1);
601 i2c_set_clientdata(i2c_client
, cs4265
);
603 ret
= regmap_read(cs4265
->regmap
, CS4265_CHIP_ID
, ®
);
604 devid
= reg
& CS4265_CHIP_ID_MASK
;
605 if (devid
!= CS4265_CHIP_ID_VAL
) {
607 dev_err(&i2c_client
->dev
,
608 "CS4265 Device ID (%X). Expected %X\n",
609 devid
, CS4265_CHIP_ID
);
612 dev_info(&i2c_client
->dev
,
613 "CS4265 Version %x\n",
614 reg
& CS4265_REV_ID_MASK
);
616 regmap_write(cs4265
->regmap
, CS4265_PWRCTL
, 0x0F);
618 ret
= snd_soc_register_codec(&i2c_client
->dev
,
619 &soc_codec_cs4265
, cs4265_dai
,
620 ARRAY_SIZE(cs4265_dai
));
624 static int cs4265_i2c_remove(struct i2c_client
*client
)
626 snd_soc_unregister_codec(&client
->dev
);
630 static const struct of_device_id cs4265_of_match
[] = {
631 { .compatible
= "cirrus,cs4265", },
634 MODULE_DEVICE_TABLE(of
, cs4265_of_match
);
636 static const struct i2c_device_id cs4265_id
[] = {
640 MODULE_DEVICE_TABLE(i2c
, cs4265_id
);
642 static struct i2c_driver cs4265_i2c_driver
= {
645 .of_match_table
= cs4265_of_match
,
647 .id_table
= cs4265_id
,
648 .probe
= cs4265_i2c_probe
,
649 .remove
= cs4265_i2c_remove
,
652 module_i2c_driver(cs4265_i2c_driver
);
654 MODULE_DESCRIPTION("ASoC CS4265 driver");
655 MODULE_AUTHOR("Paul Handrigan, Cirrus Logic Inc, <paul.handrigan@cirrus.com>");
656 MODULE_LICENSE("GPL");