ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / engine / gr / gf119.c
blobe6dd651e2636269268e59dd1474cb8d635f34783
1 /*
2 * Copyright 2013 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
24 #include "gf100.h"
25 #include "ctxgf100.h"
27 /*******************************************************************************
28 * PGRAPH register lists
29 ******************************************************************************/
31 const struct gf100_gr_init
32 gf119_gr_init_pd_0[] = {
33 { 0x406024, 1, 0x04, 0x00000000 },
34 { 0x4064f0, 3, 0x04, 0x00000000 },
38 const struct gf100_gr_init
39 gf119_gr_init_ds_0[] = {
40 { 0x405844, 1, 0x04, 0x00ffffff },
41 { 0x405850, 1, 0x04, 0x00000000 },
42 { 0x405900, 1, 0x04, 0x00002834 },
43 { 0x405908, 1, 0x04, 0x00000000 },
44 { 0x405928, 2, 0x04, 0x00000000 },
48 const struct gf100_gr_init
49 gf119_gr_init_prop_0[] = {
50 { 0x418408, 1, 0x04, 0x00000000 },
51 { 0x4184a0, 3, 0x04, 0x00000000 },
55 const struct gf100_gr_init
56 gf119_gr_init_gpm_0[] = {
57 { 0x418c04, 1, 0x04, 0x00000000 },
58 { 0x418c64, 2, 0x04, 0x00000000 },
59 { 0x418c88, 1, 0x04, 0x00000000 },
60 { 0x418cb4, 2, 0x04, 0x00000000 },
64 const struct gf100_gr_init
65 gf119_gr_init_gpc_unk_1[] = {
66 { 0x418d00, 1, 0x04, 0x00000000 },
67 { 0x418d28, 2, 0x04, 0x00000000 },
68 { 0x418f00, 1, 0x04, 0x00000000 },
69 { 0x418f08, 1, 0x04, 0x00000000 },
70 { 0x418f20, 2, 0x04, 0x00000000 },
71 { 0x418e00, 1, 0x04, 0x00000003 },
72 { 0x418e08, 1, 0x04, 0x00000000 },
73 { 0x418e1c, 2, 0x04, 0x00000000 },
77 const struct gf100_gr_init
78 gf119_gr_init_tex_0[] = {
79 { 0x419ab0, 1, 0x04, 0x00000000 },
80 { 0x419ac8, 1, 0x04, 0x00000000 },
81 { 0x419ab8, 1, 0x04, 0x000000e7 },
82 { 0x419abc, 2, 0x04, 0x00000000 },
83 { 0x419ab4, 1, 0x04, 0x00000000 },
87 static const struct gf100_gr_init
88 gf119_gr_init_pe_0[] = {
89 { 0x41980c, 1, 0x04, 0x00000010 },
90 { 0x419810, 1, 0x04, 0x00000000 },
91 { 0x419814, 1, 0x04, 0x00000004 },
92 { 0x419844, 1, 0x04, 0x00000000 },
93 { 0x41984c, 1, 0x04, 0x0000a918 },
94 { 0x419850, 4, 0x04, 0x00000000 },
95 { 0x419880, 1, 0x04, 0x00000002 },
99 static const struct gf100_gr_init
100 gf119_gr_init_wwdx_0[] = {
101 { 0x419bd4, 1, 0x04, 0x00800000 },
102 { 0x419bdc, 1, 0x04, 0x00000000 },
103 { 0x419bf8, 2, 0x04, 0x00000000 },
107 static const struct gf100_gr_init
108 gf119_gr_init_tpccs_1[] = {
109 { 0x419d2c, 1, 0x04, 0x00000000 },
110 { 0x419d48, 2, 0x04, 0x00000000 },
114 const struct gf100_gr_init
115 gf119_gr_init_sm_0[] = {
116 { 0x419e00, 1, 0x04, 0x00000000 },
117 { 0x419ea0, 1, 0x04, 0x00000000 },
118 { 0x419ea4, 1, 0x04, 0x00000100 },
119 { 0x419ea8, 1, 0x04, 0x02001100 },
120 { 0x419eac, 1, 0x04, 0x11100702 },
121 { 0x419eb0, 1, 0x04, 0x00000003 },
122 { 0x419eb4, 4, 0x04, 0x00000000 },
123 { 0x419ec8, 1, 0x04, 0x0e063818 },
124 { 0x419ecc, 1, 0x04, 0x0e060e06 },
125 { 0x419ed0, 1, 0x04, 0x00003818 },
126 { 0x419ed4, 1, 0x04, 0x011104f1 },
127 { 0x419edc, 1, 0x04, 0x00000000 },
128 { 0x419f00, 1, 0x04, 0x00000000 },
129 { 0x419f2c, 1, 0x04, 0x00000000 },
133 const struct gf100_gr_init
134 gf119_gr_init_fe_1[] = {
135 { 0x40402c, 1, 0x04, 0x00000000 },
136 { 0x4040f0, 1, 0x04, 0x00000000 },
137 { 0x404174, 1, 0x04, 0x00000000 },
141 static const struct gf100_gr_pack
142 gf119_gr_pack_mmio[] = {
143 { gf100_gr_init_main_0 },
144 { gf100_gr_init_fe_0 },
145 { gf100_gr_init_pri_0 },
146 { gf100_gr_init_rstr2d_0 },
147 { gf119_gr_init_pd_0 },
148 { gf119_gr_init_ds_0 },
149 { gf100_gr_init_scc_0 },
150 { gf119_gr_init_prop_0 },
151 { gf108_gr_init_gpc_unk_0 },
152 { gf100_gr_init_setup_0 },
153 { gf100_gr_init_crstr_0 },
154 { gf108_gr_init_setup_1 },
155 { gf100_gr_init_zcull_0 },
156 { gf119_gr_init_gpm_0 },
157 { gf119_gr_init_gpc_unk_1 },
158 { gf100_gr_init_gcc_0 },
159 { gf100_gr_init_tpccs_0 },
160 { gf119_gr_init_tex_0 },
161 { gf119_gr_init_pe_0 },
162 { gf100_gr_init_l1c_0 },
163 { gf119_gr_init_wwdx_0 },
164 { gf119_gr_init_tpccs_1 },
165 { gf100_gr_init_mpc_0 },
166 { gf119_gr_init_sm_0 },
167 { gf100_gr_init_be_0 },
168 { gf119_gr_init_fe_1 },
172 /*******************************************************************************
173 * PGRAPH engine/subdev functions
174 ******************************************************************************/
176 struct nvkm_oclass *
177 gf119_gr_oclass = &(struct gf100_gr_oclass) {
178 .base.handle = NV_ENGINE(GR, 0xd9),
179 .base.ofuncs = &(struct nvkm_ofuncs) {
180 .ctor = gf100_gr_ctor,
181 .dtor = gf100_gr_dtor,
182 .init = gf100_gr_init,
183 .fini = _nvkm_gr_fini,
185 .cclass = &gf119_grctx_oclass,
186 .sclass = gf110_gr_sclass,
187 .mmio = gf119_gr_pack_mmio,
188 .fecs.ucode = &gf100_gr_fecs_ucode,
189 .gpccs.ucode = &gf100_gr_gpccs_ucode,
190 }.base;