ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / engine / gr / gk110.c
blob78e03ab1608e7306e9d9f300c051a46cfc389c42
1 /*
2 * Copyright 2013 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
24 #include "gf100.h"
25 #include "ctxgf100.h"
27 #include <subdev/timer.h>
29 #include <nvif/class.h>
31 /*******************************************************************************
32 * Graphics object classes
33 ******************************************************************************/
35 struct nvkm_oclass
36 gk110_gr_sclass[] = {
37 { 0x902d, &nvkm_object_ofuncs },
38 { 0xa140, &nvkm_object_ofuncs },
39 { KEPLER_B, &gf100_fermi_ofuncs, gf100_gr_9097_omthds },
40 { KEPLER_COMPUTE_B, &nvkm_object_ofuncs, gf100_gr_90c0_omthds },
44 /*******************************************************************************
45 * PGRAPH register lists
46 ******************************************************************************/
48 const struct gf100_gr_init
49 gk110_gr_init_fe_0[] = {
50 { 0x40415c, 1, 0x04, 0x00000000 },
51 { 0x404170, 1, 0x04, 0x00000000 },
52 { 0x4041b4, 1, 0x04, 0x00000000 },
56 const struct gf100_gr_init
57 gk110_gr_init_ds_0[] = {
58 { 0x405844, 1, 0x04, 0x00ffffff },
59 { 0x405850, 1, 0x04, 0x00000000 },
60 { 0x405900, 1, 0x04, 0x0000ff00 },
61 { 0x405908, 1, 0x04, 0x00000000 },
62 { 0x405928, 2, 0x04, 0x00000000 },
66 const struct gf100_gr_init
67 gk110_gr_init_sked_0[] = {
68 { 0x407010, 1, 0x04, 0x00000000 },
69 { 0x407040, 1, 0x04, 0x80440424 },
70 { 0x407048, 1, 0x04, 0x0000000a },
74 const struct gf100_gr_init
75 gk110_gr_init_cwd_0[] = {
76 { 0x405b44, 1, 0x04, 0x00000000 },
77 { 0x405b50, 1, 0x04, 0x00000000 },
81 const struct gf100_gr_init
82 gk110_gr_init_gpc_unk_1[] = {
83 { 0x418d00, 1, 0x04, 0x00000000 },
84 { 0x418d28, 2, 0x04, 0x00000000 },
85 { 0x418f00, 1, 0x04, 0x00000400 },
86 { 0x418f08, 1, 0x04, 0x00000000 },
87 { 0x418f20, 2, 0x04, 0x00000000 },
88 { 0x418e00, 1, 0x04, 0x00000000 },
89 { 0x418e08, 1, 0x04, 0x00000000 },
90 { 0x418e1c, 2, 0x04, 0x00000000 },
94 const struct gf100_gr_init
95 gk110_gr_init_tex_0[] = {
96 { 0x419ab0, 1, 0x04, 0x00000000 },
97 { 0x419ac8, 1, 0x04, 0x00000000 },
98 { 0x419ab8, 1, 0x04, 0x000000e7 },
99 { 0x419aec, 1, 0x04, 0x00000000 },
100 { 0x419abc, 2, 0x04, 0x00000000 },
101 { 0x419ab4, 1, 0x04, 0x00000000 },
102 { 0x419aa8, 2, 0x04, 0x00000000 },
106 static const struct gf100_gr_init
107 gk110_gr_init_l1c_0[] = {
108 { 0x419c98, 1, 0x04, 0x00000000 },
109 { 0x419ca8, 1, 0x04, 0x00000000 },
110 { 0x419cb0, 1, 0x04, 0x01000000 },
111 { 0x419cb4, 1, 0x04, 0x00000000 },
112 { 0x419cb8, 1, 0x04, 0x00b08bea },
113 { 0x419c84, 1, 0x04, 0x00010384 },
114 { 0x419cbc, 1, 0x04, 0x281b3646 },
115 { 0x419cc0, 2, 0x04, 0x00000000 },
116 { 0x419c80, 1, 0x04, 0x00020230 },
117 { 0x419ccc, 2, 0x04, 0x00000000 },
121 const struct gf100_gr_init
122 gk110_gr_init_sm_0[] = {
123 { 0x419e00, 1, 0x04, 0x00000080 },
124 { 0x419ea0, 1, 0x04, 0x00000000 },
125 { 0x419ee4, 1, 0x04, 0x00000000 },
126 { 0x419ea4, 1, 0x04, 0x00000100 },
127 { 0x419ea8, 1, 0x04, 0x00000000 },
128 { 0x419eb4, 1, 0x04, 0x00000000 },
129 { 0x419ebc, 2, 0x04, 0x00000000 },
130 { 0x419edc, 1, 0x04, 0x00000000 },
131 { 0x419f00, 1, 0x04, 0x00000000 },
132 { 0x419ed0, 1, 0x04, 0x00003234 },
133 { 0x419f74, 1, 0x04, 0x00015555 },
134 { 0x419f80, 4, 0x04, 0x00000000 },
138 static const struct gf100_gr_pack
139 gk110_gr_pack_mmio[] = {
140 { gk104_gr_init_main_0 },
141 { gk110_gr_init_fe_0 },
142 { gf100_gr_init_pri_0 },
143 { gf100_gr_init_rstr2d_0 },
144 { gf119_gr_init_pd_0 },
145 { gk110_gr_init_ds_0 },
146 { gf100_gr_init_scc_0 },
147 { gk110_gr_init_sked_0 },
148 { gk110_gr_init_cwd_0 },
149 { gf119_gr_init_prop_0 },
150 { gf108_gr_init_gpc_unk_0 },
151 { gf100_gr_init_setup_0 },
152 { gf100_gr_init_crstr_0 },
153 { gf108_gr_init_setup_1 },
154 { gf100_gr_init_zcull_0 },
155 { gf119_gr_init_gpm_0 },
156 { gk110_gr_init_gpc_unk_1 },
157 { gf100_gr_init_gcc_0 },
158 { gk104_gr_init_tpccs_0 },
159 { gk110_gr_init_tex_0 },
160 { gk104_gr_init_pe_0 },
161 { gk110_gr_init_l1c_0 },
162 { gf100_gr_init_mpc_0 },
163 { gk110_gr_init_sm_0 },
164 { gf117_gr_init_pes_0 },
165 { gf117_gr_init_wwdx_0 },
166 { gf117_gr_init_cbm_0 },
167 { gk104_gr_init_be_0 },
168 { gf100_gr_init_fe_1 },
172 /*******************************************************************************
173 * PGRAPH engine/subdev functions
174 ******************************************************************************/
177 gk110_gr_fini(struct nvkm_object *object, bool suspend)
179 struct gf100_gr_priv *priv = (void *)object;
180 static const struct {
181 u32 addr;
182 u32 data;
183 } magic[] = {
184 { 0x020520, 0xfffffffc },
185 { 0x020524, 0xfffffffe },
186 { 0x020524, 0xfffffffc },
187 { 0x020524, 0xfffffff8 },
188 { 0x020524, 0xffffffe0 },
189 { 0x020530, 0xfffffffe },
190 { 0x02052c, 0xfffffffa },
191 { 0x02052c, 0xfffffff0 },
192 { 0x02052c, 0xffffffc0 },
193 { 0x02052c, 0xffffff00 },
194 { 0x02052c, 0xfffffc00 },
195 { 0x02052c, 0xfffcfc00 },
196 { 0x02052c, 0xfff0fc00 },
197 { 0x02052c, 0xff80fc00 },
198 { 0x020528, 0xfffffffe },
199 { 0x020528, 0xfffffffc },
201 int i;
203 nv_mask(priv, 0x000200, 0x08001000, 0x00000000);
204 nv_mask(priv, 0x0206b4, 0x00000000, 0x00000000);
205 for (i = 0; i < ARRAY_SIZE(magic); i++) {
206 nv_wr32(priv, magic[i].addr, magic[i].data);
207 nv_wait(priv, magic[i].addr, 0x80000000, 0x00000000);
210 return nvkm_gr_fini(&priv->base, suspend);
213 #include "fuc/hubgk110.fuc3.h"
215 struct gf100_gr_ucode
216 gk110_gr_fecs_ucode = {
217 .code.data = gk110_grhub_code,
218 .code.size = sizeof(gk110_grhub_code),
219 .data.data = gk110_grhub_data,
220 .data.size = sizeof(gk110_grhub_data),
223 #include "fuc/gpcgk110.fuc3.h"
225 struct gf100_gr_ucode
226 gk110_gr_gpccs_ucode = {
227 .code.data = gk110_grgpc_code,
228 .code.size = sizeof(gk110_grgpc_code),
229 .data.data = gk110_grgpc_data,
230 .data.size = sizeof(gk110_grgpc_data),
233 struct nvkm_oclass *
234 gk110_gr_oclass = &(struct gf100_gr_oclass) {
235 .base.handle = NV_ENGINE(GR, 0xf0),
236 .base.ofuncs = &(struct nvkm_ofuncs) {
237 .ctor = gf100_gr_ctor,
238 .dtor = gf100_gr_dtor,
239 .init = gk104_gr_init,
240 .fini = gk110_gr_fini,
242 .cclass = &gk110_grctx_oclass,
243 .sclass = gk110_gr_sclass,
244 .mmio = gk110_gr_pack_mmio,
245 .fecs.ucode = &gk110_gr_fecs_ucode,
246 .gpccs.ucode = &gk110_gr_gpccs_ucode,
247 .ppc_nr = 2,
248 }.base;