drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin
  23  */
  24 #include <engine/msppp.h>
  25 #include <engine/falcon.h>
  26
  27 struct g98_msppp_priv {
  28         struct nvkm_falcon base;
  29 };
  30
  31 /*******************************************************************************
  32  * MSPPP object classes
  33  ******************************************************************************/
  34
  35 static struct nvkm_oclass
  36 g98_msppp_sclass[] = {
  37         { 0x88b3, &nvkm_object_ofuncs },
  38         { 0x85b3, &nvkm_object_ofuncs },
  39         {},
  40 };
  41
  42 /*******************************************************************************
  43  * PMSPPP context
  44  ******************************************************************************/
  45
  46 static struct nvkm_oclass
  47 g98_msppp_cclass = {
  48         .handle = NV_ENGCTX(MSPPP, 0x98),
  49         .ofuncs = &(struct nvkm_ofuncs) {
  50                 .ctor = _nvkm_falcon_context_ctor,
  51                 .dtor = _nvkm_falcon_context_dtor,
  52                 .init = _nvkm_falcon_context_init,
  53                 .fini = _nvkm_falcon_context_fini,
  54                 .rd32 = _nvkm_falcon_context_rd32,
  55                 .wr32 = _nvkm_falcon_context_wr32,
  56         },
  57 };
  58
  59 /*******************************************************************************
  60  * PMSPPP engine/subdev functions
  61  ******************************************************************************/
  62
  63 static int
  64 g98_msppp_init(struct nvkm_object *object)
  65 {
  66         struct g98_msppp_priv *priv = (void *)object;
  67         int ret;
  68
  69         ret = nvkm_falcon_init(&priv->base);
  70         if (ret)
  71                 return ret;
  72
  73         nv_wr32(priv, 0x086010, 0x0000ffd2);
  74         nv_wr32(priv, 0x08601c, 0x0000fff2);
  75         return 0;
  76 }
  77
  78 static int
  79 g98_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  80                struct nvkm_oclass *oclass, void *data, u32 size,
  81                struct nvkm_object **pobject)
  82 {
  83         struct g98_msppp_priv *priv;
  84         int ret;
  85
  86         ret = nvkm_falcon_create(parent, engine, oclass, 0x086000, true,
  87                                  "PMSPPP", "msppp", &priv);
  88         *pobject = nv_object(priv);
  89         if (ret)
  90                 return ret;
  91
  92         nv_subdev(priv)->unit = 0x00400002;
  93         nv_engine(priv)->cclass = &g98_msppp_cclass;
  94         nv_engine(priv)->sclass = g98_msppp_sclass;
  95         return 0;
  96 }
  97
  98 struct nvkm_oclass
  99 g98_msppp_oclass = {
 100         .handle = NV_ENGINE(MSPPP, 0x98),
 101         .ofuncs = &(struct nvkm_ofuncs) {
 102                 .ctor = g98_msppp_ctor,
 103                 .dtor = _nvkm_falcon_dtor,
 104                 .init = g98_msppp_init,
 105                 .fini = _nvkm_falcon_fini,
 106                 .rd32 = _nvkm_falcon_rd32,
 107                 .wr32 = _nvkm_falcon_wr32,
 108         },
 109 };