ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / subdev / i2c / gf110.c
blob4d4ac66381406ae7b4ed3ab4f4f44ae5e4ed5c8e
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
24 #include "nv50.h"
26 static int
27 gf110_i2c_sense_scl(struct nvkm_i2c_port *base)
29 struct nv50_i2c_priv *priv = (void *)nvkm_i2c(base);
30 struct nv50_i2c_port *port = (void *)base;
31 return !!(nv_rd32(priv, port->addr) & 0x00000010);
34 static int
35 gf110_i2c_sense_sda(struct nvkm_i2c_port *base)
37 struct nv50_i2c_priv *priv = (void *)nvkm_i2c(base);
38 struct nv50_i2c_port *port = (void *)base;
39 return !!(nv_rd32(priv, port->addr) & 0x00000020);
42 static const struct nvkm_i2c_func
43 gf110_i2c_func = {
44 .drive_scl = nv50_i2c_drive_scl,
45 .drive_sda = nv50_i2c_drive_sda,
46 .sense_scl = gf110_i2c_sense_scl,
47 .sense_sda = gf110_i2c_sense_sda,
50 int
51 gf110_i2c_port_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
52 struct nvkm_oclass *oclass, void *data, u32 index,
53 struct nvkm_object **pobject)
55 struct dcb_i2c_entry *info = data;
56 struct nv50_i2c_port *port;
57 int ret;
59 ret = nvkm_i2c_port_create(parent, engine, oclass, index,
60 &nvkm_i2c_bit_algo, &gf110_i2c_func, &port);
61 *pobject = nv_object(port);
62 if (ret)
63 return ret;
65 port->state = 0x00000007;
66 port->addr = 0x00d014 + (info->drive * 0x20);
67 return 0;
70 struct nvkm_oclass
71 gf110_i2c_sclass[] = {
72 { .handle = NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_BIT),
73 .ofuncs = &(struct nvkm_ofuncs) {
74 .ctor = gf110_i2c_port_ctor,
75 .dtor = _nvkm_i2c_port_dtor,
76 .init = nv50_i2c_port_init,
77 .fini = _nvkm_i2c_port_fini,
80 { .handle = NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_AUX),
81 .ofuncs = &(struct nvkm_ofuncs) {
82 .ctor = g94_aux_port_ctor,
83 .dtor = _nvkm_i2c_port_dtor,
84 .init = _nvkm_i2c_port_init,
85 .fini = _nvkm_i2c_port_fini,
91 struct nvkm_oclass *
92 gf110_i2c_oclass = &(struct nvkm_i2c_impl) {
93 .base.handle = NV_SUBDEV(I2C, 0xd0),
94 .base.ofuncs = &(struct nvkm_ofuncs) {
95 .ctor = _nvkm_i2c_ctor,
96 .dtor = _nvkm_i2c_dtor,
97 .init = _nvkm_i2c_init,
98 .fini = _nvkm_i2c_fini,
100 .sclass = gf110_i2c_sclass,
101 .pad_x = &nv04_i2c_pad_oclass,
102 .pad_s = &g94_i2c_pad_oclass,
103 .aux = 4,
104 .aux_stat = g94_aux_stat,
105 .aux_mask = g94_aux_mask,
106 }.base;