ARM: pmu: add support for interrupt-affinity property
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / subdev / instmem / nv50.c
blob8404143f93ee4b6721ca198e03861b5308570dbc
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
24 #include "priv.h"
26 #include <subdev/fb.h>
28 struct nv50_instmem_priv {
29 struct nvkm_instmem base;
30 spinlock_t lock;
31 u64 addr;
34 struct nv50_instobj_priv {
35 struct nvkm_instobj base;
36 struct nvkm_mem *mem;
39 /******************************************************************************
40 * instmem object implementation
41 *****************************************************************************/
43 static u32
44 nv50_instobj_rd32(struct nvkm_object *object, u64 offset)
46 struct nv50_instmem_priv *priv = (void *)nvkm_instmem(object);
47 struct nv50_instobj_priv *node = (void *)object;
48 unsigned long flags;
49 u64 base = (node->mem->offset + offset) & 0xffffff00000ULL;
50 u64 addr = (node->mem->offset + offset) & 0x000000fffffULL;
51 u32 data;
53 spin_lock_irqsave(&priv->lock, flags);
54 if (unlikely(priv->addr != base)) {
55 nv_wr32(priv, 0x001700, base >> 16);
56 priv->addr = base;
58 data = nv_rd32(priv, 0x700000 + addr);
59 spin_unlock_irqrestore(&priv->lock, flags);
60 return data;
63 static void
64 nv50_instobj_wr32(struct nvkm_object *object, u64 offset, u32 data)
66 struct nv50_instmem_priv *priv = (void *)nvkm_instmem(object);
67 struct nv50_instobj_priv *node = (void *)object;
68 unsigned long flags;
69 u64 base = (node->mem->offset + offset) & 0xffffff00000ULL;
70 u64 addr = (node->mem->offset + offset) & 0x000000fffffULL;
72 spin_lock_irqsave(&priv->lock, flags);
73 if (unlikely(priv->addr != base)) {
74 nv_wr32(priv, 0x001700, base >> 16);
75 priv->addr = base;
77 nv_wr32(priv, 0x700000 + addr, data);
78 spin_unlock_irqrestore(&priv->lock, flags);
81 static void
82 nv50_instobj_dtor(struct nvkm_object *object)
84 struct nv50_instobj_priv *node = (void *)object;
85 struct nvkm_fb *pfb = nvkm_fb(object);
86 pfb->ram->put(pfb, &node->mem);
87 nvkm_instobj_destroy(&node->base);
90 static int
91 nv50_instobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
92 struct nvkm_oclass *oclass, void *data, u32 size,
93 struct nvkm_object **pobject)
95 struct nvkm_fb *pfb = nvkm_fb(parent);
96 struct nvkm_instobj_args *args = data;
97 struct nv50_instobj_priv *node;
98 int ret;
100 args->size = max((args->size + 4095) & ~4095, (u32)4096);
101 args->align = max((args->align + 4095) & ~4095, (u32)4096);
103 ret = nvkm_instobj_create(parent, engine, oclass, &node);
104 *pobject = nv_object(node);
105 if (ret)
106 return ret;
108 ret = pfb->ram->get(pfb, args->size, args->align, 0, 0x800, &node->mem);
109 if (ret)
110 return ret;
112 node->base.addr = node->mem->offset;
113 node->base.size = node->mem->size << 12;
114 node->mem->page_shift = 12;
115 return 0;
118 static struct nvkm_instobj_impl
119 nv50_instobj_oclass = {
120 .base.ofuncs = &(struct nvkm_ofuncs) {
121 .ctor = nv50_instobj_ctor,
122 .dtor = nv50_instobj_dtor,
123 .init = _nvkm_instobj_init,
124 .fini = _nvkm_instobj_fini,
125 .rd32 = nv50_instobj_rd32,
126 .wr32 = nv50_instobj_wr32,
130 /******************************************************************************
131 * instmem subdev implementation
132 *****************************************************************************/
134 static int
135 nv50_instmem_fini(struct nvkm_object *object, bool suspend)
137 struct nv50_instmem_priv *priv = (void *)object;
138 priv->addr = ~0ULL;
139 return nvkm_instmem_fini(&priv->base, suspend);
142 static int
143 nv50_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
144 struct nvkm_oclass *oclass, void *data, u32 size,
145 struct nvkm_object **pobject)
147 struct nv50_instmem_priv *priv;
148 int ret;
150 ret = nvkm_instmem_create(parent, engine, oclass, &priv);
151 *pobject = nv_object(priv);
152 if (ret)
153 return ret;
155 spin_lock_init(&priv->lock);
156 return 0;
159 struct nvkm_oclass *
160 nv50_instmem_oclass = &(struct nvkm_instmem_impl) {
161 .base.handle = NV_SUBDEV(INSTMEM, 0x50),
162 .base.ofuncs = &(struct nvkm_ofuncs) {
163 .ctor = nv50_instmem_ctor,
164 .dtor = _nvkm_instmem_dtor,
165 .init = _nvkm_instmem_init,
166 .fini = nv50_instmem_fini,
168 .instobj = &nv50_instobj_oclass.base,
169 }.base;