drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25
  26 static int
  27 gk104_ltc_init(struct nvkm_object *object)
  28 {
  29         struct nvkm_ltc_priv *priv = (void *)object;
  30         u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
  31         int ret;
  32
  33         ret = nvkm_ltc_init(priv);
  34         if (ret)
  35                 return ret;
  36
  37         nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
  38         nv_wr32(priv, 0x17e000, priv->ltc_nr);
  39         nv_wr32(priv, 0x17e8d4, priv->tag_base);
  40         nv_mask(priv, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
  41         return 0;
  42 }
  43
  44 struct nvkm_oclass *
  45 gk104_ltc_oclass = &(struct nvkm_ltc_impl) {
  46         .base.handle = NV_SUBDEV(LTC, 0xe4),
  47         .base.ofuncs = &(struct nvkm_ofuncs) {
  48                 .ctor = gf100_ltc_ctor,
  49                 .dtor = gf100_ltc_dtor,
  50                 .init = gk104_ltc_init,
  51                 .fini = _nvkm_ltc_fini,
  52         },
  53         .intr = gf100_ltc_intr,
  54         .cbc_clear = gf100_ltc_cbc_clear,
  55         .cbc_wait = gf100_ltc_cbc_wait,
  56         .zbc = 16,
  57         .zbc_clear_color = gf100_ltc_zbc_clear_color,
  58         .zbc_clear_depth = gf100_ltc_zbc_clear_depth,
  59 }.base;