1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 * Author: Robert Nelson <robertcnelson@gmail.com>
10 #include "am335x-osd335x-common.dtsi"
13 model = "TI AM335x PocketBeagle";
14 compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx";
21 pinctrl-names = "default";
22 pinctrl-0 = <&usr_leds_pins>;
24 compatible = "gpio-leds";
27 label = "beaglebone:green:usr0";
28 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
29 linux,default-trigger = "heartbeat";
30 default-state = "off";
34 label = "beaglebone:green:usr1";
35 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
36 linux,default-trigger = "mmc0";
37 default-state = "off";
41 label = "beaglebone:green:usr2";
42 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
43 linux,default-trigger = "cpu0";
44 default-state = "off";
48 label = "beaglebone:green:usr3";
49 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
50 default-state = "off";
54 vmmcsd_fixed: fixedregulator0 {
55 compatible = "regulator-fixed";
56 regulator-name = "vmmcsd_fixed";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
208 pinctrl-names = "default";
210 pinctrl-0 = < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
211 &P2_33_gpio &P2_22_gpio &P2_18_gpio &P2_10_gpio
212 &P2_06_gpio &P2_04_gpio &P2_02_gpio &P2_08_gpio
215 /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
216 P2_03_gpio: pinmux_P2_03_gpio {
217 pinctrl-single,pins = <
218 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7)
220 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
221 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
224 /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
225 P1_34_gpio: pinmux_P1_34_gpio {
226 pinctrl-single,pins = <
227 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE7)
229 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
230 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
233 /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
234 P2_19_gpio: pinmux_P2_19_gpio {
235 pinctrl-single,pins = <
236 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE7)
238 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
239 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
242 /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */
243 P2_24_gpio: pinmux_P2_24_gpio {
244 pinctrl-single,pins = <
245 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7)
247 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
248 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
251 /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */
252 P2_33_gpio: pinmux_P2_33_gpio {
253 pinctrl-single,pins = <
254 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7)
256 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
257 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
260 /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */
261 P2_22_gpio: pinmux_P2_22_gpio {
262 pinctrl-single,pins = <
263 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7)
265 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
266 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
269 /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */
270 P2_18_gpio: pinmux_P2_18_gpio {
271 pinctrl-single,pins = <
272 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7)
274 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
275 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
278 /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */
279 P2_10_gpio: pinmux_P2_10_gpio {
280 pinctrl-single,pins = <
281 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLUP, MUX_MODE7)
283 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
284 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
287 /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */
288 P2_06_gpio: pinmux_P2_06_gpio {
289 pinctrl-single,pins = <
290 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7)
292 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
293 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
296 /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */
297 P2_04_gpio: pinmux_P2_04_gpio {
298 pinctrl-single,pins = <
299 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE7)
301 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
302 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
305 /* P2_02 (ZCZ ball V17) gpio1_27 0x86c PIN 27 */
306 P2_02_gpio: pinmux_P2_02_gpio {
307 pinctrl-single,pins = <
308 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE7)
310 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
311 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
314 /* P2_08 (ZCZ ball U18) gpio1_28 0x878 PIN 30 */
315 P2_08_gpio: pinmux_P2_08_gpio {
316 pinctrl-single,pins = <
317 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7)
319 pinctrl-single,bias-pullup = < 0x00 0x10 0x00 0x18>;
320 pinctrl-single,bias-pulldown = < 0x00 0x00 0x10 0x18>;
323 /* P2_17 (ZCZ ball V12) gpio2_1 0x88c PIN 35 */
324 P2_17_gpio: pinmux_P2_17_gpio {
325 pinctrl-single,pins = <
326 AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7)
328 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
329 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
332 i2c2_pins: pinmux-i2c2-pins {
333 pinctrl-single,pins = <
334 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
335 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
339 ehrpwm0_pins: pinmux-ehrpwm0-pins {
340 pinctrl-single,pins = <
341 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
345 ehrpwm1_pins: pinmux-ehrpwm1-pins {
346 pinctrl-single,pins = <
347 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
351 mmc0_pins: pinmux-mmc0-pins {
352 pinctrl-single,pins = <
353 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
354 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
355 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
356 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
357 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
358 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
359 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
363 spi0_pins: pinmux-spi0-pins {
364 pinctrl-single,pins = <
365 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
366 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
367 AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
368 AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
372 spi1_pins: pinmux-spi1-pins {
373 pinctrl-single,pins = <
374 AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
375 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
376 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
377 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
381 usr_leds_pins: pinmux-usr-leds-pins {
382 pinctrl-single,pins = <
383 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
384 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
385 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
386 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
390 uart0_pins: pinmux-uart0-pins {
391 pinctrl-single,pins = <
392 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
393 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
397 uart4_pins: pinmux-uart4-pins {
398 pinctrl-single,pins = <
399 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
400 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
411 pinctrl-names = "default";
412 pinctrl-0 = <&ehrpwm0_pins>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&ehrpwm1_pins>;
427 compatible = "atmel,24c256";
433 pinctrl-names = "default";
434 pinctrl-0 = <&i2c2_pins>;
437 clock-frequency = <400000>;
442 vmmc-supply = <&vmmcsd_fixed>;
444 pinctrl-names = "default";
445 pinctrl-0 = <&mmc0_pins>;
446 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
450 system-power-controller;
456 ti,adc-channels = <0 1 2 3 4 5 6 7>;
457 ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
458 ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
459 ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
464 pinctrl-names = "default";
465 pinctrl-0 = <&uart0_pins>;
471 pinctrl-names = "default";
472 pinctrl-0 = <&uart4_pins>;