1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Freescale Semiconductor, Inc.
5 #include "imx23-pinfunc.h"
11 interrupt-parent = <&icoll>;
13 * The decompressor and also some bootloaders rely on a
14 * pre-existing /chosen node to be available to insert the
15 * command line and merge other ATAGS info.
35 compatible = "arm,arm926ej-s";
42 compatible = "simple-bus";
45 reg = <0x80000000 0x80000>;
49 compatible = "simple-bus";
52 reg = <0x80000000 0x40000>;
55 icoll: interrupt-controller@80000000 {
56 compatible = "fsl,imx23-icoll", "fsl,icoll";
58 #interrupt-cells = <1>;
59 reg = <0x80000000 0x2000>;
62 dma_apbh: dma-apbh@80004000 {
63 compatible = "fsl,imx23-dma-apbh";
64 reg = <0x80004000 0x2000>;
65 interrupts = <0 14 20 0
67 interrupt-names = "empty", "ssp0", "ssp1", "empty",
68 "gpmi0", "gpmi1", "gpmi2", "gpmi3";
75 reg = <0x80008000 0x2000>;
79 nand-controller@8000c000 {
80 compatible = "fsl,imx23-gpmi-nand";
83 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
84 reg-names = "gpmi-nand", "bch";
86 interrupt-names = "bch";
88 clock-names = "gpmi_io";
95 reg = <0x80010000 0x2000>;
104 reg = <0x80014000 0x2000>;
109 #address-cells = <1>;
111 compatible = "fsl,imx23-pinctrl", "simple-bus";
112 reg = <0x80018000 0x2000>;
115 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
120 interrupt-controller;
121 #interrupt-cells = <2>;
125 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
130 interrupt-controller;
131 #interrupt-cells = <2>;
135 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
140 interrupt-controller;
141 #interrupt-cells = <2>;
144 duart_pins_a: duart@0 {
147 MX23_PAD_PWM0__DUART_RX
148 MX23_PAD_PWM1__DUART_TX
150 fsl,drive-strength = <MXS_DRIVE_4mA>;
151 fsl,voltage = <MXS_VOLTAGE_HIGH>;
152 fsl,pull-up = <MXS_PULL_DISABLE>;
155 auart0_pins_a: auart0@0 {
158 MX23_PAD_AUART1_RX__AUART1_RX
159 MX23_PAD_AUART1_TX__AUART1_TX
160 MX23_PAD_AUART1_CTS__AUART1_CTS
161 MX23_PAD_AUART1_RTS__AUART1_RTS
163 fsl,drive-strength = <MXS_DRIVE_4mA>;
164 fsl,voltage = <MXS_VOLTAGE_HIGH>;
165 fsl,pull-up = <MXS_PULL_DISABLE>;
168 auart0_2pins_a: auart0-2pins@0 {
171 MX23_PAD_I2C_SCL__AUART1_TX
172 MX23_PAD_I2C_SDA__AUART1_RX
174 fsl,drive-strength = <MXS_DRIVE_4mA>;
175 fsl,voltage = <MXS_VOLTAGE_HIGH>;
176 fsl,pull-up = <MXS_PULL_DISABLE>;
179 auart1_2pins_a: auart1-2pins@0 {
182 MX23_PAD_GPMI_D14__AUART2_RX
183 MX23_PAD_GPMI_D15__AUART2_TX
185 fsl,drive-strength = <MXS_DRIVE_4mA>;
186 fsl,voltage = <MXS_VOLTAGE_HIGH>;
187 fsl,pull-up = <MXS_PULL_DISABLE>;
190 gpmi_pins_a: gpmi-nand@0 {
193 MX23_PAD_GPMI_D00__GPMI_D00
194 MX23_PAD_GPMI_D01__GPMI_D01
195 MX23_PAD_GPMI_D02__GPMI_D02
196 MX23_PAD_GPMI_D03__GPMI_D03
197 MX23_PAD_GPMI_D04__GPMI_D04
198 MX23_PAD_GPMI_D05__GPMI_D05
199 MX23_PAD_GPMI_D06__GPMI_D06
200 MX23_PAD_GPMI_D07__GPMI_D07
201 MX23_PAD_GPMI_CLE__GPMI_CLE
202 MX23_PAD_GPMI_ALE__GPMI_ALE
203 MX23_PAD_GPMI_RDY0__GPMI_RDY0
204 MX23_PAD_GPMI_RDY1__GPMI_RDY1
205 MX23_PAD_GPMI_WPN__GPMI_WPN
206 MX23_PAD_GPMI_WRN__GPMI_WRN
207 MX23_PAD_GPMI_RDN__GPMI_RDN
208 MX23_PAD_GPMI_CE1N__GPMI_CE1N
209 MX23_PAD_GPMI_CE0N__GPMI_CE0N
211 fsl,drive-strength = <MXS_DRIVE_4mA>;
212 fsl,voltage = <MXS_VOLTAGE_HIGH>;
213 fsl,pull-up = <MXS_PULL_DISABLE>;
216 gpmi_pins_fixup: gpmi-pins-fixup@0 {
219 MX23_PAD_GPMI_WPN__GPMI_WPN
220 MX23_PAD_GPMI_WRN__GPMI_WRN
221 MX23_PAD_GPMI_RDN__GPMI_RDN
223 fsl,drive-strength = <MXS_DRIVE_12mA>;
226 mmc0_4bit_pins_a: mmc0-4bit@0 {
229 MX23_PAD_SSP1_DATA0__SSP1_DATA0
230 MX23_PAD_SSP1_DATA1__SSP1_DATA1
231 MX23_PAD_SSP1_DATA2__SSP1_DATA2
232 MX23_PAD_SSP1_DATA3__SSP1_DATA3
233 MX23_PAD_SSP1_CMD__SSP1_CMD
234 MX23_PAD_SSP1_SCK__SSP1_SCK
236 fsl,drive-strength = <MXS_DRIVE_8mA>;
237 fsl,voltage = <MXS_VOLTAGE_HIGH>;
238 fsl,pull-up = <MXS_PULL_ENABLE>;
241 mmc0_8bit_pins_a: mmc0-8bit@0 {
244 MX23_PAD_SSP1_DATA0__SSP1_DATA0
245 MX23_PAD_SSP1_DATA1__SSP1_DATA1
246 MX23_PAD_SSP1_DATA2__SSP1_DATA2
247 MX23_PAD_SSP1_DATA3__SSP1_DATA3
248 MX23_PAD_GPMI_D08__SSP1_DATA4
249 MX23_PAD_GPMI_D09__SSP1_DATA5
250 MX23_PAD_GPMI_D10__SSP1_DATA6
251 MX23_PAD_GPMI_D11__SSP1_DATA7
252 MX23_PAD_SSP1_CMD__SSP1_CMD
253 MX23_PAD_SSP1_DETECT__SSP1_DETECT
254 MX23_PAD_SSP1_SCK__SSP1_SCK
256 fsl,drive-strength = <MXS_DRIVE_8mA>;
257 fsl,voltage = <MXS_VOLTAGE_HIGH>;
258 fsl,pull-up = <MXS_PULL_ENABLE>;
261 mmc0_pins_fixup: mmc0-pins-fixup@0 {
264 MX23_PAD_SSP1_DETECT__SSP1_DETECT
265 MX23_PAD_SSP1_SCK__SSP1_SCK
267 fsl,pull-up = <MXS_PULL_DISABLE>;
270 mmc0_sck_cfg: mmc0-sck-cfg@0 {
273 MX23_PAD_SSP1_SCK__SSP1_SCK
275 fsl,pull-up = <MXS_PULL_DISABLE>;
278 mmc1_4bit_pins_a: mmc1-4bit@0 {
281 MX23_PAD_GPMI_D00__SSP2_DATA0
282 MX23_PAD_GPMI_D01__SSP2_DATA1
283 MX23_PAD_GPMI_D02__SSP2_DATA2
284 MX23_PAD_GPMI_D03__SSP2_DATA3
285 MX23_PAD_GPMI_RDY1__SSP2_CMD
286 MX23_PAD_GPMI_WRN__SSP2_SCK
288 fsl,drive-strength = <MXS_DRIVE_8mA>;
289 fsl,voltage = <MXS_VOLTAGE_HIGH>;
290 fsl,pull-up = <MXS_PULL_ENABLE>;
293 mmc1_8bit_pins_a: mmc1-8bit@0 {
296 MX23_PAD_GPMI_D00__SSP2_DATA0
297 MX23_PAD_GPMI_D01__SSP2_DATA1
298 MX23_PAD_GPMI_D02__SSP2_DATA2
299 MX23_PAD_GPMI_D03__SSP2_DATA3
300 MX23_PAD_GPMI_D04__SSP2_DATA4
301 MX23_PAD_GPMI_D05__SSP2_DATA5
302 MX23_PAD_GPMI_D06__SSP2_DATA6
303 MX23_PAD_GPMI_D07__SSP2_DATA7
304 MX23_PAD_GPMI_RDY1__SSP2_CMD
305 MX23_PAD_GPMI_WRN__SSP2_SCK
307 fsl,drive-strength = <MXS_DRIVE_8mA>;
308 fsl,voltage = <MXS_VOLTAGE_HIGH>;
309 fsl,pull-up = <MXS_PULL_ENABLE>;
312 pwm2_pins_a: pwm2@0 {
317 fsl,drive-strength = <MXS_DRIVE_4mA>;
318 fsl,voltage = <MXS_VOLTAGE_HIGH>;
319 fsl,pull-up = <MXS_PULL_DISABLE>;
322 lcdif_24bit_pins_a: lcdif-24bit@0 {
325 MX23_PAD_LCD_D00__LCD_D00
326 MX23_PAD_LCD_D01__LCD_D01
327 MX23_PAD_LCD_D02__LCD_D02
328 MX23_PAD_LCD_D03__LCD_D03
329 MX23_PAD_LCD_D04__LCD_D04
330 MX23_PAD_LCD_D05__LCD_D05
331 MX23_PAD_LCD_D06__LCD_D06
332 MX23_PAD_LCD_D07__LCD_D07
333 MX23_PAD_LCD_D08__LCD_D08
334 MX23_PAD_LCD_D09__LCD_D09
335 MX23_PAD_LCD_D10__LCD_D10
336 MX23_PAD_LCD_D11__LCD_D11
337 MX23_PAD_LCD_D12__LCD_D12
338 MX23_PAD_LCD_D13__LCD_D13
339 MX23_PAD_LCD_D14__LCD_D14
340 MX23_PAD_LCD_D15__LCD_D15
341 MX23_PAD_LCD_D16__LCD_D16
342 MX23_PAD_LCD_D17__LCD_D17
343 MX23_PAD_GPMI_D08__LCD_D18
344 MX23_PAD_GPMI_D09__LCD_D19
345 MX23_PAD_GPMI_D10__LCD_D20
346 MX23_PAD_GPMI_D11__LCD_D21
347 MX23_PAD_GPMI_D12__LCD_D22
348 MX23_PAD_GPMI_D13__LCD_D23
349 MX23_PAD_LCD_DOTCK__LCD_DOTCK
350 MX23_PAD_LCD_ENABLE__LCD_ENABLE
351 MX23_PAD_LCD_HSYNC__LCD_HSYNC
352 MX23_PAD_LCD_VSYNC__LCD_VSYNC
354 fsl,drive-strength = <MXS_DRIVE_4mA>;
355 fsl,voltage = <MXS_VOLTAGE_HIGH>;
356 fsl,pull-up = <MXS_PULL_DISABLE>;
359 spi2_pins_a: spi2@0 {
362 MX23_PAD_GPMI_WRN__SSP2_SCK
363 MX23_PAD_GPMI_RDY1__SSP2_CMD
364 MX23_PAD_GPMI_D00__SSP2_DATA0
365 MX23_PAD_GPMI_D03__SSP2_DATA3
367 fsl,drive-strength = <MXS_DRIVE_8mA>;
368 fsl,voltage = <MXS_VOLTAGE_HIGH>;
369 fsl,pull-up = <MXS_PULL_ENABLE>;
375 MX23_PAD_I2C_SCL__I2C_SCL
376 MX23_PAD_I2C_SDA__I2C_SDA
378 fsl,drive-strength = <MXS_DRIVE_8mA>;
379 fsl,voltage = <MXS_VOLTAGE_HIGH>;
380 fsl,pull-up = <MXS_PULL_ENABLE>;
386 MX23_PAD_LCD_ENABLE__I2C_SCL
387 MX23_PAD_LCD_HSYNC__I2C_SDA
389 fsl,drive-strength = <MXS_DRIVE_8mA>;
390 fsl,voltage = <MXS_VOLTAGE_HIGH>;
391 fsl,pull-up = <MXS_PULL_ENABLE>;
397 MX23_PAD_SSP1_DATA1__I2C_SCL
398 MX23_PAD_SSP1_DATA2__I2C_SDA
400 fsl,drive-strength = <MXS_DRIVE_8mA>;
401 fsl,voltage = <MXS_VOLTAGE_HIGH>;
402 fsl,pull-up = <MXS_PULL_ENABLE>;
407 compatible = "fsl,imx23-digctl";
408 reg = <0x8001c000 2000>;
413 reg = <0x80020000 0x2000>;
417 dma_apbx: dma-apbx@80024000 {
418 compatible = "fsl,imx23-dma-apbx";
419 reg = <0x80024000 0x2000>;
420 interrupts = <7 5 9 26
424 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
425 "saif0", "empty", "auart0-rx", "auart0-tx",
426 "auart1-rx", "auart1-tx", "saif1", "empty",
427 "empty", "empty", "empty", "empty";
433 dcp: crypto@80028000 {
434 compatible = "fsl,imx23-dcp";
435 reg = <0x80028000 0x2000>;
436 interrupts = <53 54>;
441 reg = <0x8002a000 0x2000>;
446 compatible = "fsl,imx23-ocotp", "fsl,ocotp";
447 #address-cells = <1>;
449 reg = <0x8002c000 0x2000>;
454 reg = <0x8002e000 0x2000>;
459 compatible = "fsl,imx23-lcdif";
460 reg = <0x80030000 2000>;
461 interrupts = <46 45>;
467 reg = <0x80034000 0x2000>;
470 dmas = <&dma_apbh 2>;
476 reg = <0x80038000 0x2000>;
482 compatible = "simple-bus";
483 #address-cells = <1>;
485 reg = <0x80040000 0x40000>;
488 clks: clkctrl@80040000 {
489 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
490 reg = <0x80040000 0x2000>;
494 saif0: saif@80042000 {
495 reg = <0x80042000 0x2000>;
496 dmas = <&dma_apbx 4>;
502 reg = <0x80044000 0x2000>;
506 saif1: saif@80046000 {
507 reg = <0x80046000 0x2000>;
508 dmas = <&dma_apbx 10>;
514 reg = <0x80048000 0x2000>;
515 dmas = <&dma_apbx 1>;
521 reg = <0x8004c000 0x2000>;
522 dmas = <&dma_apbx 0>;
527 lradc: lradc@80050000 {
528 compatible = "fsl,imx23-lradc";
529 reg = <0x80050000 0x2000>;
530 interrupts = <36 37 38 39 40 41 42 43 44>;
533 #io-channel-cells = <1>;
537 reg = <0x80054000 2000>;
538 dmas = <&dma_apbx 2>;
544 #address-cells = <1>;
546 compatible = "fsl,imx23-i2c";
547 reg = <0x80058000 0x2000>;
549 clock-frequency = <100000>;
550 dmas = <&dma_apbx 3>;
556 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
557 reg = <0x8005c000 0x2000>;
562 compatible = "fsl,imx23-pwm";
563 reg = <0x80064000 0x2000>;
566 fsl,pwm-number = <5>;
571 compatible = "fsl,imx23-timrot", "fsl,timrot";
572 reg = <0x80068000 0x2000>;
573 interrupts = <28 29 30 31>;
577 auart0: serial@8006c000 {
578 compatible = "fsl,imx23-auart";
579 reg = <0x8006c000 0x2000>;
582 dmas = <&dma_apbx 6>, <&dma_apbx 7>;
583 dma-names = "rx", "tx";
587 auart1: serial@8006e000 {
588 compatible = "fsl,imx23-auart";
589 reg = <0x8006e000 0x2000>;
592 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
593 dma-names = "rx", "tx";
597 duart: serial@80070000 {
598 compatible = "arm,pl011", "arm,primecell";
599 reg = <0x80070000 0x2000>;
601 clocks = <&clks 32>, <&clks 16>;
602 clock-names = "uart", "apb_pclk";
606 usbphy0: usbphy@8007c000 {
607 compatible = "fsl,imx23-usbphy";
608 reg = <0x8007c000 0x2000>;
616 compatible = "simple-bus";
617 #address-cells = <1>;
619 reg = <0x80080000 0x80000>;
623 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
624 reg = <0x80080000 0x40000>;
626 fsl,usbphy = <&usbphy0>;
633 compatible = "iio-hwmon";
634 io-channels = <&lradc 8>;