WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / mach-ixp4xx / nas100d-pci.c
blob1176f9cb48650afc49d2a4565c6aa899bad3cbde
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * arch/arm/mach-ixp4xx/nas100d-pci.c
5 * NAS 100d board-level PCI initialization
7 * based on ixdp425-pci.c:
8 * Copyright (C) 2002 Intel Corporation.
9 * Copyright (C) 2003-2004 MontaVista Software, Inc.
11 * Maintainer: http://www.nslu2-linux.org/
14 #include <linux/pci.h>
15 #include <linux/init.h>
16 #include <linux/irq.h>
17 #include <asm/mach/pci.h>
18 #include <asm/mach-types.h>
20 #include "irqs.h"
22 #define MAX_DEV 3
23 #define IRQ_LINES 3
25 /* PCI controller GPIO to IRQ pin mappings */
26 #define INTA 11
27 #define INTB 10
28 #define INTC 9
29 #define INTD 8
30 #define INTE 7
32 void __init nas100d_pci_preinit(void)
34 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
35 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
36 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
37 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
38 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
39 ixp4xx_pci_preinit();
42 static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
44 static int pci_irq_table[MAX_DEV][IRQ_LINES] = {
45 { IXP4XX_GPIO_IRQ(INTA), -1, -1 },
46 { IXP4XX_GPIO_IRQ(INTB), -1, -1 },
47 { IXP4XX_GPIO_IRQ(INTC), IXP4XX_GPIO_IRQ(INTD),
48 IXP4XX_GPIO_IRQ(INTE) },
51 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
52 return pci_irq_table[slot - 1][pin - 1];
54 return -1;
57 struct hw_pci __initdata nas100d_pci = {
58 .nr_controllers = 1,
59 .ops = &ixp4xx_ops,
60 .preinit = nas100d_pci_preinit,
61 .setup = ixp4xx_setup,
62 .map_irq = nas100d_map_irq,
65 int __init nas100d_pci_init(void)
67 if (machine_is_nas100d())
68 pci_common_init(&nas100d_pci);
70 return 0;
73 subsys_initcall(nas100d_pci_init);