1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * BRIEF MODULE DESCRIPTION
4 * MyCable XXS1500 board support
6 * Copyright 2003, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/platform_device.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
17 #include <asm/bootinfo.h>
18 #include <asm/reboot.h>
19 #include <asm/setup.h>
20 #include <asm/mach-au1x00/au1000.h>
23 const char *get_system_type(void)
28 void prom_putchar(char c
)
30 alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR
, c
);
33 static void xxs1500_reset(char *c
)
35 /* Jump to the reset vector */
36 __asm__
__volatile__("jr\t%0" : : "r"(0xbfc00000));
39 static void xxs1500_power_off(void)
48 void __init
board_setup(void)
52 pm_power_off
= xxs1500_power_off
;
53 _machine_halt
= xxs1500_power_off
;
54 _machine_restart
= xxs1500_reset
;
56 alchemy_gpio1_input_enable();
57 alchemy_gpio2_enable();
59 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
60 pin_func
= alchemy_rdsys(AU1000_SYS_PINFUNC
) & ~SYS_PF_UR3
;
61 pin_func
|= SYS_PF_UR3
;
62 alchemy_wrsys(pin_func
, AU1000_SYS_PINFUNC
);
65 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR
);
66 /* Enable DTR (MCR bit 0) = USB power up */
67 __raw_writel(1, (void __iomem
*)KSEG1ADDR(AU1000_UART3_PHYS_ADDR
+ 0x18));
71 /******************************************************************************/
73 static struct resource xxs1500_pcmcia_res
[] = {
76 .flags
= IORESOURCE_MEM
,
77 .start
= AU1000_PCMCIA_IO_PHYS_ADDR
,
78 .end
= AU1000_PCMCIA_IO_PHYS_ADDR
+ 0x000400000 - 1,
81 .name
= "pcmcia-attr",
82 .flags
= IORESOURCE_MEM
,
83 .start
= AU1000_PCMCIA_ATTR_PHYS_ADDR
,
84 .end
= AU1000_PCMCIA_ATTR_PHYS_ADDR
+ 0x000400000 - 1,
88 .flags
= IORESOURCE_MEM
,
89 .start
= AU1000_PCMCIA_MEM_PHYS_ADDR
,
90 .end
= AU1000_PCMCIA_MEM_PHYS_ADDR
+ 0x000400000 - 1,
94 static struct platform_device xxs1500_pcmcia_dev
= {
95 .name
= "xxs1500_pcmcia",
97 .num_resources
= ARRAY_SIZE(xxs1500_pcmcia_res
),
98 .resource
= xxs1500_pcmcia_res
,
101 static struct platform_device
*xxs1500_devs
[] __initdata
= {
105 static int __init
xxs1500_dev_init(void)
107 irq_set_irq_type(AU1500_GPIO204_INT
, IRQ_TYPE_LEVEL_HIGH
);
108 irq_set_irq_type(AU1500_GPIO201_INT
, IRQ_TYPE_LEVEL_LOW
);
109 irq_set_irq_type(AU1500_GPIO202_INT
, IRQ_TYPE_LEVEL_LOW
);
110 irq_set_irq_type(AU1500_GPIO203_INT
, IRQ_TYPE_LEVEL_LOW
);
111 irq_set_irq_type(AU1500_GPIO205_INT
, IRQ_TYPE_LEVEL_LOW
);
112 irq_set_irq_type(AU1500_GPIO207_INT
, IRQ_TYPE_LEVEL_LOW
);
114 irq_set_irq_type(AU1500_GPIO0_INT
, IRQ_TYPE_LEVEL_LOW
);
115 irq_set_irq_type(AU1500_GPIO1_INT
, IRQ_TYPE_LEVEL_LOW
);
116 irq_set_irq_type(AU1500_GPIO2_INT
, IRQ_TYPE_LEVEL_LOW
);
117 irq_set_irq_type(AU1500_GPIO3_INT
, IRQ_TYPE_LEVEL_LOW
);
118 irq_set_irq_type(AU1500_GPIO4_INT
, IRQ_TYPE_LEVEL_LOW
); /* CF irq */
119 irq_set_irq_type(AU1500_GPIO5_INT
, IRQ_TYPE_LEVEL_LOW
);
121 return platform_add_devices(xxs1500_devs
,
122 ARRAY_SIZE(xxs1500_devs
));
124 device_initcall(xxs1500_dev_init
);