WIP FPC-III support
[linux/fpc-iii.git] / arch / nds32 / include / asm / delay.h
blob56ea3894f8f80b42ba697e9c72c6970ff857893e
1 /* SPDX-License-Identifier: GPL-2.0 */
2 // Copyright (C) 2005-2017 Andes Technology Corporation
4 #ifndef __NDS32_DELAY_H__
5 #define __NDS32_DELAY_H__
7 #include <asm/param.h>
9 /* There is no clocksource cycle counter in the CPU. */
10 static inline void __delay(unsigned long loops)
12 __asm__ __volatile__(".align 2\n"
13 "1:\n"
14 "\taddi\t%0, %0, -1\n"
15 "\tbgtz\t%0, 1b\n"
16 :"=r"(loops)
17 :"0"(loops));
20 static inline void __udelay(unsigned long usecs, unsigned long lpj)
22 usecs *= (unsigned long)(((0x8000000000000000ULL / (500000 / HZ)) +
23 0x80000000ULL) >> 32);
24 usecs = (unsigned long)(((unsigned long long)usecs * lpj) >> 32);
25 __delay(usecs);
28 #define udelay(usecs) __udelay((usecs), loops_per_jiffy)
30 /* make sure "usecs *= ..." in udelay do not overflow. */
31 #if HZ >= 1000
32 #define MAX_UDELAY_MS 1
33 #elif HZ <= 200
34 #define MAX_UDELAY_MS 5
35 #else
36 #define MAX_UDELAY_MS (1000 / HZ)
37 #endif
39 #endif