arch/x86/include/asm/cache.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_CACHE_H
   3 #define _ASM_X86_CACHE_H
   4
   5 #include <linux/linkage.h>
   6
   7 /* L1 cache line size */
   8 #define L1_CACHE_SHIFT  (CONFIG_X86_L1_CACHE_SHIFT)
   9 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
  10
  11 #define __read_mostly __section(".data..read_mostly")
  12
  13 #define INTERNODE_CACHE_SHIFT CONFIG_X86_INTERNODE_CACHE_SHIFT
  14 #define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT)
  15
  16 #ifdef CONFIG_X86_VSMP
  17 #ifdef CONFIG_SMP
  18 #define __cacheline_aligned_in_smp                                      \
  19         __attribute__((__aligned__(INTERNODE_CACHE_BYTES)))             \
  20         __page_aligned_data
  21 #endif
  22 #endif
  23
  24 #endif /* _ASM_X86_CACHE_H */