1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel & MS High Precision Event Timer Implementation.
5 * Copyright (C) 2003 Intel Corporation
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <robert.picco@hp.com>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/miscdevice.h>
15 #include <linux/major.h>
16 #include <linux/ioport.h>
17 #include <linux/fcntl.h>
18 #include <linux/init.h>
19 #include <linux/poll.h>
21 #include <linux/proc_fs.h>
22 #include <linux/spinlock.h>
23 #include <linux/sysctl.h>
24 #include <linux/wait.h>
25 #include <linux/sched/signal.h>
26 #include <linux/bcd.h>
27 #include <linux/seq_file.h>
28 #include <linux/bitops.h>
29 #include <linux/compat.h>
30 #include <linux/clocksource.h>
31 #include <linux/uaccess.h>
32 #include <linux/slab.h>
34 #include <linux/acpi.h>
35 #include <linux/hpet.h>
36 #include <asm/current.h>
38 #include <asm/div64.h>
41 * The High Precision Event Timer driver.
42 * This driver is closely modelled after the rtc.c driver.
43 * See HPET spec revision 1.
45 #define HPET_USER_FREQ (64)
46 #define HPET_DRIFT (500)
48 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
51 /* WARNING -- don't get confused. These macros are never used
52 * to write the (single) counter, and rarely to read it.
53 * They're badly named; to fix, someday.
55 #if BITS_PER_LONG == 64
56 #define write_counter(V, MC) writeq(V, MC)
57 #define read_counter(MC) readq(MC)
59 #define write_counter(V, MC) writel(V, MC)
60 #define read_counter(MC) readl(MC)
63 static DEFINE_MUTEX(hpet_mutex
); /* replaces BKL */
64 static u32 hpet_nhpet
, hpet_max_freq
= HPET_USER_FREQ
;
66 /* This clocksource driver currently only works on ia64 */
68 static void __iomem
*hpet_mctr
;
70 static u64
read_hpet(struct clocksource
*cs
)
72 return (u64
)read_counter((void __iomem
*)hpet_mctr
);
75 static struct clocksource clocksource_hpet
= {
79 .mask
= CLOCKSOURCE_MASK(64),
80 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
82 static struct clocksource
*hpet_clocksource
;
85 /* A lock for concurrent access by app and isr hpet activity. */
86 static DEFINE_SPINLOCK(hpet_lock
);
88 #define HPET_DEV_NAME (7)
91 struct hpets
*hd_hpets
;
92 struct hpet __iomem
*hd_hpet
;
93 struct hpet_timer __iomem
*hd_timer
;
94 unsigned long hd_ireqfreq
;
95 unsigned long hd_irqdata
;
96 wait_queue_head_t hd_waitqueue
;
97 struct fasync_struct
*hd_async_queue
;
98 unsigned int hd_flags
;
100 unsigned int hd_hdwirq
;
101 char hd_name
[HPET_DEV_NAME
];
105 struct hpets
*hp_next
;
106 struct hpet __iomem
*hp_hpet
;
107 unsigned long hp_hpet_phys
;
108 struct clocksource
*hp_clocksource
;
109 unsigned long long hp_tick_freq
;
110 unsigned long hp_delta
;
111 unsigned int hp_ntimer
;
112 unsigned int hp_which
;
113 struct hpet_dev hp_dev
[];
116 static struct hpets
*hpets
;
118 #define HPET_OPEN 0x0001
119 #define HPET_IE 0x0002 /* interrupt enabled */
120 #define HPET_PERIODIC 0x0004
121 #define HPET_SHARED_IRQ 0x0008
125 static inline unsigned long long readq(void __iomem
*addr
)
127 return readl(addr
) | (((unsigned long long)readl(addr
+ 4)) << 32LL);
132 static inline void writeq(unsigned long long v
, void __iomem
*addr
)
134 writel(v
& 0xffffffff, addr
);
135 writel(v
>> 32, addr
+ 4);
139 static irqreturn_t
hpet_interrupt(int irq
, void *data
)
141 struct hpet_dev
*devp
;
145 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
147 if ((devp
->hd_flags
& HPET_SHARED_IRQ
) &&
148 !(isr
& readl(&devp
->hd_hpet
->hpet_isr
)))
151 spin_lock(&hpet_lock
);
155 * For non-periodic timers, increment the accumulator.
156 * This has the effect of treating non-periodic like periodic.
158 if ((devp
->hd_flags
& (HPET_IE
| HPET_PERIODIC
)) == HPET_IE
) {
159 unsigned long m
, t
, mc
, base
, k
;
160 struct hpet __iomem
*hpet
= devp
->hd_hpet
;
161 struct hpets
*hpetp
= devp
->hd_hpets
;
163 t
= devp
->hd_ireqfreq
;
164 m
= read_counter(&devp
->hd_timer
->hpet_compare
);
165 mc
= read_counter(&hpet
->hpet_mc
);
166 /* The time for the next interrupt would logically be t + m,
167 * however, if we are very unlucky and the interrupt is delayed
168 * for longer than t then we will completely miss the next
169 * interrupt if we set t + m and an application will hang.
170 * Therefore we need to make a more complex computation assuming
171 * that there exists a k for which the following is true:
172 * k * t + base < mc + delta
173 * (k + 1) * t + base > mc + delta
174 * where t is the interval in hpet ticks for the given freq,
175 * base is the theoretical start value 0 < base < t,
176 * mc is the main counter value at the time of the interrupt,
177 * delta is the time it takes to write the a value to the
179 * k may then be computed as (mc - base + delta) / t .
182 k
= (mc
- base
+ hpetp
->hp_delta
) / t
;
183 write_counter(t
* (k
+ 1) + base
,
184 &devp
->hd_timer
->hpet_compare
);
187 if (devp
->hd_flags
& HPET_SHARED_IRQ
)
188 writel(isr
, &devp
->hd_hpet
->hpet_isr
);
189 spin_unlock(&hpet_lock
);
191 wake_up_interruptible(&devp
->hd_waitqueue
);
193 kill_fasync(&devp
->hd_async_queue
, SIGIO
, POLL_IN
);
198 static void hpet_timer_set_irq(struct hpet_dev
*devp
)
202 struct hpet_timer __iomem
*timer
;
204 spin_lock_irq(&hpet_lock
);
205 if (devp
->hd_hdwirq
) {
206 spin_unlock_irq(&hpet_lock
);
210 timer
= devp
->hd_timer
;
212 /* we prefer level triggered mode */
213 v
= readl(&timer
->hpet_config
);
214 if (!(v
& Tn_INT_TYPE_CNF_MASK
)) {
215 v
|= Tn_INT_TYPE_CNF_MASK
;
216 writel(v
, &timer
->hpet_config
);
218 spin_unlock_irq(&hpet_lock
);
220 v
= (readq(&timer
->hpet_config
) & Tn_INT_ROUTE_CAP_MASK
) >>
221 Tn_INT_ROUTE_CAP_SHIFT
;
224 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
225 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
227 if (acpi_irq_model
== ACPI_IRQ_MODEL_PIC
)
232 for_each_set_bit(irq
, &v
, HPET_MAX_IRQ
) {
233 if (irq
>= nr_irqs
) {
238 gsi
= acpi_register_gsi(NULL
, irq
, ACPI_LEVEL_SENSITIVE
,
243 /* FIXME: Setup interrupt source table */
246 if (irq
< HPET_MAX_IRQ
) {
247 spin_lock_irq(&hpet_lock
);
248 v
= readl(&timer
->hpet_config
);
249 v
|= irq
<< Tn_INT_ROUTE_CNF_SHIFT
;
250 writel(v
, &timer
->hpet_config
);
251 devp
->hd_hdwirq
= gsi
;
252 spin_unlock_irq(&hpet_lock
);
257 static int hpet_open(struct inode
*inode
, struct file
*file
)
259 struct hpet_dev
*devp
;
263 if (file
->f_mode
& FMODE_WRITE
)
266 mutex_lock(&hpet_mutex
);
267 spin_lock_irq(&hpet_lock
);
269 for (devp
= NULL
, hpetp
= hpets
; hpetp
&& !devp
; hpetp
= hpetp
->hp_next
)
270 for (i
= 0; i
< hpetp
->hp_ntimer
; i
++)
271 if (hpetp
->hp_dev
[i
].hd_flags
& HPET_OPEN
)
274 devp
= &hpetp
->hp_dev
[i
];
279 spin_unlock_irq(&hpet_lock
);
280 mutex_unlock(&hpet_mutex
);
284 file
->private_data
= devp
;
285 devp
->hd_irqdata
= 0;
286 devp
->hd_flags
|= HPET_OPEN
;
287 spin_unlock_irq(&hpet_lock
);
288 mutex_unlock(&hpet_mutex
);
290 hpet_timer_set_irq(devp
);
296 hpet_read(struct file
*file
, char __user
*buf
, size_t count
, loff_t
* ppos
)
298 DECLARE_WAITQUEUE(wait
, current
);
301 struct hpet_dev
*devp
;
303 devp
= file
->private_data
;
304 if (!devp
->hd_ireqfreq
)
307 if (count
< sizeof(unsigned long))
310 add_wait_queue(&devp
->hd_waitqueue
, &wait
);
313 set_current_state(TASK_INTERRUPTIBLE
);
315 spin_lock_irq(&hpet_lock
);
316 data
= devp
->hd_irqdata
;
317 devp
->hd_irqdata
= 0;
318 spin_unlock_irq(&hpet_lock
);
322 else if (file
->f_flags
& O_NONBLOCK
) {
325 } else if (signal_pending(current
)) {
326 retval
= -ERESTARTSYS
;
332 retval
= put_user(data
, (unsigned long __user
*)buf
);
334 retval
= sizeof(unsigned long);
336 __set_current_state(TASK_RUNNING
);
337 remove_wait_queue(&devp
->hd_waitqueue
, &wait
);
342 static __poll_t
hpet_poll(struct file
*file
, poll_table
* wait
)
345 struct hpet_dev
*devp
;
347 devp
= file
->private_data
;
349 if (!devp
->hd_ireqfreq
)
352 poll_wait(file
, &devp
->hd_waitqueue
, wait
);
354 spin_lock_irq(&hpet_lock
);
355 v
= devp
->hd_irqdata
;
356 spin_unlock_irq(&hpet_lock
);
359 return EPOLLIN
| EPOLLRDNORM
;
364 #ifdef CONFIG_HPET_MMAP
365 #ifdef CONFIG_HPET_MMAP_DEFAULT
366 static int hpet_mmap_enabled
= 1;
368 static int hpet_mmap_enabled
= 0;
371 static __init
int hpet_mmap_enable(char *str
)
373 get_option(&str
, &hpet_mmap_enabled
);
374 pr_info("HPET mmap %s\n", hpet_mmap_enabled
? "enabled" : "disabled");
377 __setup("hpet_mmap=", hpet_mmap_enable
);
379 static int hpet_mmap(struct file
*file
, struct vm_area_struct
*vma
)
381 struct hpet_dev
*devp
;
384 if (!hpet_mmap_enabled
)
387 devp
= file
->private_data
;
388 addr
= devp
->hd_hpets
->hp_hpet_phys
;
390 if (addr
& (PAGE_SIZE
- 1))
393 vma
->vm_page_prot
= pgprot_noncached(vma
->vm_page_prot
);
394 return vm_iomap_memory(vma
, addr
, PAGE_SIZE
);
397 static int hpet_mmap(struct file
*file
, struct vm_area_struct
*vma
)
403 static int hpet_fasync(int fd
, struct file
*file
, int on
)
405 struct hpet_dev
*devp
;
407 devp
= file
->private_data
;
409 if (fasync_helper(fd
, file
, on
, &devp
->hd_async_queue
) >= 0)
415 static int hpet_release(struct inode
*inode
, struct file
*file
)
417 struct hpet_dev
*devp
;
418 struct hpet_timer __iomem
*timer
;
421 devp
= file
->private_data
;
422 timer
= devp
->hd_timer
;
424 spin_lock_irq(&hpet_lock
);
426 writeq((readq(&timer
->hpet_config
) & ~Tn_INT_ENB_CNF_MASK
),
427 &timer
->hpet_config
);
432 devp
->hd_ireqfreq
= 0;
434 if (devp
->hd_flags
& HPET_PERIODIC
435 && readq(&timer
->hpet_config
) & Tn_TYPE_CNF_MASK
) {
438 v
= readq(&timer
->hpet_config
);
439 v
^= Tn_TYPE_CNF_MASK
;
440 writeq(v
, &timer
->hpet_config
);
443 devp
->hd_flags
&= ~(HPET_OPEN
| HPET_IE
| HPET_PERIODIC
);
444 spin_unlock_irq(&hpet_lock
);
449 file
->private_data
= NULL
;
453 static int hpet_ioctl_ieon(struct hpet_dev
*devp
)
455 struct hpet_timer __iomem
*timer
;
456 struct hpet __iomem
*hpet
;
459 unsigned long g
, v
, t
, m
;
460 unsigned long flags
, isr
;
462 timer
= devp
->hd_timer
;
463 hpet
= devp
->hd_hpet
;
464 hpetp
= devp
->hd_hpets
;
466 if (!devp
->hd_ireqfreq
)
469 spin_lock_irq(&hpet_lock
);
471 if (devp
->hd_flags
& HPET_IE
) {
472 spin_unlock_irq(&hpet_lock
);
476 devp
->hd_flags
|= HPET_IE
;
478 if (readl(&timer
->hpet_config
) & Tn_INT_TYPE_CNF_MASK
)
479 devp
->hd_flags
|= HPET_SHARED_IRQ
;
480 spin_unlock_irq(&hpet_lock
);
482 irq
= devp
->hd_hdwirq
;
485 unsigned long irq_flags
;
487 if (devp
->hd_flags
& HPET_SHARED_IRQ
) {
489 * To prevent the interrupt handler from seeing an
490 * unwanted interrupt status bit, program the timer
491 * so that it will not fire in the near future ...
493 writel(readl(&timer
->hpet_config
) & ~Tn_TYPE_CNF_MASK
,
494 &timer
->hpet_config
);
495 write_counter(read_counter(&hpet
->hpet_mc
),
496 &timer
->hpet_compare
);
497 /* ... and clear any left-over status. */
498 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
499 writel(isr
, &hpet
->hpet_isr
);
502 sprintf(devp
->hd_name
, "hpet%d", (int)(devp
- hpetp
->hp_dev
));
503 irq_flags
= devp
->hd_flags
& HPET_SHARED_IRQ
? IRQF_SHARED
: 0;
504 if (request_irq(irq
, hpet_interrupt
, irq_flags
,
505 devp
->hd_name
, (void *)devp
)) {
506 printk(KERN_ERR
"hpet: IRQ %d is not free\n", irq
);
512 spin_lock_irq(&hpet_lock
);
513 devp
->hd_flags
^= HPET_IE
;
514 spin_unlock_irq(&hpet_lock
);
519 t
= devp
->hd_ireqfreq
;
520 v
= readq(&timer
->hpet_config
);
522 /* 64-bit comparators are not yet supported through the ioctls,
523 * so force this into 32-bit mode if it supports both modes
525 g
= v
| Tn_32MODE_CNF_MASK
| Tn_INT_ENB_CNF_MASK
;
527 if (devp
->hd_flags
& HPET_PERIODIC
) {
528 g
|= Tn_TYPE_CNF_MASK
;
529 v
|= Tn_TYPE_CNF_MASK
| Tn_VAL_SET_CNF_MASK
;
530 writeq(v
, &timer
->hpet_config
);
531 local_irq_save(flags
);
534 * NOTE: First we modify the hidden accumulator
535 * register supported by periodic-capable comparators.
536 * We never want to modify the (single) counter; that
537 * would affect all the comparators. The value written
538 * is the counter value when the first interrupt is due.
540 m
= read_counter(&hpet
->hpet_mc
);
541 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
543 * Then we modify the comparator, indicating the period
544 * for subsequent interrupt.
546 write_counter(t
, &timer
->hpet_compare
);
548 local_irq_save(flags
);
549 m
= read_counter(&hpet
->hpet_mc
);
550 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
553 if (devp
->hd_flags
& HPET_SHARED_IRQ
) {
554 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
555 writel(isr
, &hpet
->hpet_isr
);
557 writeq(g
, &timer
->hpet_config
);
558 local_irq_restore(flags
);
563 /* converts Hz to number of timer ticks */
564 static inline unsigned long hpet_time_div(struct hpets
*hpets
,
567 unsigned long long m
;
569 m
= hpets
->hp_tick_freq
+ (dis
>> 1);
570 return div64_ul(m
, dis
);
574 hpet_ioctl_common(struct hpet_dev
*devp
, unsigned int cmd
, unsigned long arg
,
575 struct hpet_info
*info
)
577 struct hpet_timer __iomem
*timer
;
588 timer
= devp
->hd_timer
;
589 hpetp
= devp
->hd_hpets
;
592 return hpet_ioctl_ieon(devp
);
601 if ((devp
->hd_flags
& HPET_IE
) == 0)
603 v
= readq(&timer
->hpet_config
);
604 v
&= ~Tn_INT_ENB_CNF_MASK
;
605 writeq(v
, &timer
->hpet_config
);
607 free_irq(devp
->hd_irq
, devp
);
610 devp
->hd_flags
^= HPET_IE
;
614 memset(info
, 0, sizeof(*info
));
615 if (devp
->hd_ireqfreq
)
617 hpet_time_div(hpetp
, devp
->hd_ireqfreq
);
619 readq(&timer
->hpet_config
) & Tn_PER_INT_CAP_MASK
;
620 info
->hi_hpet
= hpetp
->hp_which
;
621 info
->hi_timer
= devp
- hpetp
->hp_dev
;
625 v
= readq(&timer
->hpet_config
);
626 if ((v
& Tn_PER_INT_CAP_MASK
) == 0) {
630 devp
->hd_flags
|= HPET_PERIODIC
;
633 v
= readq(&timer
->hpet_config
);
634 if ((v
& Tn_PER_INT_CAP_MASK
) == 0) {
638 if (devp
->hd_flags
& HPET_PERIODIC
&&
639 readq(&timer
->hpet_config
) & Tn_TYPE_CNF_MASK
) {
640 v
= readq(&timer
->hpet_config
);
641 v
^= Tn_TYPE_CNF_MASK
;
642 writeq(v
, &timer
->hpet_config
);
644 devp
->hd_flags
&= ~HPET_PERIODIC
;
647 if ((arg
> hpet_max_freq
) &&
648 !capable(CAP_SYS_RESOURCE
)) {
658 devp
->hd_ireqfreq
= hpet_time_div(hpetp
, arg
);
665 hpet_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
667 struct hpet_info info
;
670 mutex_lock(&hpet_mutex
);
671 err
= hpet_ioctl_common(file
->private_data
, cmd
, arg
, &info
);
672 mutex_unlock(&hpet_mutex
);
674 if ((cmd
== HPET_INFO
) && !err
&&
675 (copy_to_user((void __user
*)arg
, &info
, sizeof(info
))))
682 struct compat_hpet_info
{
683 compat_ulong_t hi_ireqfreq
; /* Hz */
684 compat_ulong_t hi_flags
; /* information */
685 unsigned short hi_hpet
;
686 unsigned short hi_timer
;
690 hpet_compat_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
692 struct hpet_info info
;
695 mutex_lock(&hpet_mutex
);
696 err
= hpet_ioctl_common(file
->private_data
, cmd
, arg
, &info
);
697 mutex_unlock(&hpet_mutex
);
699 if ((cmd
== HPET_INFO
) && !err
) {
700 struct compat_hpet_info __user
*u
= compat_ptr(arg
);
701 if (put_user(info
.hi_ireqfreq
, &u
->hi_ireqfreq
) ||
702 put_user(info
.hi_flags
, &u
->hi_flags
) ||
703 put_user(info
.hi_hpet
, &u
->hi_hpet
) ||
704 put_user(info
.hi_timer
, &u
->hi_timer
))
712 static const struct file_operations hpet_fops
= {
713 .owner
= THIS_MODULE
,
717 .unlocked_ioctl
= hpet_ioctl
,
719 .compat_ioctl
= hpet_compat_ioctl
,
722 .release
= hpet_release
,
723 .fasync
= hpet_fasync
,
727 static int hpet_is_known(struct hpet_data
*hdp
)
731 for (hpetp
= hpets
; hpetp
; hpetp
= hpetp
->hp_next
)
732 if (hpetp
->hp_hpet_phys
== hdp
->hd_phys_address
)
738 static struct ctl_table hpet_table
[] = {
740 .procname
= "max-user-freq",
741 .data
= &hpet_max_freq
,
742 .maxlen
= sizeof(int),
744 .proc_handler
= proc_dointvec
,
749 static struct ctl_table hpet_root
[] = {
759 static struct ctl_table dev_root
[] = {
769 static struct ctl_table_header
*sysctl_header
;
772 * Adjustment for when arming the timer with
773 * initial conditions. That is, main counter
774 * ticks expired before interrupts are enabled.
776 #define TICK_CALIBRATE (1000UL)
778 static unsigned long __hpet_calibrate(struct hpets
*hpetp
)
780 struct hpet_timer __iomem
*timer
= NULL
;
781 unsigned long t
, m
, count
, i
, flags
, start
;
782 struct hpet_dev
*devp
;
784 struct hpet __iomem
*hpet
;
786 for (j
= 0, devp
= hpetp
->hp_dev
; j
< hpetp
->hp_ntimer
; j
++, devp
++)
787 if ((devp
->hd_flags
& HPET_OPEN
) == 0) {
788 timer
= devp
->hd_timer
;
795 hpet
= hpetp
->hp_hpet
;
796 t
= read_counter(&timer
->hpet_compare
);
799 count
= hpet_time_div(hpetp
, TICK_CALIBRATE
);
801 local_irq_save(flags
);
803 start
= read_counter(&hpet
->hpet_mc
);
806 m
= read_counter(&hpet
->hpet_mc
);
807 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
808 } while (i
++, (m
- start
) < count
);
810 local_irq_restore(flags
);
812 return (m
- start
) / i
;
815 static unsigned long hpet_calibrate(struct hpets
*hpetp
)
817 unsigned long ret
= ~0UL;
821 * Try to calibrate until return value becomes stable small value.
822 * If SMI interruption occurs in calibration loop, the return value
823 * will be big. This avoids its impact.
826 tmp
= __hpet_calibrate(hpetp
);
835 int hpet_alloc(struct hpet_data
*hdp
)
838 struct hpet_dev
*devp
;
841 struct hpet __iomem
*hpet
;
842 static struct hpets
*last
;
843 unsigned long period
;
844 unsigned long long temp
;
848 * hpet_alloc can be called by platform dependent code.
849 * If platform dependent code has allocated the hpet that
850 * ACPI has also reported, then we catch it here.
852 if (hpet_is_known(hdp
)) {
853 printk(KERN_DEBUG
"%s: duplicate HPET ignored\n",
858 hpetp
= kzalloc(struct_size(hpetp
, hp_dev
, hdp
->hd_nirqs
),
864 hpetp
->hp_which
= hpet_nhpet
++;
865 hpetp
->hp_hpet
= hdp
->hd_address
;
866 hpetp
->hp_hpet_phys
= hdp
->hd_phys_address
;
868 hpetp
->hp_ntimer
= hdp
->hd_nirqs
;
870 for (i
= 0; i
< hdp
->hd_nirqs
; i
++)
871 hpetp
->hp_dev
[i
].hd_hdwirq
= hdp
->hd_irq
[i
];
873 hpet
= hpetp
->hp_hpet
;
875 cap
= readq(&hpet
->hpet_cap
);
877 ntimer
= ((cap
& HPET_NUM_TIM_CAP_MASK
) >> HPET_NUM_TIM_CAP_SHIFT
) + 1;
879 if (hpetp
->hp_ntimer
!= ntimer
) {
880 printk(KERN_WARNING
"hpet: number irqs doesn't agree"
881 " with number of timers\n");
887 last
->hp_next
= hpetp
;
893 period
= (cap
& HPET_COUNTER_CLK_PERIOD_MASK
) >>
894 HPET_COUNTER_CLK_PERIOD_SHIFT
; /* fs, 10^-15 */
895 temp
= 1000000000000000uLL; /* 10^15 femtoseconds per second */
896 temp
+= period
>> 1; /* round */
897 do_div(temp
, period
);
898 hpetp
->hp_tick_freq
= temp
; /* ticks per second */
900 printk(KERN_INFO
"hpet%d: at MMIO 0x%lx, IRQ%s",
901 hpetp
->hp_which
, hdp
->hd_phys_address
,
902 hpetp
->hp_ntimer
> 1 ? "s" : "");
903 for (i
= 0; i
< hpetp
->hp_ntimer
; i
++)
904 printk(KERN_CONT
"%s %d", i
> 0 ? "," : "", hdp
->hd_irq
[i
]);
905 printk(KERN_CONT
"\n");
907 temp
= hpetp
->hp_tick_freq
;
908 remainder
= do_div(temp
, 1000000);
910 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
911 hpetp
->hp_which
, hpetp
->hp_ntimer
,
912 cap
& HPET_COUNTER_SIZE_MASK
? 64 : 32,
913 (unsigned) temp
, remainder
);
915 mcfg
= readq(&hpet
->hpet_config
);
916 if ((mcfg
& HPET_ENABLE_CNF_MASK
) == 0) {
917 write_counter(0L, &hpet
->hpet_mc
);
918 mcfg
|= HPET_ENABLE_CNF_MASK
;
919 writeq(mcfg
, &hpet
->hpet_config
);
922 for (i
= 0, devp
= hpetp
->hp_dev
; i
< hpetp
->hp_ntimer
; i
++, devp
++) {
923 struct hpet_timer __iomem
*timer
;
925 timer
= &hpet
->hpet_timers
[devp
- hpetp
->hp_dev
];
927 devp
->hd_hpets
= hpetp
;
928 devp
->hd_hpet
= hpet
;
929 devp
->hd_timer
= timer
;
932 * If the timer was reserved by platform code,
933 * then make timer unavailable for opens.
935 if (hdp
->hd_state
& (1 << i
)) {
936 devp
->hd_flags
= HPET_OPEN
;
940 init_waitqueue_head(&devp
->hd_waitqueue
);
943 hpetp
->hp_delta
= hpet_calibrate(hpetp
);
945 /* This clocksource driver currently only works on ia64 */
947 if (!hpet_clocksource
) {
948 hpet_mctr
= (void __iomem
*)&hpetp
->hp_hpet
->hpet_mc
;
949 clocksource_hpet
.archdata
.fsys_mmio
= hpet_mctr
;
950 clocksource_register_hz(&clocksource_hpet
, hpetp
->hp_tick_freq
);
951 hpetp
->hp_clocksource
= &clocksource_hpet
;
952 hpet_clocksource
= &clocksource_hpet
;
959 static acpi_status
hpet_resources(struct acpi_resource
*res
, void *data
)
961 struct hpet_data
*hdp
;
963 struct acpi_resource_address64 addr
;
967 status
= acpi_resource_to_address64(res
, &addr
);
969 if (ACPI_SUCCESS(status
)) {
970 hdp
->hd_phys_address
= addr
.address
.minimum
;
971 hdp
->hd_address
= ioremap(addr
.address
.minimum
, addr
.address
.address_length
);
972 if (!hdp
->hd_address
)
975 if (hpet_is_known(hdp
)) {
976 iounmap(hdp
->hd_address
);
977 return AE_ALREADY_EXISTS
;
979 } else if (res
->type
== ACPI_RESOURCE_TYPE_FIXED_MEMORY32
) {
980 struct acpi_resource_fixed_memory32
*fixmem32
;
982 fixmem32
= &res
->data
.fixed_memory32
;
984 hdp
->hd_phys_address
= fixmem32
->address
;
985 hdp
->hd_address
= ioremap(fixmem32
->address
,
988 if (hpet_is_known(hdp
)) {
989 iounmap(hdp
->hd_address
);
990 return AE_ALREADY_EXISTS
;
992 } else if (res
->type
== ACPI_RESOURCE_TYPE_EXTENDED_IRQ
) {
993 struct acpi_resource_extended_irq
*irqp
;
996 irqp
= &res
->data
.extended_irq
;
998 for (i
= 0; i
< irqp
->interrupt_count
; i
++) {
999 if (hdp
->hd_nirqs
>= HPET_MAX_TIMERS
)
1002 irq
= acpi_register_gsi(NULL
, irqp
->interrupts
[i
],
1003 irqp
->triggering
, irqp
->polarity
);
1007 hdp
->hd_irq
[hdp
->hd_nirqs
] = irq
;
1015 static int hpet_acpi_add(struct acpi_device
*device
)
1018 struct hpet_data data
;
1020 memset(&data
, 0, sizeof(data
));
1023 acpi_walk_resources(device
->handle
, METHOD_NAME__CRS
,
1024 hpet_resources
, &data
);
1026 if (ACPI_FAILURE(result
))
1029 if (!data
.hd_address
|| !data
.hd_nirqs
) {
1030 if (data
.hd_address
)
1031 iounmap(data
.hd_address
);
1032 printk("%s: no address or irqs in _CRS\n", __func__
);
1036 return hpet_alloc(&data
);
1039 static const struct acpi_device_id hpet_device_ids
[] = {
1044 static struct acpi_driver hpet_acpi_driver
= {
1046 .ids
= hpet_device_ids
,
1048 .add
= hpet_acpi_add
,
1052 static struct miscdevice hpet_misc
= { HPET_MINOR
, "hpet", &hpet_fops
};
1054 static int __init
hpet_init(void)
1058 result
= misc_register(&hpet_misc
);
1062 sysctl_header
= register_sysctl_table(dev_root
);
1064 result
= acpi_bus_register_driver(&hpet_acpi_driver
);
1067 unregister_sysctl_table(sysctl_header
);
1068 misc_deregister(&hpet_misc
);
1074 device_initcall(hpet_init
);
1077 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1078 MODULE_LICENSE("GPL");