1 // SPDX-License-Identifier: GPL-2.0-only
3 * abx500 clock implementation for ux500 platform.
5 * Copyright (C) 2012 ST-Ericsson SA
6 * Author: Ulf Hansson <ulf.hansson@linaro.org>
10 #include <linux/module.h>
11 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mfd/abx500/ab8500.h>
15 #include <linux/mfd/abx500/ab8500-sysctrl.h>
16 #include <linux/clkdev.h>
17 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/ste-ab8500.h>
21 #define AB8500_NUM_CLKS 6
23 static struct clk
*ab8500_clks
[AB8500_NUM_CLKS
];
24 static struct clk_onecell_data ab8500_clk_data
;
26 /* Clock definitions for ab8500 */
27 static int ab8500_reg_clks(struct device
*dev
)
31 struct device_node
*np
= dev
->of_node
;
32 const char *intclk_parents
[] = {"ab8500_sysclk", "ulpclk"};
33 u16 intclk_reg_sel
[] = {0 , AB8500_SYSULPCLKCTRL1
};
34 u8 intclk_reg_mask
[] = {0 , AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK
};
35 u8 intclk_reg_bits
[] = {
37 (1 << AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT
)
41 ret
= ab8500_sysctrl_set(AB8500_SWATCTRL
, AB8500_SWATCTRL_SWATENABLE
);
46 clk
= clk_reg_sysctrl_gate(dev
, "ab8500_sysclk2", "ab8500_sysclk",
47 AB8500_SYSULPCLKCTRL1
, AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ
,
48 AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ
, 0, 0);
49 ab8500_clks
[AB8500_SYSCLK_BUF2
] = clk
;
52 clk
= clk_reg_sysctrl_gate(dev
, "ab8500_sysclk3", "ab8500_sysclk",
53 AB8500_SYSULPCLKCTRL1
, AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ
,
54 AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ
, 0, 0);
55 ab8500_clks
[AB8500_SYSCLK_BUF3
] = clk
;
58 clk
= clk_reg_sysctrl_gate(dev
, "ab8500_sysclk4", "ab8500_sysclk",
59 AB8500_SYSULPCLKCTRL1
, AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ
,
60 AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ
, 0, 0);
61 ab8500_clks
[AB8500_SYSCLK_BUF4
] = clk
;
64 clk
= clk_reg_sysctrl_gate_fixed_rate(dev
, "ulpclk", NULL
,
65 AB8500_SYSULPCLKCTRL1
, AB8500_SYSULPCLKCTRL1_ULPCLKREQ
,
66 AB8500_SYSULPCLKCTRL1_ULPCLKREQ
,
68 ab8500_clks
[AB8500_SYSCLK_ULP
] = clk
;
71 clk
= clk_reg_sysctrl_set_parent(dev
, "intclk", intclk_parents
, 2,
72 intclk_reg_sel
, intclk_reg_mask
, intclk_reg_bits
, 0);
73 ab8500_clks
[AB8500_SYSCLK_INT
] = clk
;
76 clk
= clk_reg_sysctrl_gate(dev
, "audioclk", "intclk",
77 AB8500_SYSULPCLKCTRL1
, AB8500_SYSULPCLKCTRL1_AUDIOCLKENA
,
78 AB8500_SYSULPCLKCTRL1_AUDIOCLKENA
, 0, 0);
79 ab8500_clks
[AB8500_SYSCLK_AUDIO
] = clk
;
81 ab8500_clk_data
.clks
= ab8500_clks
;
82 ab8500_clk_data
.clk_num
= ARRAY_SIZE(ab8500_clks
);
83 of_clk_add_provider(np
, of_clk_src_onecell_get
, &ab8500_clk_data
);
85 dev_info(dev
, "registered clocks for ab850x\n");
90 static int abx500_clk_probe(struct platform_device
*pdev
)
92 struct ab8500
*parent
= dev_get_drvdata(pdev
->dev
.parent
);
95 if (is_ab8500(parent
) || is_ab8505(parent
)) {
96 ret
= ab8500_reg_clks(&pdev
->dev
);
98 dev_err(&pdev
->dev
, "non supported plf id\n");
105 static const struct of_device_id abx500_clk_match
[] = {
106 { .compatible
= "stericsson,ab8500-clk", },
110 static struct platform_driver abx500_clk_driver
= {
112 .name
= "abx500-clk",
113 .of_match_table
= abx500_clk_match
,
115 .probe
= abx500_clk_probe
,
118 static int __init
abx500_clk_init(void)
120 return platform_driver_register(&abx500_clk_driver
);
122 arch_initcall(abx500_clk_init
);
124 MODULE_AUTHOR("Ulf Hansson <ulf.hansson@linaro.org");
125 MODULE_DESCRIPTION("ABX500 clk driver");
126 MODULE_LICENSE("GPL v2");