1 // SPDX-License-Identifier: GPL-2.0
3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
4 * Author: James.Qian.Wang <james.qian.wang@arm.com>
8 #include <linux/pm_runtime.h>
9 #include <linux/spinlock.h>
11 #include <drm/drm_atomic.h>
12 #include <drm/drm_atomic_helper.h>
13 #include <drm/drm_crtc_helper.h>
14 #include <drm/drm_plane_helper.h>
15 #include <drm/drm_print.h>
16 #include <drm/drm_vblank.h>
18 #include "komeda_dev.h"
19 #include "komeda_kms.h"
21 void komeda_crtc_get_color_config(struct drm_crtc_state
*crtc_st
,
22 u32
*color_depths
, u32
*color_formats
)
24 struct drm_connector
*conn
;
25 struct drm_connector_state
*conn_st
;
26 u32 conn_color_formats
= ~0u;
27 int i
, min_bpc
= 31, conn_bpc
= 0;
29 for_each_new_connector_in_state(crtc_st
->state
, conn
, conn_st
, i
) {
30 if (conn_st
->crtc
!= crtc_st
->crtc
)
33 conn_bpc
= conn
->display_info
.bpc
? conn
->display_info
.bpc
: 8;
34 conn_color_formats
&= conn
->display_info
.color_formats
;
36 if (conn_bpc
< min_bpc
)
40 /* connector doesn't config any color_format, use RGB444 as default */
41 if (!conn_color_formats
)
42 conn_color_formats
= DRM_COLOR_FORMAT_RGB444
;
44 *color_depths
= GENMASK(min_bpc
, 0);
45 *color_formats
= conn_color_formats
;
48 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state
*kcrtc_st
)
52 if (!kcrtc_st
->base
.active
) {
53 kcrtc_st
->clock_ratio
= 0;
57 pxlclk
= kcrtc_st
->base
.adjusted_mode
.crtc_clock
* 1000ULL;
58 aclk
= komeda_crtc_get_aclk(kcrtc_st
);
60 kcrtc_st
->clock_ratio
= div64_u64(aclk
<< 32, pxlclk
);
64 * komeda_crtc_atomic_check - build display output data flow
66 * @state: the crtc state object
68 * crtc_atomic_check is the final check stage, so beside build a display data
69 * pipeline according to the crtc_state, but still needs to release or disable
70 * the unclaimed pipeline resources.
73 * Zero for success or -errno
76 komeda_crtc_atomic_check(struct drm_crtc
*crtc
,
77 struct drm_atomic_state
*state
)
79 struct drm_crtc_state
*crtc_state
= drm_atomic_get_new_crtc_state(state
,
81 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
82 struct komeda_crtc_state
*kcrtc_st
= to_kcrtc_st(crtc_state
);
85 if (drm_atomic_crtc_needs_modeset(crtc_state
))
86 komeda_crtc_update_clock_ratio(kcrtc_st
);
88 if (crtc_state
->active
) {
89 err
= komeda_build_display_data_flow(kcrtc
, kcrtc_st
);
94 /* release unclaimed pipeline resources */
95 err
= komeda_release_unclaimed_resources(kcrtc
->slave
, kcrtc_st
);
99 err
= komeda_release_unclaimed_resources(kcrtc
->master
, kcrtc_st
);
106 /* For active a crtc, mainly need two parts of preparation
107 * 1. adjust display operation mode.
108 * 2. enable needed clk
111 komeda_crtc_prepare(struct komeda_crtc
*kcrtc
)
113 struct komeda_dev
*mdev
= kcrtc
->base
.dev
->dev_private
;
114 struct komeda_pipeline
*master
= kcrtc
->master
;
115 struct komeda_crtc_state
*kcrtc_st
= to_kcrtc_st(kcrtc
->base
.state
);
116 struct drm_display_mode
*mode
= &kcrtc_st
->base
.adjusted_mode
;
120 mutex_lock(&mdev
->lock
);
122 new_mode
= mdev
->dpmode
| BIT(master
->id
);
123 if (WARN_ON(new_mode
== mdev
->dpmode
)) {
128 err
= mdev
->funcs
->change_opmode(mdev
, new_mode
);
130 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
131 mdev
->dpmode
, new_mode
);
135 mdev
->dpmode
= new_mode
;
136 /* Only need to enable aclk on single display mode, but no need to
137 * enable aclk it on dual display mode, since the dual mode always
138 * switch from single display mode, the aclk already enabled, no need
139 * to enable it again.
141 if (new_mode
!= KOMEDA_MODE_DUAL_DISP
) {
142 err
= clk_set_rate(mdev
->aclk
, komeda_crtc_get_aclk(kcrtc_st
));
144 DRM_ERROR("failed to set aclk.\n");
145 err
= clk_prepare_enable(mdev
->aclk
);
147 DRM_ERROR("failed to enable aclk.\n");
150 err
= clk_set_rate(master
->pxlclk
, mode
->crtc_clock
* 1000);
152 DRM_ERROR("failed to set pxlclk for pipe%d\n", master
->id
);
153 err
= clk_prepare_enable(master
->pxlclk
);
155 DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master
->id
);
158 mutex_unlock(&mdev
->lock
);
164 komeda_crtc_unprepare(struct komeda_crtc
*kcrtc
)
166 struct komeda_dev
*mdev
= kcrtc
->base
.dev
->dev_private
;
167 struct komeda_pipeline
*master
= kcrtc
->master
;
171 mutex_lock(&mdev
->lock
);
173 new_mode
= mdev
->dpmode
& (~BIT(master
->id
));
175 if (WARN_ON(new_mode
== mdev
->dpmode
)) {
180 err
= mdev
->funcs
->change_opmode(mdev
, new_mode
);
182 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
183 mdev
->dpmode
, new_mode
);
187 mdev
->dpmode
= new_mode
;
189 clk_disable_unprepare(master
->pxlclk
);
190 if (new_mode
== KOMEDA_MODE_INACTIVE
)
191 clk_disable_unprepare(mdev
->aclk
);
194 mutex_unlock(&mdev
->lock
);
199 void komeda_crtc_handle_event(struct komeda_crtc
*kcrtc
,
200 struct komeda_events
*evts
)
202 struct drm_crtc
*crtc
= &kcrtc
->base
;
203 u32 events
= evts
->pipes
[kcrtc
->master
->id
];
205 if (events
& KOMEDA_EVENT_VSYNC
)
206 drm_crtc_handle_vblank(crtc
);
208 if (events
& KOMEDA_EVENT_EOW
) {
209 struct komeda_wb_connector
*wb_conn
= kcrtc
->wb_conn
;
212 drm_writeback_signal_completion(&wb_conn
->base
, 0);
214 DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n",
215 drm_crtc_index(&kcrtc
->base
));
217 /* will handle it together with the write back support */
218 if (events
& KOMEDA_EVENT_EOW
)
221 if (events
& KOMEDA_EVENT_FLIP
) {
223 struct drm_pending_vblank_event
*event
;
225 spin_lock_irqsave(&crtc
->dev
->event_lock
, flags
);
226 if (kcrtc
->disable_done
) {
227 complete_all(kcrtc
->disable_done
);
228 kcrtc
->disable_done
= NULL
;
229 } else if (crtc
->state
->event
) {
230 event
= crtc
->state
->event
;
232 * Consume event before notifying drm core that flip
235 crtc
->state
->event
= NULL
;
236 drm_crtc_send_vblank_event(crtc
, event
);
238 DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n",
239 drm_crtc_index(&kcrtc
->base
));
241 spin_unlock_irqrestore(&crtc
->dev
->event_lock
, flags
);
246 komeda_crtc_do_flush(struct drm_crtc
*crtc
,
247 struct drm_crtc_state
*old
)
249 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
250 struct komeda_crtc_state
*kcrtc_st
= to_kcrtc_st(crtc
->state
);
251 struct komeda_dev
*mdev
= kcrtc
->base
.dev
->dev_private
;
252 struct komeda_pipeline
*master
= kcrtc
->master
;
253 struct komeda_pipeline
*slave
= kcrtc
->slave
;
254 struct komeda_wb_connector
*wb_conn
= kcrtc
->wb_conn
;
255 struct drm_connector_state
*conn_st
;
257 DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n",
258 drm_crtc_index(crtc
),
259 kcrtc_st
->active_pipes
, kcrtc_st
->affected_pipes
);
261 /* step 1: update the pipeline/component state to HW */
262 if (has_bit(master
->id
, kcrtc_st
->affected_pipes
))
263 komeda_pipeline_update(master
, old
->state
);
265 if (slave
&& has_bit(slave
->id
, kcrtc_st
->affected_pipes
))
266 komeda_pipeline_update(slave
, old
->state
);
268 conn_st
= wb_conn
? wb_conn
->base
.base
.state
: NULL
;
269 if (conn_st
&& conn_st
->writeback_job
)
270 drm_writeback_queue_job(&wb_conn
->base
, conn_st
);
272 /* step 2: notify the HW to kickoff the update */
273 mdev
->funcs
->flush(mdev
, master
->id
, kcrtc_st
->active_pipes
);
277 komeda_crtc_atomic_enable(struct drm_crtc
*crtc
,
278 struct drm_atomic_state
*state
)
280 struct drm_crtc_state
*old
= drm_atomic_get_old_crtc_state(state
,
282 pm_runtime_get_sync(crtc
->dev
->dev
);
283 komeda_crtc_prepare(to_kcrtc(crtc
));
284 drm_crtc_vblank_on(crtc
);
285 WARN_ON(drm_crtc_vblank_get(crtc
));
286 komeda_crtc_do_flush(crtc
, old
);
290 komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc
*kcrtc
,
291 struct completion
*input_flip_done
)
293 struct drm_device
*drm
= kcrtc
->base
.dev
;
294 struct komeda_dev
*mdev
= kcrtc
->master
->mdev
;
295 struct completion
*flip_done
;
296 struct completion temp
;
299 /* if caller doesn't send a flip_done, use a private flip_done */
300 if (input_flip_done
) {
301 flip_done
= input_flip_done
;
303 init_completion(&temp
);
304 kcrtc
->disable_done
= &temp
;
308 mdev
->funcs
->flush(mdev
, kcrtc
->master
->id
, 0);
310 /* wait the flip take affect.*/
311 timeout
= wait_for_completion_timeout(flip_done
, HZ
);
313 DRM_ERROR("wait pipe%d flip done timeout\n", kcrtc
->master
->id
);
314 if (!input_flip_done
) {
317 spin_lock_irqsave(&drm
->event_lock
, flags
);
318 kcrtc
->disable_done
= NULL
;
319 spin_unlock_irqrestore(&drm
->event_lock
, flags
);
325 komeda_crtc_atomic_disable(struct drm_crtc
*crtc
,
326 struct drm_atomic_state
*state
)
328 struct drm_crtc_state
*old
= drm_atomic_get_old_crtc_state(state
,
330 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
331 struct komeda_crtc_state
*old_st
= to_kcrtc_st(old
);
332 struct komeda_pipeline
*master
= kcrtc
->master
;
333 struct komeda_pipeline
*slave
= kcrtc
->slave
;
334 struct completion
*disable_done
;
335 bool needs_phase2
= false;
337 DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x\n",
338 drm_crtc_index(crtc
),
339 old_st
->active_pipes
, old_st
->affected_pipes
);
341 if (slave
&& has_bit(slave
->id
, old_st
->active_pipes
))
342 komeda_pipeline_disable(slave
, old
->state
);
344 if (has_bit(master
->id
, old_st
->active_pipes
))
345 needs_phase2
= komeda_pipeline_disable(master
, old
->state
);
347 /* crtc_disable has two scenarios according to the state->active switch.
348 * 1. active -> inactive
349 * this commit is a disable commit. and the commit will be finished
350 * or done after the disable operation. on this case we can directly
351 * use the crtc->state->event to tracking the HW disable operation.
352 * 2. active -> active
353 * the crtc->commit is not for disable, but a modeset operation when
354 * crtc is active, such commit actually has been completed by 3
356 * crtc_disable, update_planes(crtc_flush), crtc_enable
357 * so on this case the crtc->commit is for the whole process.
358 * we can not use it for tracing the disable, we need a temporary
359 * flip_done for tracing the disable. and crtc->state->event for
360 * the crtc_enable operation.
361 * That's also the reason why skip modeset commit in
362 * komeda_crtc_atomic_flush()
364 disable_done
= (needs_phase2
|| crtc
->state
->active
) ?
365 NULL
: &crtc
->state
->commit
->flip_done
;
367 /* wait phase 1 disable done */
368 komeda_crtc_flush_and_wait_for_flip_done(kcrtc
, disable_done
);
372 komeda_pipeline_disable(kcrtc
->master
, old
->state
);
374 disable_done
= crtc
->state
->active
?
375 NULL
: &crtc
->state
->commit
->flip_done
;
377 komeda_crtc_flush_and_wait_for_flip_done(kcrtc
, disable_done
);
380 drm_crtc_vblank_put(crtc
);
381 drm_crtc_vblank_off(crtc
);
382 komeda_crtc_unprepare(kcrtc
);
383 pm_runtime_put(crtc
->dev
->dev
);
387 komeda_crtc_atomic_flush(struct drm_crtc
*crtc
,
388 struct drm_atomic_state
*state
)
390 struct drm_crtc_state
*crtc_state
= drm_atomic_get_new_crtc_state(state
,
392 struct drm_crtc_state
*old
= drm_atomic_get_old_crtc_state(state
,
394 /* commit with modeset will be handled in enable/disable */
395 if (drm_atomic_crtc_needs_modeset(crtc_state
))
398 komeda_crtc_do_flush(crtc
, old
);
401 /* Returns the minimum frequency of the aclk rate (main engine clock) in Hz */
403 komeda_calc_min_aclk_rate(struct komeda_crtc
*kcrtc
,
404 unsigned long pxlclk
)
406 /* Once dual-link one display pipeline drives two display outputs,
407 * the aclk needs run on the double rate of pxlclk
409 if (kcrtc
->master
->dual_link
)
415 /* Get current aclk rate that specified by state */
416 unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state
*kcrtc_st
)
418 struct drm_crtc
*crtc
= kcrtc_st
->base
.crtc
;
419 struct komeda_dev
*mdev
= crtc
->dev
->dev_private
;
420 unsigned long pxlclk
= kcrtc_st
->base
.adjusted_mode
.crtc_clock
* 1000;
421 unsigned long min_aclk
;
423 min_aclk
= komeda_calc_min_aclk_rate(to_kcrtc(crtc
), pxlclk
);
425 return clk_round_rate(mdev
->aclk
, min_aclk
);
428 static enum drm_mode_status
429 komeda_crtc_mode_valid(struct drm_crtc
*crtc
, const struct drm_display_mode
*m
)
431 struct komeda_dev
*mdev
= crtc
->dev
->dev_private
;
432 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
433 struct komeda_pipeline
*master
= kcrtc
->master
;
434 unsigned long min_pxlclk
, min_aclk
;
436 if (m
->flags
& DRM_MODE_FLAG_INTERLACE
)
437 return MODE_NO_INTERLACE
;
439 min_pxlclk
= m
->clock
* 1000;
440 if (master
->dual_link
)
443 if (min_pxlclk
!= clk_round_rate(master
->pxlclk
, min_pxlclk
)) {
444 DRM_DEBUG_ATOMIC("pxlclk doesn't support %lu Hz\n", min_pxlclk
);
449 min_aclk
= komeda_calc_min_aclk_rate(to_kcrtc(crtc
), min_pxlclk
);
450 if (clk_round_rate(mdev
->aclk
, min_aclk
) < min_aclk
) {
451 DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %lu.\n",
452 m
->name
, min_pxlclk
);
454 return MODE_CLOCK_HIGH
;
460 static bool komeda_crtc_mode_fixup(struct drm_crtc
*crtc
,
461 const struct drm_display_mode
*m
,
462 struct drm_display_mode
*adjusted_mode
)
464 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
465 unsigned long clk_rate
;
467 drm_mode_set_crtcinfo(adjusted_mode
, 0);
468 /* In dual link half the horizontal settings */
469 if (kcrtc
->master
->dual_link
) {
470 adjusted_mode
->crtc_clock
/= 2;
471 adjusted_mode
->crtc_hdisplay
/= 2;
472 adjusted_mode
->crtc_hsync_start
/= 2;
473 adjusted_mode
->crtc_hsync_end
/= 2;
474 adjusted_mode
->crtc_htotal
/= 2;
477 clk_rate
= adjusted_mode
->crtc_clock
* 1000;
478 /* crtc_clock will be used as the komeda output pixel clock */
479 adjusted_mode
->crtc_clock
= clk_round_rate(kcrtc
->master
->pxlclk
,
485 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs
= {
486 .atomic_check
= komeda_crtc_atomic_check
,
487 .atomic_flush
= komeda_crtc_atomic_flush
,
488 .atomic_enable
= komeda_crtc_atomic_enable
,
489 .atomic_disable
= komeda_crtc_atomic_disable
,
490 .mode_valid
= komeda_crtc_mode_valid
,
491 .mode_fixup
= komeda_crtc_mode_fixup
,
494 static void komeda_crtc_reset(struct drm_crtc
*crtc
)
496 struct komeda_crtc_state
*state
;
499 __drm_atomic_helper_crtc_destroy_state(crtc
->state
);
501 kfree(to_kcrtc_st(crtc
->state
));
504 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
506 __drm_atomic_helper_crtc_reset(crtc
, &state
->base
);
509 static struct drm_crtc_state
*
510 komeda_crtc_atomic_duplicate_state(struct drm_crtc
*crtc
)
512 struct komeda_crtc_state
*old
= to_kcrtc_st(crtc
->state
);
513 struct komeda_crtc_state
*new;
515 new = kzalloc(sizeof(*new), GFP_KERNEL
);
519 __drm_atomic_helper_crtc_duplicate_state(crtc
, &new->base
);
521 new->affected_pipes
= old
->active_pipes
;
522 new->clock_ratio
= old
->clock_ratio
;
523 new->max_slave_zorder
= old
->max_slave_zorder
;
528 static void komeda_crtc_atomic_destroy_state(struct drm_crtc
*crtc
,
529 struct drm_crtc_state
*state
)
531 __drm_atomic_helper_crtc_destroy_state(state
);
532 kfree(to_kcrtc_st(state
));
535 static int komeda_crtc_vblank_enable(struct drm_crtc
*crtc
)
537 struct komeda_dev
*mdev
= crtc
->dev
->dev_private
;
538 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
540 mdev
->funcs
->on_off_vblank(mdev
, kcrtc
->master
->id
, true);
544 static void komeda_crtc_vblank_disable(struct drm_crtc
*crtc
)
546 struct komeda_dev
*mdev
= crtc
->dev
->dev_private
;
547 struct komeda_crtc
*kcrtc
= to_kcrtc(crtc
);
549 mdev
->funcs
->on_off_vblank(mdev
, kcrtc
->master
->id
, false);
552 static const struct drm_crtc_funcs komeda_crtc_funcs
= {
553 .gamma_set
= drm_atomic_helper_legacy_gamma_set
,
554 .destroy
= drm_crtc_cleanup
,
555 .set_config
= drm_atomic_helper_set_config
,
556 .page_flip
= drm_atomic_helper_page_flip
,
557 .reset
= komeda_crtc_reset
,
558 .atomic_duplicate_state
= komeda_crtc_atomic_duplicate_state
,
559 .atomic_destroy_state
= komeda_crtc_atomic_destroy_state
,
560 .enable_vblank
= komeda_crtc_vblank_enable
,
561 .disable_vblank
= komeda_crtc_vblank_disable
,
564 int komeda_kms_setup_crtcs(struct komeda_kms_dev
*kms
,
565 struct komeda_dev
*mdev
)
567 struct komeda_crtc
*crtc
;
568 struct komeda_pipeline
*master
;
574 for (i
= 0; i
< mdev
->n_pipelines
; i
++) {
575 crtc
= &kms
->crtcs
[kms
->n_crtcs
];
576 master
= mdev
->pipelines
[i
];
578 crtc
->master
= master
;
579 crtc
->slave
= komeda_pipeline_get_slave(master
);
582 sprintf(str
, "pipe-%d", crtc
->slave
->id
);
584 sprintf(str
, "None");
586 DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n",
587 kms
->n_crtcs
, master
->id
, str
);
595 static struct drm_plane
*
596 get_crtc_primary(struct komeda_kms_dev
*kms
, struct komeda_crtc
*crtc
)
598 struct komeda_plane
*kplane
;
599 struct drm_plane
*plane
;
601 drm_for_each_plane(plane
, &kms
->base
) {
602 if (plane
->type
!= DRM_PLANE_TYPE_PRIMARY
)
605 kplane
= to_kplane(plane
);
606 /* only master can be primary */
607 if (kplane
->layer
->base
.pipeline
== crtc
->master
)
614 static int komeda_crtc_add(struct komeda_kms_dev
*kms
,
615 struct komeda_crtc
*kcrtc
)
617 struct drm_crtc
*crtc
= &kcrtc
->base
;
620 err
= drm_crtc_init_with_planes(&kms
->base
, crtc
,
621 get_crtc_primary(kms
, kcrtc
), NULL
,
622 &komeda_crtc_funcs
, NULL
);
626 drm_crtc_helper_add(crtc
, &komeda_crtc_helper_funcs
);
628 crtc
->port
= kcrtc
->master
->of_output_port
;
630 drm_crtc_enable_color_mgmt(crtc
, 0, true, KOMEDA_COLOR_LUT_SIZE
);
635 int komeda_kms_add_crtcs(struct komeda_kms_dev
*kms
, struct komeda_dev
*mdev
)
639 for (i
= 0; i
< kms
->n_crtcs
; i
++) {
640 err
= komeda_crtc_add(kms
, &kms
->crtcs
[i
]);