WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / mgag200 / mgag200_drv.c
bloba977c9f49719ba7097274aab820509cf5f786e07
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright 2012 Red Hat
5 * Authors: Matthew Garrett
6 * Dave Airlie
7 */
9 #include <linux/console.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/vmalloc.h>
14 #include <drm/drm_drv.h>
15 #include <drm/drm_file.h>
16 #include <drm/drm_ioctl.h>
17 #include <drm/drm_pciids.h>
19 #include "mgag200_drv.h"
21 int mgag200_modeset = -1;
22 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
23 module_param_named(modeset, mgag200_modeset, int, 0400);
26 * DRM driver
29 DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
31 static const struct drm_driver mgag200_driver = {
32 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
33 .fops = &mgag200_driver_fops,
34 .name = DRIVER_NAME,
35 .desc = DRIVER_DESC,
36 .date = DRIVER_DATE,
37 .major = DRIVER_MAJOR,
38 .minor = DRIVER_MINOR,
39 .patchlevel = DRIVER_PATCHLEVEL,
40 DRM_GEM_SHMEM_DRIVER_OPS,
44 * DRM device
47 static bool mgag200_has_sgram(struct mga_device *mdev)
49 struct drm_device *dev = &mdev->base;
50 u32 option;
51 int ret;
53 ret = pci_read_config_dword(dev->pdev, PCI_MGA_OPTION, &option);
54 if (drm_WARN(dev, ret, "failed to read PCI config dword: %d\n", ret))
55 return false;
57 return !!(option & PCI_MGA_OPTION_HARDPWMSK);
60 static int mgag200_regs_init(struct mga_device *mdev)
62 struct drm_device *dev = &mdev->base;
63 u32 option, option2;
64 u8 crtcext3;
66 switch (mdev->type) {
67 case G200_PCI:
68 case G200_AGP:
69 if (mgag200_has_sgram(mdev))
70 option = 0x4049cd21;
71 else
72 option = 0x40499121;
73 option2 = 0x00008000;
74 break;
75 case G200_SE_A:
76 case G200_SE_B:
77 option = 0x40049120;
78 if (mgag200_has_sgram(mdev))
79 option |= PCI_MGA_OPTION_HARDPWMSK;
80 option2 = 0x00008000;
81 break;
82 case G200_WB:
83 case G200_EW3:
84 option = 0x41049120;
85 option2 = 0x0000b000;
86 break;
87 case G200_EV:
88 option = 0x00000120;
89 option2 = 0x0000b000;
90 break;
91 case G200_EH:
92 case G200_EH3:
93 option = 0x00000120;
94 option2 = 0x0000b000;
95 break;
96 default:
97 option = 0;
98 option2 = 0;
101 if (option)
102 pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option);
103 if (option2)
104 pci_write_config_dword(dev->pdev, PCI_MGA_OPTION2, option2);
106 /* BAR 1 contains registers */
107 mdev->rmmio_base = pci_resource_start(dev->pdev, 1);
108 mdev->rmmio_size = pci_resource_len(dev->pdev, 1);
110 if (!devm_request_mem_region(dev->dev, mdev->rmmio_base,
111 mdev->rmmio_size, "mgadrmfb_mmio")) {
112 drm_err(dev, "can't reserve mmio registers\n");
113 return -ENOMEM;
116 mdev->rmmio = pcim_iomap(dev->pdev, 1, 0);
117 if (mdev->rmmio == NULL)
118 return -ENOMEM;
120 RREG_ECRT(0x03, crtcext3);
121 crtcext3 |= MGAREG_CRTCEXT3_MGAMODE;
122 WREG_ECRT(0x03, crtcext3);
124 return 0;
127 static void mgag200_g200_interpret_bios(struct mga_device *mdev,
128 const unsigned char *bios,
129 size_t size)
131 static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'};
132 static const unsigned int expected_length[6] = {
133 0, 64, 64, 64, 128, 128
135 struct drm_device *dev = &mdev->base;
136 const unsigned char *pins;
137 unsigned int pins_len, version;
138 int offset;
139 int tmp;
141 /* Test for MATROX string. */
142 if (size < 45 + sizeof(matrox))
143 return;
144 if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0)
145 return;
147 /* Get the PInS offset. */
148 if (size < MGA_BIOS_OFFSET + 2)
149 return;
150 offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET];
152 /* Get PInS data structure. */
154 if (size < offset + 6)
155 return;
156 pins = bios + offset;
157 if (pins[0] == 0x2e && pins[1] == 0x41) {
158 version = pins[5];
159 pins_len = pins[2];
160 } else {
161 version = 1;
162 pins_len = pins[0] + (pins[1] << 8);
165 if (version < 1 || version > 5) {
166 drm_warn(dev, "Unknown BIOS PInS version: %d\n", version);
167 return;
169 if (pins_len != expected_length[version]) {
170 drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n",
171 pins_len, expected_length[version]);
172 return;
174 if (size < offset + pins_len)
175 return;
177 drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n",
178 version, pins_len);
180 /* Extract the clock values */
182 switch (version) {
183 case 1:
184 tmp = pins[24] + (pins[25] << 8);
185 if (tmp)
186 mdev->model.g200.pclk_max = tmp * 10;
187 break;
188 case 2:
189 if (pins[41] != 0xff)
190 mdev->model.g200.pclk_max = (pins[41] + 100) * 1000;
191 break;
192 case 3:
193 if (pins[36] != 0xff)
194 mdev->model.g200.pclk_max = (pins[36] + 100) * 1000;
195 if (pins[52] & 0x20)
196 mdev->model.g200.ref_clk = 14318;
197 break;
198 case 4:
199 if (pins[39] != 0xff)
200 mdev->model.g200.pclk_max = pins[39] * 4 * 1000;
201 if (pins[92] & 0x01)
202 mdev->model.g200.ref_clk = 14318;
203 break;
204 case 5:
205 tmp = pins[4] ? 8000 : 6000;
206 if (pins[123] != 0xff)
207 mdev->model.g200.pclk_min = pins[123] * tmp;
208 if (pins[38] != 0xff)
209 mdev->model.g200.pclk_max = pins[38] * tmp;
210 if (pins[110] & 0x01)
211 mdev->model.g200.ref_clk = 14318;
212 break;
213 default:
214 break;
218 static void mgag200_g200_init_refclk(struct mga_device *mdev)
220 struct drm_device *dev = &mdev->base;
221 unsigned char __iomem *rom;
222 unsigned char *bios;
223 size_t size;
225 mdev->model.g200.pclk_min = 50000;
226 mdev->model.g200.pclk_max = 230000;
227 mdev->model.g200.ref_clk = 27050;
229 rom = pci_map_rom(dev->pdev, &size);
230 if (!rom)
231 return;
233 bios = vmalloc(size);
234 if (!bios)
235 goto out;
236 memcpy_fromio(bios, rom, size);
238 if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa)
239 mgag200_g200_interpret_bios(mdev, bios, size);
241 drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n",
242 mdev->model.g200.pclk_min, mdev->model.g200.pclk_max,
243 mdev->model.g200.ref_clk);
245 vfree(bios);
246 out:
247 pci_unmap_rom(dev->pdev, rom);
250 static void mgag200_g200se_init_unique_id(struct mga_device *mdev)
252 struct drm_device *dev = &mdev->base;
254 /* stash G200 SE model number for later use */
255 mdev->model.g200se.unique_rev_id = RREG32(0x1e24);
257 drm_dbg(dev, "G200 SE unique revision id is 0x%x\n",
258 mdev->model.g200se.unique_rev_id);
261 static int mgag200_device_init(struct mga_device *mdev, unsigned long flags)
263 struct drm_device *dev = &mdev->base;
264 int ret;
266 mdev->flags = mgag200_flags_from_driver_data(flags);
267 mdev->type = mgag200_type_from_driver_data(flags);
269 ret = mgag200_regs_init(mdev);
270 if (ret)
271 return ret;
273 if (mdev->type == G200_PCI || mdev->type == G200_AGP)
274 mgag200_g200_init_refclk(mdev);
275 else if (IS_G200_SE(mdev))
276 mgag200_g200se_init_unique_id(mdev);
278 ret = mgag200_mm_init(mdev);
279 if (ret)
280 return ret;
282 ret = mgag200_modeset_init(mdev);
283 if (ret) {
284 drm_err(dev, "Fatal error during modeset init: %d\n", ret);
285 return ret;
288 return 0;
291 static struct mga_device *
292 mgag200_device_create(struct pci_dev *pdev, unsigned long flags)
294 struct drm_device *dev;
295 struct mga_device *mdev;
296 int ret;
298 mdev = devm_drm_dev_alloc(&pdev->dev, &mgag200_driver,
299 struct mga_device, base);
300 if (IS_ERR(mdev))
301 return mdev;
302 dev = &mdev->base;
304 dev->pdev = pdev;
305 pci_set_drvdata(pdev, dev);
307 ret = mgag200_device_init(mdev, flags);
308 if (ret)
309 return ERR_PTR(ret);
311 return mdev;
315 * PCI driver
318 static const struct pci_device_id mgag200_pciidlist[] = {
319 { PCI_VENDOR_ID_MATROX, 0x520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_PCI },
320 { PCI_VENDOR_ID_MATROX, 0x521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_AGP },
321 { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
322 G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
323 { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B },
324 { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
325 { PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },
326 { PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH },
327 { PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER },
328 { PCI_VENDOR_ID_MATROX, 0x536, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EW3 },
329 { PCI_VENDOR_ID_MATROX, 0x538, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH3 },
330 {0,}
333 MODULE_DEVICE_TABLE(pci, mgag200_pciidlist);
335 static int
336 mgag200_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
338 struct mga_device *mdev;
339 struct drm_device *dev;
340 int ret;
342 drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "mgag200drmfb");
344 ret = pcim_enable_device(pdev);
345 if (ret)
346 return ret;
348 mdev = mgag200_device_create(pdev, ent->driver_data);
349 if (IS_ERR(mdev))
350 return PTR_ERR(mdev);
351 dev = &mdev->base;
353 ret = drm_dev_register(dev, ent->driver_data);
354 if (ret)
355 return ret;
357 drm_fbdev_generic_setup(dev, 0);
359 return 0;
362 static void mgag200_pci_remove(struct pci_dev *pdev)
364 struct drm_device *dev = pci_get_drvdata(pdev);
366 drm_dev_unregister(dev);
369 static struct pci_driver mgag200_pci_driver = {
370 .name = DRIVER_NAME,
371 .id_table = mgag200_pciidlist,
372 .probe = mgag200_pci_probe,
373 .remove = mgag200_pci_remove,
376 static int __init mgag200_init(void)
378 if (vgacon_text_force() && mgag200_modeset == -1)
379 return -EINVAL;
381 if (mgag200_modeset == 0)
382 return -EINVAL;
384 return pci_register_driver(&mgag200_pci_driver);
387 static void __exit mgag200_exit(void)
389 pci_unregister_driver(&mgag200_pci_driver);
392 module_init(mgag200_init);
393 module_exit(mgag200_exit);
395 MODULE_AUTHOR(DRIVER_AUTHOR);
396 MODULE_DESCRIPTION(DRIVER_DESC);
397 MODULE_LICENSE("GPL");