1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015 Free Electrons
4 * Copyright (C) 2015 NextThing Co
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
10 #include <linux/component.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/platform_device.h>
14 #include <linux/regmap.h>
15 #include <linux/reset.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_of.h>
19 #include <drm/drm_panel.h>
20 #include <drm/drm_print.h>
21 #include <drm/drm_probe_helper.h>
22 #include <drm/drm_simple_kms_helper.h>
24 #include "sun4i_crtc.h"
25 #include "sun4i_drv.h"
26 #include "sunxi_engine.h"
28 #define SUN4I_TVE_EN_REG 0x000
29 #define SUN4I_TVE_EN_DAC_MAP_MASK GENMASK(19, 4)
30 #define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4)
31 #define SUN4I_TVE_EN_ENABLE BIT(0)
33 #define SUN4I_TVE_CFG0_REG 0x004
34 #define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26)
35 #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M BIT(25)
36 #define SUN4I_TVE_CFG0_CORE_CONTROL_54M BIT(24)
37 #define SUN4I_TVE_CFG0_YC_EN BIT(17)
38 #define SUN4I_TVE_CFG0_COMP_EN BIT(16)
39 #define SUN4I_TVE_CFG0_RES(x) ((x) & 0xf)
40 #define SUN4I_TVE_CFG0_RES_480i SUN4I_TVE_CFG0_RES(0)
41 #define SUN4I_TVE_CFG0_RES_576i SUN4I_TVE_CFG0_RES(1)
43 #define SUN4I_TVE_DAC0_REG 0x008
44 #define SUN4I_TVE_DAC0_CLOCK_INVERT BIT(24)
45 #define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20)
46 #define SUN4I_TVE_DAC0_LUMA_0_4 SUN4I_TVE_DAC0_LUMA(3)
47 #define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18)
48 #define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3)
49 #define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16)
50 #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS SUN4I_TVE_DAC0_INTERNAL_DAC(3)
51 #define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac)
53 #define SUN4I_TVE_NOTCH_REG 0x00c
54 #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3))
56 #define SUN4I_TVE_CHROMA_FREQ_REG 0x010
58 #define SUN4I_TVE_PORCH_REG 0x014
59 #define SUN4I_TVE_PORCH_BACK(x) ((x) << 16)
60 #define SUN4I_TVE_PORCH_FRONT(x) (x)
62 #define SUN4I_TVE_LINE_REG 0x01c
63 #define SUN4I_TVE_LINE_FIRST(x) ((x) << 16)
64 #define SUN4I_TVE_LINE_NUMBER(x) (x)
66 #define SUN4I_TVE_LEVEL_REG 0x020
67 #define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16)
68 #define SUN4I_TVE_LEVEL_BLACK(x) (x)
70 #define SUN4I_TVE_DAC1_REG 0x024
71 #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8))
73 #define SUN4I_TVE_DETECT_STA_REG 0x038
74 #define SUN4I_TVE_DETECT_STA_DAC(dac) BIT((dac * 8))
75 #define SUN4I_TVE_DETECT_STA_UNCONNECTED 0
76 #define SUN4I_TVE_DETECT_STA_CONNECTED 1
77 #define SUN4I_TVE_DETECT_STA_GROUND 2
79 #define SUN4I_TVE_CB_CR_LVL_REG 0x10c
80 #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x) ((x) << 8)
81 #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x) (x)
83 #define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110
84 #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x)
86 #define SUN4I_TVE_BURST_WIDTH_REG 0x114
87 #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16)
88 #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8)
89 #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x)
91 #define SUN4I_TVE_CB_CR_GAIN_REG 0x118
92 #define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8)
93 #define SUN4I_TVE_CB_CR_GAIN_CB(x) (x)
95 #define SUN4I_TVE_SYNC_VBI_REG 0x11c
96 #define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16)
97 #define SUN4I_TVE_SYNC_VBI_VBLANK(x) (x)
99 #define SUN4I_TVE_ACTIVE_LINE_REG 0x124
100 #define SUN4I_TVE_ACTIVE_LINE(x) (x)
102 #define SUN4I_TVE_CHROMA_REG 0x128
103 #define SUN4I_TVE_CHROMA_COMP_GAIN(x) ((x) & 3)
104 #define SUN4I_TVE_CHROMA_COMP_GAIN_50 SUN4I_TVE_CHROMA_COMP_GAIN(2)
106 #define SUN4I_TVE_12C_REG 0x12c
107 #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE BIT(8)
108 #define SUN4I_TVE_12C_COMP_YUV_EN BIT(0)
110 #define SUN4I_TVE_RESYNC_REG 0x130
111 #define SUN4I_TVE_RESYNC_FIELD BIT(31)
112 #define SUN4I_TVE_RESYNC_LINE(x) ((x) << 16)
113 #define SUN4I_TVE_RESYNC_PIXEL(x) (x)
115 #define SUN4I_TVE_SLAVE_REG 0x134
117 #define SUN4I_TVE_WSS_DATA2_REG 0x244
124 struct burst_levels
{
129 struct video_levels
{
134 struct resync_parameters
{
164 const struct color_gains
*color_gains
;
165 const struct burst_levels
*burst_levels
;
166 const struct video_levels
*video_levels
;
167 const struct resync_parameters
*resync_params
;
171 struct drm_connector connector
;
172 struct drm_encoder encoder
;
176 struct reset_control
*reset
;
178 struct sun4i_drv
*drv
;
181 static const struct video_levels ntsc_video_levels
= {
182 .black
= 282, .blank
= 240,
185 static const struct video_levels pal_video_levels
= {
186 .black
= 252, .blank
= 252,
189 static const struct burst_levels ntsc_burst_levels
= {
193 static const struct burst_levels pal_burst_levels
= {
197 static const struct color_gains ntsc_color_gains
= {
198 .cb
= 160, .cr
= 160,
201 static const struct color_gains pal_color_gains
= {
202 .cb
= 224, .cr
= 224,
205 static const struct resync_parameters ntsc_resync_parameters
= {
206 .field
= false, .line
= 14, .pixel
= 12,
209 static const struct resync_parameters pal_resync_parameters
= {
210 .field
= true, .line
= 13, .pixel
= 12,
213 static const struct tv_mode tv_modes
[] = {
216 .mode
= SUN4I_TVE_CFG0_RES_480i
,
217 .chroma_freq
= 0x21f07c1f,
220 .dac_bit25_en
= true,
238 .color_gains
= &ntsc_color_gains
,
239 .burst_levels
= &ntsc_burst_levels
,
240 .video_levels
= &ntsc_video_levels
,
241 .resync_params
= &ntsc_resync_parameters
,
245 .mode
= SUN4I_TVE_CFG0_RES_576i
,
246 .chroma_freq
= 0x2a098acb,
264 .color_gains
= &pal_color_gains
,
265 .burst_levels
= &pal_burst_levels
,
266 .video_levels
= &pal_video_levels
,
267 .resync_params
= &pal_resync_parameters
,
271 static inline struct sun4i_tv
*
272 drm_encoder_to_sun4i_tv(struct drm_encoder
*encoder
)
274 return container_of(encoder
, struct sun4i_tv
,
278 static inline struct sun4i_tv
*
279 drm_connector_to_sun4i_tv(struct drm_connector
*connector
)
281 return container_of(connector
, struct sun4i_tv
,
286 * FIXME: If only the drm_display_mode private field was usable, this
289 * So far, it doesn't seem to be preserved when the mode is passed by
290 * to mode_set for some reason.
292 static const struct tv_mode
*sun4i_tv_find_tv_by_mode(const struct drm_display_mode
*mode
)
296 /* First try to identify the mode by name */
297 for (i
= 0; i
< ARRAY_SIZE(tv_modes
); i
++) {
298 const struct tv_mode
*tv_mode
= &tv_modes
[i
];
300 DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
301 mode
->name
, tv_mode
->name
);
303 if (!strcmp(mode
->name
, tv_mode
->name
))
307 /* Then by number of lines */
308 for (i
= 0; i
< ARRAY_SIZE(tv_modes
); i
++) {
309 const struct tv_mode
*tv_mode
= &tv_modes
[i
];
311 DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
312 mode
->name
, tv_mode
->name
,
313 mode
->vdisplay
, tv_mode
->vdisplay
);
315 if (mode
->vdisplay
== tv_mode
->vdisplay
)
322 static void sun4i_tv_mode_to_drm_mode(const struct tv_mode
*tv_mode
,
323 struct drm_display_mode
*mode
)
325 DRM_DEBUG_DRIVER("Creating mode %s\n", mode
->name
);
327 mode
->type
= DRM_MODE_TYPE_DRIVER
;
329 mode
->flags
= DRM_MODE_FLAG_INTERLACE
;
331 mode
->hdisplay
= tv_mode
->hdisplay
;
332 mode
->hsync_start
= mode
->hdisplay
+ tv_mode
->hfront_porch
;
333 mode
->hsync_end
= mode
->hsync_start
+ tv_mode
->hsync_len
;
334 mode
->htotal
= mode
->hsync_end
+ tv_mode
->hback_porch
;
336 mode
->vdisplay
= tv_mode
->vdisplay
;
337 mode
->vsync_start
= mode
->vdisplay
+ tv_mode
->vfront_porch
;
338 mode
->vsync_end
= mode
->vsync_start
+ tv_mode
->vsync_len
;
339 mode
->vtotal
= mode
->vsync_end
+ tv_mode
->vback_porch
;
342 static void sun4i_tv_disable(struct drm_encoder
*encoder
)
344 struct sun4i_tv
*tv
= drm_encoder_to_sun4i_tv(encoder
);
345 struct sun4i_crtc
*crtc
= drm_crtc_to_sun4i_crtc(encoder
->crtc
);
347 DRM_DEBUG_DRIVER("Disabling the TV Output\n");
349 regmap_update_bits(tv
->regs
, SUN4I_TVE_EN_REG
,
353 sunxi_engine_disable_color_correction(crtc
->engine
);
356 static void sun4i_tv_enable(struct drm_encoder
*encoder
)
358 struct sun4i_tv
*tv
= drm_encoder_to_sun4i_tv(encoder
);
359 struct sun4i_crtc
*crtc
= drm_crtc_to_sun4i_crtc(encoder
->crtc
);
361 DRM_DEBUG_DRIVER("Enabling the TV Output\n");
363 sunxi_engine_apply_color_correction(crtc
->engine
);
365 regmap_update_bits(tv
->regs
, SUN4I_TVE_EN_REG
,
367 SUN4I_TVE_EN_ENABLE
);
370 static void sun4i_tv_mode_set(struct drm_encoder
*encoder
,
371 struct drm_display_mode
*mode
,
372 struct drm_display_mode
*adjusted_mode
)
374 struct sun4i_tv
*tv
= drm_encoder_to_sun4i_tv(encoder
);
375 const struct tv_mode
*tv_mode
= sun4i_tv_find_tv_by_mode(mode
);
377 /* Enable and map the DAC to the output */
378 regmap_update_bits(tv
->regs
, SUN4I_TVE_EN_REG
,
379 SUN4I_TVE_EN_DAC_MAP_MASK
,
380 SUN4I_TVE_EN_DAC_MAP(0, 1) |
381 SUN4I_TVE_EN_DAC_MAP(1, 2) |
382 SUN4I_TVE_EN_DAC_MAP(2, 3) |
383 SUN4I_TVE_EN_DAC_MAP(3, 4));
385 /* Set PAL settings */
386 regmap_write(tv
->regs
, SUN4I_TVE_CFG0_REG
,
388 (tv_mode
->yc_en
? SUN4I_TVE_CFG0_YC_EN
: 0) |
389 SUN4I_TVE_CFG0_COMP_EN
|
390 SUN4I_TVE_CFG0_DAC_CONTROL_54M
|
391 SUN4I_TVE_CFG0_CORE_DATAPATH_54M
|
392 SUN4I_TVE_CFG0_CORE_CONTROL_54M
);
394 /* Configure the DAC for a composite output */
395 regmap_write(tv
->regs
, SUN4I_TVE_DAC0_REG
,
396 SUN4I_TVE_DAC0_DAC_EN(0) |
397 (tv_mode
->dac3_en
? SUN4I_TVE_DAC0_DAC_EN(3) : 0) |
398 SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS
|
399 SUN4I_TVE_DAC0_CHROMA_0_75
|
400 SUN4I_TVE_DAC0_LUMA_0_4
|
401 SUN4I_TVE_DAC0_CLOCK_INVERT
|
402 (tv_mode
->dac_bit25_en
? BIT(25) : 0) |
405 /* Configure the sample delay between DAC0 and the other DAC */
406 regmap_write(tv
->regs
, SUN4I_TVE_NOTCH_REG
,
407 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) |
408 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0));
410 regmap_write(tv
->regs
, SUN4I_TVE_CHROMA_FREQ_REG
,
411 tv_mode
->chroma_freq
);
413 /* Set the front and back porch */
414 regmap_write(tv
->regs
, SUN4I_TVE_PORCH_REG
,
415 SUN4I_TVE_PORCH_BACK(tv_mode
->back_porch
) |
416 SUN4I_TVE_PORCH_FRONT(tv_mode
->front_porch
));
418 /* Set the lines setup */
419 regmap_write(tv
->regs
, SUN4I_TVE_LINE_REG
,
420 SUN4I_TVE_LINE_FIRST(22) |
421 SUN4I_TVE_LINE_NUMBER(tv_mode
->line_number
));
423 regmap_write(tv
->regs
, SUN4I_TVE_LEVEL_REG
,
424 SUN4I_TVE_LEVEL_BLANK(tv_mode
->video_levels
->blank
) |
425 SUN4I_TVE_LEVEL_BLACK(tv_mode
->video_levels
->black
));
427 regmap_write(tv
->regs
, SUN4I_TVE_DAC1_REG
,
428 SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) |
429 SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) |
430 SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) |
431 SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18));
433 regmap_write(tv
->regs
, SUN4I_TVE_CB_CR_LVL_REG
,
434 SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode
->burst_levels
->cb
) |
435 SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode
->burst_levels
->cr
));
437 /* Set burst width for a composite output */
438 regmap_write(tv
->regs
, SUN4I_TVE_BURST_WIDTH_REG
,
439 SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) |
440 SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) |
441 SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22));
443 regmap_write(tv
->regs
, SUN4I_TVE_CB_CR_GAIN_REG
,
444 SUN4I_TVE_CB_CR_GAIN_CB(tv_mode
->color_gains
->cb
) |
445 SUN4I_TVE_CB_CR_GAIN_CR(tv_mode
->color_gains
->cr
));
447 regmap_write(tv
->regs
, SUN4I_TVE_SYNC_VBI_REG
,
448 SUN4I_TVE_SYNC_VBI_SYNC(0x10) |
449 SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode
->vblank_level
));
451 regmap_write(tv
->regs
, SUN4I_TVE_ACTIVE_LINE_REG
,
452 SUN4I_TVE_ACTIVE_LINE(1440));
454 /* Set composite chroma gain to 50 % */
455 regmap_write(tv
->regs
, SUN4I_TVE_CHROMA_REG
,
456 SUN4I_TVE_CHROMA_COMP_GAIN_50
);
458 regmap_write(tv
->regs
, SUN4I_TVE_12C_REG
,
459 SUN4I_TVE_12C_COMP_YUV_EN
|
460 SUN4I_TVE_12C_NOTCH_WIDTH_WIDE
);
462 regmap_write(tv
->regs
, SUN4I_TVE_RESYNC_REG
,
463 SUN4I_TVE_RESYNC_PIXEL(tv_mode
->resync_params
->pixel
) |
464 SUN4I_TVE_RESYNC_LINE(tv_mode
->resync_params
->line
) |
465 (tv_mode
->resync_params
->field
?
466 SUN4I_TVE_RESYNC_FIELD
: 0));
468 regmap_write(tv
->regs
, SUN4I_TVE_SLAVE_REG
, 0);
471 static const struct drm_encoder_helper_funcs sun4i_tv_helper_funcs
= {
472 .disable
= sun4i_tv_disable
,
473 .enable
= sun4i_tv_enable
,
474 .mode_set
= sun4i_tv_mode_set
,
477 static int sun4i_tv_comp_get_modes(struct drm_connector
*connector
)
481 for (i
= 0; i
< ARRAY_SIZE(tv_modes
); i
++) {
482 struct drm_display_mode
*mode
;
483 const struct tv_mode
*tv_mode
= &tv_modes
[i
];
485 mode
= drm_mode_create(connector
->dev
);
487 DRM_ERROR("Failed to create a new display mode\n");
491 strcpy(mode
->name
, tv_mode
->name
);
493 sun4i_tv_mode_to_drm_mode(tv_mode
, mode
);
494 drm_mode_probed_add(connector
, mode
);
500 static int sun4i_tv_comp_mode_valid(struct drm_connector
*connector
,
501 struct drm_display_mode
*mode
)
507 static const struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs
= {
508 .get_modes
= sun4i_tv_comp_get_modes
,
509 .mode_valid
= sun4i_tv_comp_mode_valid
,
513 sun4i_tv_comp_connector_destroy(struct drm_connector
*connector
)
515 drm_connector_cleanup(connector
);
518 static const struct drm_connector_funcs sun4i_tv_comp_connector_funcs
= {
519 .fill_modes
= drm_helper_probe_single_connector_modes
,
520 .destroy
= sun4i_tv_comp_connector_destroy
,
521 .reset
= drm_atomic_helper_connector_reset
,
522 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
523 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
526 static const struct regmap_config sun4i_tv_regmap_config
= {
530 .max_register
= SUN4I_TVE_WSS_DATA2_REG
,
531 .name
= "tv-encoder",
534 static int sun4i_tv_bind(struct device
*dev
, struct device
*master
,
537 struct platform_device
*pdev
= to_platform_device(dev
);
538 struct drm_device
*drm
= data
;
539 struct sun4i_drv
*drv
= drm
->dev_private
;
541 struct resource
*res
;
545 tv
= devm_kzalloc(dev
, sizeof(*tv
), GFP_KERNEL
);
549 dev_set_drvdata(dev
, tv
);
551 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
552 regs
= devm_ioremap_resource(dev
, res
);
554 dev_err(dev
, "Couldn't map the TV encoder registers\n");
555 return PTR_ERR(regs
);
558 tv
->regs
= devm_regmap_init_mmio(dev
, regs
,
559 &sun4i_tv_regmap_config
);
560 if (IS_ERR(tv
->regs
)) {
561 dev_err(dev
, "Couldn't create the TV encoder regmap\n");
562 return PTR_ERR(tv
->regs
);
565 tv
->reset
= devm_reset_control_get(dev
, NULL
);
566 if (IS_ERR(tv
->reset
)) {
567 dev_err(dev
, "Couldn't get our reset line\n");
568 return PTR_ERR(tv
->reset
);
571 ret
= reset_control_deassert(tv
->reset
);
573 dev_err(dev
, "Couldn't deassert our reset line\n");
577 tv
->clk
= devm_clk_get(dev
, NULL
);
578 if (IS_ERR(tv
->clk
)) {
579 dev_err(dev
, "Couldn't get the TV encoder clock\n");
580 ret
= PTR_ERR(tv
->clk
);
581 goto err_assert_reset
;
583 clk_prepare_enable(tv
->clk
);
585 drm_encoder_helper_add(&tv
->encoder
,
586 &sun4i_tv_helper_funcs
);
587 ret
= drm_simple_encoder_init(drm
, &tv
->encoder
,
588 DRM_MODE_ENCODER_TVDAC
);
590 dev_err(dev
, "Couldn't initialise the TV encoder\n");
591 goto err_disable_clk
;
594 tv
->encoder
.possible_crtcs
= drm_of_find_possible_crtcs(drm
,
596 if (!tv
->encoder
.possible_crtcs
) {
598 goto err_disable_clk
;
601 drm_connector_helper_add(&tv
->connector
,
602 &sun4i_tv_comp_connector_helper_funcs
);
603 ret
= drm_connector_init(drm
, &tv
->connector
,
604 &sun4i_tv_comp_connector_funcs
,
605 DRM_MODE_CONNECTOR_Composite
);
608 "Couldn't initialise the Composite connector\n");
609 goto err_cleanup_connector
;
611 tv
->connector
.interlace_allowed
= true;
613 drm_connector_attach_encoder(&tv
->connector
, &tv
->encoder
);
617 err_cleanup_connector
:
618 drm_encoder_cleanup(&tv
->encoder
);
620 clk_disable_unprepare(tv
->clk
);
622 reset_control_assert(tv
->reset
);
626 static void sun4i_tv_unbind(struct device
*dev
, struct device
*master
,
629 struct sun4i_tv
*tv
= dev_get_drvdata(dev
);
631 drm_connector_cleanup(&tv
->connector
);
632 drm_encoder_cleanup(&tv
->encoder
);
633 clk_disable_unprepare(tv
->clk
);
636 static const struct component_ops sun4i_tv_ops
= {
637 .bind
= sun4i_tv_bind
,
638 .unbind
= sun4i_tv_unbind
,
641 static int sun4i_tv_probe(struct platform_device
*pdev
)
643 return component_add(&pdev
->dev
, &sun4i_tv_ops
);
646 static int sun4i_tv_remove(struct platform_device
*pdev
)
648 component_del(&pdev
->dev
, &sun4i_tv_ops
);
653 static const struct of_device_id sun4i_tv_of_table
[] = {
654 { .compatible
= "allwinner,sun4i-a10-tv-encoder" },
657 MODULE_DEVICE_TABLE(of
, sun4i_tv_of_table
);
659 static struct platform_driver sun4i_tv_platform_driver
= {
660 .probe
= sun4i_tv_probe
,
661 .remove
= sun4i_tv_remove
,
664 .of_match_table
= sun4i_tv_of_table
,
667 module_platform_driver(sun4i_tv_platform_driver
);
669 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
670 MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver");
671 MODULE_LICENSE("GPL");