WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / sun4i / sun8i_ui_scaler.h
blob1ef4bd6f27189ff719e2b4fb7f97c1b8a94c524d
1 /*
2 * Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
9 #ifndef _SUN8I_UI_SCALER_H_
10 #define _SUN8I_UI_SCALER_H_
12 #include "sun8i_mixer.h"
14 #define DE2_UI_SCALER_UNIT_SIZE 0x10000
15 #define DE3_UI_SCALER_UNIT_SIZE 0x08000
17 /* this two macros assumes 16 fractional bits which is standard in DRM */
18 #define SUN8I_UI_SCALER_SCALE_MIN 1
19 #define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1)
21 #define SUN8I_UI_SCALER_SCALE_FRAC 20
22 #define SUN8I_UI_SCALER_PHASE_FRAC 20
23 #define SUN8I_UI_SCALER_COEFF_COUNT 16
24 #define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
26 #define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0)
27 #define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40)
28 #define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80)
29 #define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88)
30 #define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c)
31 #define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90)
32 #define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98)
33 #define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index))
35 #define SUN8I_SCALER_GSU_CTRL_EN BIT(0)
36 #define SUN8I_SCALER_GSU_CTRL_COEFF_RDY BIT(4)
38 void sun8i_ui_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
39 void sun8i_ui_scaler_setup(struct sun8i_mixer *mixer, int layer,
40 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
41 u32 hscale, u32 vscale, u32 hphase, u32 vphase);
43 #endif