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WIP FPC-III support
[linux/fpc-iii.git] / drivers / media / platform / fsl-viu.c
blob1f1042d5c865d86fc4a485539c7cef6e0fb089ff
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * Freescale VIU video driver
6 *
7 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
8 * Porting to 2.6.35 by DENX Software Engineering,
9 * Anatolij Gustschin <agust@denx.de>
10 */
11
12 #include <linux/module.h>
13 #include <linux/clk.h>
14 #include <linux/kernel.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/slab.h>
23 #include <media/v4l2-common.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-ioctl.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-fh.h>
28 #include <media/v4l2-event.h>
29 #include <media/videobuf-dma-contig.h>
30
31 #define DRV_NAME "fsl_viu"
32 #define VIU_VERSION "0.5.1"
33
34 #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
35
36 #define VIU_VID_MEM_LIMIT 4 /* Video memory limit, in Mb */
37
38 /* I2C address of video decoder chip is 0x4A */
39 #define VIU_VIDEO_DECODER_ADDR 0x25
40
41 static int info_level;
42
43 #define dprintk(level, fmt, arg...) \
44 do { \
45 if (level <= info_level) \
46 printk(KERN_DEBUG "viu: " fmt , ## arg); \
47 } while (0)
48
49 /*
50 * Basic structures
51 */
52 struct viu_fmt {
53 u32 fourcc; /* v4l2 format id */
54 u32 pixelformat;
55 int depth;
56 };
57
58 static struct viu_fmt formats[] = {
59 {
60 .fourcc = V4L2_PIX_FMT_RGB565,
61 .pixelformat = V4L2_PIX_FMT_RGB565,
62 .depth = 16,
63 }, {
64 .fourcc = V4L2_PIX_FMT_RGB32,
65 .pixelformat = V4L2_PIX_FMT_RGB32,
66 .depth = 32,
67 }
68 };
69
70 struct viu_dev;
71 struct viu_buf;
72
73 /* buffer for one video frame */
74 struct viu_buf {
75 /* common v4l buffer stuff -- must be first */
76 struct videobuf_buffer vb;
77 struct viu_fmt *fmt;
78 };
79
80 struct viu_dmaqueue {
81 struct viu_dev *dev;
82 struct list_head active;
83 struct list_head queued;
84 struct timer_list timeout;
85 };
86
87 struct viu_status {
88 u32 field_irq;
89 u32 vsync_irq;
90 u32 hsync_irq;
91 u32 vstart_irq;
92 u32 dma_end_irq;
93 u32 error_irq;
94 };
95
96 struct viu_reg {
97 u32 status_cfg;
98 u32 luminance;
99 u32 chroma_r;
100 u32 chroma_g;
101 u32 chroma_b;
102 u32 field_base_addr;
103 u32 dma_inc;
104 u32 picture_count;
105 u32 req_alarm;
106 u32 alpha;
107 } __attribute__ ((packed));
108
109 struct viu_dev {
110 struct v4l2_device v4l2_dev;
111 struct v4l2_ctrl_handler hdl;
112 struct mutex lock;
113 spinlock_t slock;
114 int users;
115
116 struct device *dev;
117 /* various device info */
118 struct video_device *vdev;
119 struct viu_dmaqueue vidq;
120 enum v4l2_field capfield;
121 int field;
122 int first;
123 int dma_done;
124
125 /* Hardware register area */
126 struct viu_reg __iomem *vr;
127
128 /* Interrupt vector */
129 int irq;
130 struct viu_status irqs;
131
132 /* video overlay */
133 struct v4l2_framebuffer ovbuf;
134 struct viu_fmt *ovfmt;
135 unsigned int ovenable;
136 enum v4l2_field ovfield;
137
138 /* crop */
139 struct v4l2_rect crop_current;
140
141 /* clock pointer */
142 struct clk *clk;
143
144 /* decoder */
145 struct v4l2_subdev *decoder;
146
147 v4l2_std_id std;
148 };
149
150 struct viu_fh {
151 /* must remain the first field of this struct */
152 struct v4l2_fh fh;
153 struct viu_dev *dev;
154
155 /* video capture */
156 struct videobuf_queue vb_vidq;
157 spinlock_t vbq_lock; /* spinlock for the videobuf queue */
158
159 /* video overlay */
160 struct v4l2_window win;
161 struct v4l2_clip clips[1];
162
163 /* video capture */
164 struct viu_fmt *fmt;
165 int width, height, sizeimage;
166 enum v4l2_buf_type type;
167 };
168
169 static struct viu_reg reg_val;
170
171 /*
172 * Macro definitions of VIU registers
173 */
174
175 /* STATUS_CONFIG register */
176 enum status_config {
177 SOFT_RST = 1 << 0,
178
179 ERR_MASK = 0x0f << 4, /* Error code mask */
180 ERR_NO = 0x00, /* No error */
181 ERR_DMA_V = 0x01 << 4, /* DMA in vertical active */
182 ERR_DMA_VB = 0x02 << 4, /* DMA in vertical blanking */
183 ERR_LINE_TOO_LONG = 0x04 << 4, /* Line too long */
184 ERR_TOO_MANG_LINES = 0x05 << 4, /* Too many lines in field */
185 ERR_LINE_TOO_SHORT = 0x06 << 4, /* Line too short */
186 ERR_NOT_ENOUGH_LINE = 0x07 << 4, /* Not enough lines in field */
187 ERR_FIFO_OVERFLOW = 0x08 << 4, /* FIFO overflow */
188 ERR_FIFO_UNDERFLOW = 0x09 << 4, /* FIFO underflow */
189 ERR_1bit_ECC = 0x0a << 4, /* One bit ECC error */
190 ERR_MORE_ECC = 0x0b << 4, /* Two/more bits ECC error */
191
192 INT_FIELD_EN = 0x01 << 8, /* Enable field interrupt */
193 INT_VSYNC_EN = 0x01 << 9, /* Enable vsync interrupt */
194 INT_HSYNC_EN = 0x01 << 10, /* Enable hsync interrupt */
195 INT_VSTART_EN = 0x01 << 11, /* Enable vstart interrupt */
196 INT_DMA_END_EN = 0x01 << 12, /* Enable DMA end interrupt */
197 INT_ERROR_EN = 0x01 << 13, /* Enable error interrupt */
198 INT_ECC_EN = 0x01 << 14, /* Enable ECC interrupt */
199
200 INT_FIELD_STATUS = 0x01 << 16, /* field interrupt status */
201 INT_VSYNC_STATUS = 0x01 << 17, /* vsync interrupt status */
202 INT_HSYNC_STATUS = 0x01 << 18, /* hsync interrupt status */
203 INT_VSTART_STATUS = 0x01 << 19, /* vstart interrupt status */
204 INT_DMA_END_STATUS = 0x01 << 20, /* DMA end interrupt status */
205 INT_ERROR_STATUS = 0x01 << 21, /* error interrupt status */
206
207 DMA_ACT = 0x01 << 27, /* Enable DMA transfer */
208 FIELD_NO = 0x01 << 28, /* Field number */
209 DITHER_ON = 0x01 << 29, /* Dithering is on */
210 ROUND_ON = 0x01 << 30, /* Round is on */
211 MODE_32BIT = 1UL << 31, /* Data in RGBa888,
212 * 0 in RGB565
213 */
214 };
215
216 #define norm_maxw() 720
217 #define norm_maxh() 576
218
219 #define INT_ALL_STATUS (INT_FIELD_STATUS | INT_VSYNC_STATUS | \
220 INT_HSYNC_STATUS | INT_VSTART_STATUS | \
221 INT_DMA_END_STATUS | INT_ERROR_STATUS)
222
223 #define NUM_FORMATS ARRAY_SIZE(formats)
224
225 static irqreturn_t viu_intr(int irq, void *dev_id);
226
227 static struct viu_fmt *format_by_fourcc(int fourcc)
228 {
229 int i;
230
231 for (i = 0; i < NUM_FORMATS; i++) {
232 if (formats[i].pixelformat == fourcc)
233 return formats + i;
234 }
235
236 dprintk(0, "unknown pixelformat:'%4.4s'\n", (char *)&fourcc);
237 return NULL;
238 }
239
240 static void viu_start_dma(struct viu_dev *dev)
241 {
242 struct viu_reg __iomem *vr = dev->vr;
243
244 dev->field = 0;
245
246 /* Enable DMA operation */
247 iowrite32be(SOFT_RST, &vr->status_cfg);
248 iowrite32be(INT_FIELD_EN, &vr->status_cfg);
249 }
250
251 static void viu_stop_dma(struct viu_dev *dev)
252 {
253 struct viu_reg __iomem *vr = dev->vr;
254 int cnt = 100;
255 u32 status_cfg;
256
257 iowrite32be(0, &vr->status_cfg);
258
259 /* Clear pending interrupts */
260 status_cfg = ioread32be(&vr->status_cfg);
261 if (status_cfg & 0x3f0000)
262 iowrite32be(status_cfg & 0x3f0000, &vr->status_cfg);
263
264 if (status_cfg & DMA_ACT) {
265 do {
266 status_cfg = ioread32be(&vr->status_cfg);
267 if (status_cfg & INT_DMA_END_STATUS)
268 break;
269 } while (cnt--);
270
271 if (cnt < 0) {
272 /* timed out, issue soft reset */
273 iowrite32be(SOFT_RST, &vr->status_cfg);
274 iowrite32be(0, &vr->status_cfg);
275 } else {
276 /* clear DMA_END and other pending irqs */
277 iowrite32be(status_cfg & 0x3f0000, &vr->status_cfg);
278 }
279 }
280
281 dev->field = 0;
282 }
283
284 static int restart_video_queue(struct viu_dmaqueue *vidq)
285 {
286 struct viu_buf *buf, *prev;
287
288 dprintk(1, "%s vidq=%p\n", __func__, vidq);
289 if (!list_empty(&vidq->active)) {
290 buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
291 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
292 buf, buf->vb.i);
293
294 viu_stop_dma(vidq->dev);
295
296 /* cancel all outstanding capture requests */
297 list_for_each_entry_safe(buf, prev, &vidq->active, vb.queue) {
298 list_del(&buf->vb.queue);
299 buf->vb.state = VIDEOBUF_ERROR;
300 wake_up(&buf->vb.done);
301 }
302 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
303 return 0;
304 }
305
306 prev = NULL;
307 for (;;) {
308 if (list_empty(&vidq->queued))
309 return 0;
310 buf = list_entry(vidq->queued.next, struct viu_buf, vb.queue);
311 if (prev == NULL) {
312 list_move_tail(&buf->vb.queue, &vidq->active);
313
314 dprintk(1, "Restarting video dma\n");
315 viu_stop_dma(vidq->dev);
316 viu_start_dma(vidq->dev);
317
318 buf->vb.state = VIDEOBUF_ACTIVE;
319 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
320 dprintk(2, "[%p/%d] restart_queue - first active\n",
321 buf, buf->vb.i);
322
323 } else if (prev->vb.width == buf->vb.width &&
324 prev->vb.height == buf->vb.height &&
325 prev->fmt == buf->fmt) {
326 list_move_tail(&buf->vb.queue, &vidq->active);
327 buf->vb.state = VIDEOBUF_ACTIVE;
328 dprintk(2, "[%p/%d] restart_queue - move to active\n",
329 buf, buf->vb.i);
330 } else {
331 return 0;
332 }
333 prev = buf;
334 }
335 }
336
337 static void viu_vid_timeout(struct timer_list *t)
338 {
339 struct viu_dev *dev = from_timer(dev, t, vidq.timeout);
340 struct viu_buf *buf;
341 struct viu_dmaqueue *vidq = &dev->vidq;
342
343 while (!list_empty(&vidq->active)) {
344 buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
345 list_del(&buf->vb.queue);
346 buf->vb.state = VIDEOBUF_ERROR;
347 wake_up(&buf->vb.done);
348 dprintk(1, "viu/0: [%p/%d] timeout\n", buf, buf->vb.i);
349 }
350
351 restart_video_queue(vidq);
352 }
353
354 /*
355 * Videobuf operations
356 */
357 static int buffer_setup(struct videobuf_queue *vq, unsigned int *count,
358 unsigned int *size)
359 {
360 struct viu_fh *fh = vq->priv_data;
361
362 *size = fh->width * fh->height * fh->fmt->depth >> 3;
363 if (*count == 0)
364 *count = 32;
365
366 while (*size * *count > VIU_VID_MEM_LIMIT * 1024 * 1024)
367 (*count)--;
368
369 dprintk(1, "%s, count=%d, size=%d\n", __func__, *count, *size);
370 return 0;
371 }
372
373 static void free_buffer(struct videobuf_queue *vq, struct viu_buf *buf)
374 {
375 struct videobuf_buffer *vb = &buf->vb;
376 void *vaddr = NULL;
377
378 videobuf_waiton(vq, &buf->vb, 0, 0);
379
380 if (vq->int_ops && vq->int_ops->vaddr)
381 vaddr = vq->int_ops->vaddr(vb);
382
383 if (vaddr)
384 videobuf_dma_contig_free(vq, &buf->vb);
385
386 buf->vb.state = VIDEOBUF_NEEDS_INIT;
387 }
388
389 inline int buffer_activate(struct viu_dev *dev, struct viu_buf *buf)
390 {
391 struct viu_reg __iomem *vr = dev->vr;
392 int bpp;
393
394 /* setup the DMA base address */
395 reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb);
396
397 dprintk(1, "buffer_activate [%p/%d]: dma addr 0x%lx\n",
398 buf, buf->vb.i, (unsigned long)reg_val.field_base_addr);
399
400 /* interlace is on by default, set horizontal DMA increment */
401 reg_val.status_cfg = 0;
402 bpp = buf->fmt->depth >> 3;
403 switch (bpp) {
404 case 2:
405 reg_val.status_cfg &= ~MODE_32BIT;
406 reg_val.dma_inc = buf->vb.width * 2;
407 break;
408 case 4:
409 reg_val.status_cfg |= MODE_32BIT;
410 reg_val.dma_inc = buf->vb.width * 4;
411 break;
412 default:
413 dprintk(0, "doesn't support color depth(%d)\n",
414 bpp * 8);
415 return -EINVAL;
416 }
417
418 /* setup picture_count register */
419 reg_val.picture_count = (buf->vb.height / 2) << 16 |
420 buf->vb.width;
421
422 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
423
424 buf->vb.state = VIDEOBUF_ACTIVE;
425 dev->capfield = buf->vb.field;
426
427 /* reset dma increment if needed */
428 if (!V4L2_FIELD_HAS_BOTH(buf->vb.field))
429 reg_val.dma_inc = 0;
430
431 iowrite32be(reg_val.dma_inc, &vr->dma_inc);
432 iowrite32be(reg_val.picture_count, &vr->picture_count);
433 iowrite32be(reg_val.field_base_addr, &vr->field_base_addr);
434 mod_timer(&dev->vidq.timeout, jiffies + BUFFER_TIMEOUT);
435 return 0;
436 }
437
438 static int buffer_prepare(struct videobuf_queue *vq,
439 struct videobuf_buffer *vb,
440 enum v4l2_field field)
441 {
442 struct viu_fh *fh = vq->priv_data;
443 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
444 int rc;
445
446 BUG_ON(fh->fmt == NULL);
447
448 if (fh->width < 48 || fh->width > norm_maxw() ||
449 fh->height < 32 || fh->height > norm_maxh())
450 return -EINVAL;
451 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
452 if (buf->vb.baddr != 0 && buf->vb.bsize < buf->vb.size)
453 return -EINVAL;
454
455 if (buf->fmt != fh->fmt ||
456 buf->vb.width != fh->width ||
457 buf->vb.height != fh->height ||
458 buf->vb.field != field) {
459 buf->fmt = fh->fmt;
460 buf->vb.width = fh->width;
461 buf->vb.height = fh->height;
462 buf->vb.field = field;
463 }
464
465 if (buf->vb.state == VIDEOBUF_NEEDS_INIT) {
466 rc = videobuf_iolock(vq, &buf->vb, NULL);
467 if (rc != 0)
468 goto fail;
469
470 buf->vb.width = fh->width;
471 buf->vb.height = fh->height;
472 buf->vb.field = field;
473 buf->fmt = fh->fmt;
474 }
475
476 buf->vb.state = VIDEOBUF_PREPARED;
477 return 0;
478
479 fail:
480 free_buffer(vq, buf);
481 return rc;
482 }
483
484 static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
485 {
486 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
487 struct viu_fh *fh = vq->priv_data;
488 struct viu_dev *dev = fh->dev;
489 struct viu_dmaqueue *vidq = &dev->vidq;
490 struct viu_buf *prev;
491
492 if (!list_empty(&vidq->queued)) {
493 dprintk(1, "adding vb queue=%p\n", &buf->vb.queue);
494 dprintk(1, "vidq pointer 0x%p, queued 0x%p\n",
495 vidq, &vidq->queued);
496 dprintk(1, "dev %p, queued: self %p, next %p, head %p\n",
497 dev, &vidq->queued, vidq->queued.next,
498 vidq->queued.prev);
499 list_add_tail(&buf->vb.queue, &vidq->queued);
500 buf->vb.state = VIDEOBUF_QUEUED;
501 dprintk(2, "[%p/%d] buffer_queue - append to queued\n",
502 buf, buf->vb.i);
503 } else if (list_empty(&vidq->active)) {
504 dprintk(1, "adding vb active=%p\n", &buf->vb.queue);
505 list_add_tail(&buf->vb.queue, &vidq->active);
506 buf->vb.state = VIDEOBUF_ACTIVE;
507 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
508 dprintk(2, "[%p/%d] buffer_queue - first active\n",
509 buf, buf->vb.i);
510
511 buffer_activate(dev, buf);
512 } else {
513 dprintk(1, "adding vb queue2=%p\n", &buf->vb.queue);
514 prev = list_entry(vidq->active.prev, struct viu_buf, vb.queue);
515 if (prev->vb.width == buf->vb.width &&
516 prev->vb.height == buf->vb.height &&
517 prev->fmt == buf->fmt) {
518 list_add_tail(&buf->vb.queue, &vidq->active);
519 buf->vb.state = VIDEOBUF_ACTIVE;
520 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
521 buf, buf->vb.i);
522 } else {
523 list_add_tail(&buf->vb.queue, &vidq->queued);
524 buf->vb.state = VIDEOBUF_QUEUED;
525 dprintk(2, "[%p/%d] buffer_queue - first queued\n",
526 buf, buf->vb.i);
527 }
528 }
529 }
530
531 static void buffer_release(struct videobuf_queue *vq,
532 struct videobuf_buffer *vb)
533 {
534 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
535 struct viu_fh *fh = vq->priv_data;
536 struct viu_dev *dev = (struct viu_dev *)fh->dev;
537
538 viu_stop_dma(dev);
539 free_buffer(vq, buf);
540 }
541
542 static const struct videobuf_queue_ops viu_video_qops = {
543 .buf_setup = buffer_setup,
544 .buf_prepare = buffer_prepare,
545 .buf_queue = buffer_queue,
546 .buf_release = buffer_release,
547 };
548
549 /*
550 * IOCTL vidioc handling
551 */
552 static int vidioc_querycap(struct file *file, void *priv,
553 struct v4l2_capability *cap)
554 {
555 strscpy(cap->driver, "viu", sizeof(cap->driver));
556 strscpy(cap->card, "viu", sizeof(cap->card));
557 strscpy(cap->bus_info, "platform:viu", sizeof(cap->bus_info));
558 return 0;
559 }
560
561 static int vidioc_enum_fmt(struct file *file, void *priv,
562 struct v4l2_fmtdesc *f)
563 {
564 int index = f->index;
565
566 if (f->index >= NUM_FORMATS)
567 return -EINVAL;
568
569 f->pixelformat = formats[index].fourcc;
570 return 0;
571 }
572
573 static int vidioc_g_fmt_cap(struct file *file, void *priv,
574 struct v4l2_format *f)
575 {
576 struct viu_fh *fh = priv;
577
578 f->fmt.pix.width = fh->width;
579 f->fmt.pix.height = fh->height;
580 f->fmt.pix.field = fh->vb_vidq.field;
581 f->fmt.pix.pixelformat = fh->fmt->pixelformat;
582 f->fmt.pix.bytesperline =
583 (f->fmt.pix.width * fh->fmt->depth) >> 3;
584 f->fmt.pix.sizeimage = fh->sizeimage;
585 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
586 return 0;
587 }
588
589 static int vidioc_try_fmt_cap(struct file *file, void *priv,
590 struct v4l2_format *f)
591 {
592 struct viu_fmt *fmt;
593 unsigned int maxw, maxh;
594
595 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
596 if (!fmt) {
597 dprintk(1, "Fourcc format (0x%08x) invalid.",
598 f->fmt.pix.pixelformat);
599 return -EINVAL;
600 }
601
602 maxw = norm_maxw();
603 maxh = norm_maxh();
604
605 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
606 if (f->fmt.pix.height < 32)
607 f->fmt.pix.height = 32;
608 if (f->fmt.pix.height > maxh)
609 f->fmt.pix.height = maxh;
610 if (f->fmt.pix.width < 48)
611 f->fmt.pix.width = 48;
612 if (f->fmt.pix.width > maxw)
613 f->fmt.pix.width = maxw;
614 f->fmt.pix.width &= ~0x03;
615 f->fmt.pix.bytesperline =
616 (f->fmt.pix.width * fmt->depth) >> 3;
617 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
618 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
619
620 return 0;
621 }
622
623 static int vidioc_s_fmt_cap(struct file *file, void *priv,
624 struct v4l2_format *f)
625 {
626 struct viu_fh *fh = priv;
627 int ret;
628
629 ret = vidioc_try_fmt_cap(file, fh, f);
630 if (ret < 0)
631 return ret;
632
633 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
634 fh->width = f->fmt.pix.width;
635 fh->height = f->fmt.pix.height;
636 fh->sizeimage = f->fmt.pix.sizeimage;
637 fh->vb_vidq.field = f->fmt.pix.field;
638 fh->type = f->type;
639 return 0;
640 }
641
642 static int vidioc_g_fmt_overlay(struct file *file, void *priv,
643 struct v4l2_format *f)
644 {
645 struct viu_fh *fh = priv;
646
647 f->fmt.win = fh->win;
648 return 0;
649 }
650
651 static int verify_preview(struct viu_dev *dev, struct v4l2_window *win)
652 {
653 enum v4l2_field field;
654 int maxw, maxh;
655
656 if (dev->ovbuf.base == NULL)
657 return -EINVAL;
658 if (dev->ovfmt == NULL)
659 return -EINVAL;
660 if (win->w.width < 48 || win->w.height < 32)
661 return -EINVAL;
662
663 field = win->field;
664 maxw = dev->crop_current.width;
665 maxh = dev->crop_current.height;
666
667 if (field == V4L2_FIELD_ANY) {
668 field = (win->w.height > maxh/2)
669 ? V4L2_FIELD_INTERLACED
670 : V4L2_FIELD_TOP;
671 }
672 switch (field) {
673 case V4L2_FIELD_TOP:
674 case V4L2_FIELD_BOTTOM:
675 maxh = maxh / 2;
676 break;
677 case V4L2_FIELD_INTERLACED:
678 break;
679 default:
680 return -EINVAL;
681 }
682
683 win->field = field;
684 if (win->w.width > maxw)
685 win->w.width = maxw;
686 if (win->w.height > maxh)
687 win->w.height = maxh;
688 return 0;
689 }
690
691 inline void viu_activate_overlay(struct viu_reg __iomem *vr)
692 {
693 iowrite32be(reg_val.field_base_addr, &vr->field_base_addr);
694 iowrite32be(reg_val.dma_inc, &vr->dma_inc);
695 iowrite32be(reg_val.picture_count, &vr->picture_count);
696 }
697
698 static int viu_setup_preview(struct viu_dev *dev, struct viu_fh *fh)
699 {
700 int bpp;
701
702 dprintk(1, "%s %dx%d\n", __func__,
703 fh->win.w.width, fh->win.w.height);
704
705 reg_val.status_cfg = 0;
706
707 /* setup window */
708 reg_val.picture_count = (fh->win.w.height / 2) << 16 |
709 fh->win.w.width;
710
711 /* setup color depth and dma increment */
712 bpp = dev->ovfmt->depth / 8;
713 switch (bpp) {
714 case 2:
715 reg_val.status_cfg &= ~MODE_32BIT;
716 reg_val.dma_inc = fh->win.w.width * 2;
717 break;
718 case 4:
719 reg_val.status_cfg |= MODE_32BIT;
720 reg_val.dma_inc = fh->win.w.width * 4;
721 break;
722 default:
723 dprintk(0, "device doesn't support color depth(%d)\n",
724 bpp * 8);
725 return -EINVAL;
726 }
727
728 dev->ovfield = fh->win.field;
729 if (!V4L2_FIELD_HAS_BOTH(dev->ovfield))
730 reg_val.dma_inc = 0;
731
732 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
733
734 /* setup the base address of the overlay buffer */
735 reg_val.field_base_addr = (u32)(long)dev->ovbuf.base;
736
737 return 0;
738 }
739
740 static int vidioc_s_fmt_overlay(struct file *file, void *priv,
741 struct v4l2_format *f)
742 {
743 struct viu_fh *fh = priv;
744 struct viu_dev *dev = (struct viu_dev *)fh->dev;
745 unsigned long flags;
746 int err;
747
748 err = verify_preview(dev, &f->fmt.win);
749 if (err)
750 return err;
751
752 fh->win = f->fmt.win;
753
754 spin_lock_irqsave(&dev->slock, flags);
755 viu_setup_preview(dev, fh);
756 spin_unlock_irqrestore(&dev->slock, flags);
757 return 0;
758 }
759
760 static int vidioc_try_fmt_overlay(struct file *file, void *priv,
761 struct v4l2_format *f)
762 {
763 return 0;
764 }
765
766 static int vidioc_overlay(struct file *file, void *priv, unsigned int on)
767 {
768 struct viu_fh *fh = priv;
769 struct viu_dev *dev = (struct viu_dev *)fh->dev;
770 unsigned long flags;
771
772 if (on) {
773 spin_lock_irqsave(&dev->slock, flags);
774 viu_activate_overlay(dev->vr);
775 dev->ovenable = 1;
776
777 /* start dma */
778 viu_start_dma(dev);
779 spin_unlock_irqrestore(&dev->slock, flags);
780 } else {
781 viu_stop_dma(dev);
782 dev->ovenable = 0;
783 }
784
785 return 0;
786 }
787
788 static int vidioc_g_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg)
789 {
790 struct viu_fh *fh = priv;
791 struct viu_dev *dev = fh->dev;
792 struct v4l2_framebuffer *fb = arg;
793
794 *fb = dev->ovbuf;
795 fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING;
796 return 0;
797 }
798
799 static int vidioc_s_fbuf(struct file *file, void *priv, const struct v4l2_framebuffer *arg)
800 {
801 struct viu_fh *fh = priv;
802 struct viu_dev *dev = fh->dev;
803 const struct v4l2_framebuffer *fb = arg;
804 struct viu_fmt *fmt;
805
806 if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO))
807 return -EPERM;
808
809 /* check args */
810 fmt = format_by_fourcc(fb->fmt.pixelformat);
811 if (fmt == NULL)
812 return -EINVAL;
813
814 /* ok, accept it */
815 dev->ovbuf = *fb;
816 dev->ovfmt = fmt;
817 if (dev->ovbuf.fmt.bytesperline == 0) {
818 dev->ovbuf.fmt.bytesperline =
819 dev->ovbuf.fmt.width * fmt->depth / 8;
820 }
821 return 0;
822 }
823
824 static int vidioc_reqbufs(struct file *file, void *priv,
825 struct v4l2_requestbuffers *p)
826 {
827 struct viu_fh *fh = priv;
828
829 return videobuf_reqbufs(&fh->vb_vidq, p);
830 }
831
832 static int vidioc_querybuf(struct file *file, void *priv,
833 struct v4l2_buffer *p)
834 {
835 struct viu_fh *fh = priv;
836
837 return videobuf_querybuf(&fh->vb_vidq, p);
838 }
839
840 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p)
841 {
842 struct viu_fh *fh = priv;
843
844 return videobuf_qbuf(&fh->vb_vidq, p);
845 }
846
847 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p)
848 {
849 struct viu_fh *fh = priv;
850
851 return videobuf_dqbuf(&fh->vb_vidq, p,
852 file->f_flags & O_NONBLOCK);
853 }
854
855 static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
856 {
857 struct viu_fh *fh = priv;
858 struct viu_dev *dev = fh->dev;
859
860 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
861 return -EINVAL;
862 if (fh->type != i)
863 return -EINVAL;
864
865 if (dev->ovenable)
866 dev->ovenable = 0;
867
868 viu_start_dma(fh->dev);
869
870 return videobuf_streamon(&fh->vb_vidq);
871 }
872
873 static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
874 {
875 struct viu_fh *fh = priv;
876
877 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
878 return -EINVAL;
879 if (fh->type != i)
880 return -EINVAL;
881
882 viu_stop_dma(fh->dev);
883
884 return videobuf_streamoff(&fh->vb_vidq);
885 }
886
887 #define decoder_call(viu, o, f, args...) \
888 v4l2_subdev_call(viu->decoder, o, f, ##args)
889
890 static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
891 {
892 struct viu_fh *fh = priv;
893
894 decoder_call(fh->dev, video, querystd, std_id);
895 return 0;
896 }
897
898 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id)
899 {
900 struct viu_fh *fh = priv;
901
902 fh->dev->std = id;
903 decoder_call(fh->dev, video, s_std, id);
904 return 0;
905 }
906
907 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
908 {
909 struct viu_fh *fh = priv;
910
911 *std_id = fh->dev->std;
912 return 0;
913 }
914
915 /* only one input in this driver */
916 static int vidioc_enum_input(struct file *file, void *priv,
917 struct v4l2_input *inp)
918 {
919 struct viu_fh *fh = priv;
920
921 if (inp->index != 0)
922 return -EINVAL;
923
924 inp->type = V4L2_INPUT_TYPE_CAMERA;
925 inp->std = fh->dev->vdev->tvnorms;
926 strscpy(inp->name, "Camera", sizeof(inp->name));
927 return 0;
928 }
929
930 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
931 {
932 *i = 0;
933 return 0;
934 }
935
936 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
937 {
938 struct viu_fh *fh = priv;
939
940 if (i)
941 return -EINVAL;
942
943 decoder_call(fh->dev, video, s_routing, i, 0, 0);
944 return 0;
945 }
946
947 inline void viu_activate_next_buf(struct viu_dev *dev,
948 struct viu_dmaqueue *viuq)
949 {
950 struct viu_dmaqueue *vidq = viuq;
951 struct viu_buf *buf;
952
953 /* launch another DMA operation for an active/queued buffer */
954 if (!list_empty(&vidq->active)) {
955 buf = list_entry(vidq->active.next, struct viu_buf,
956 vb.queue);
957 dprintk(1, "start another queued buffer: 0x%p\n", buf);
958 buffer_activate(dev, buf);
959 } else if (!list_empty(&vidq->queued)) {
960 buf = list_entry(vidq->queued.next, struct viu_buf,
961 vb.queue);
962 list_del(&buf->vb.queue);
963
964 dprintk(1, "start another queued buffer: 0x%p\n", buf);
965 list_add_tail(&buf->vb.queue, &vidq->active);
966 buf->vb.state = VIDEOBUF_ACTIVE;
967 buffer_activate(dev, buf);
968 }
969 }
970
971 inline void viu_default_settings(struct viu_reg __iomem *vr)
972 {
973 iowrite32be(0x9512A254, &vr->luminance);
974 iowrite32be(0x03310000, &vr->chroma_r);
975 iowrite32be(0x06600F38, &vr->chroma_g);
976 iowrite32be(0x00000409, &vr->chroma_b);
977 iowrite32be(0x000000ff, &vr->alpha);
978 iowrite32be(0x00000090, &vr->req_alarm);
979 dprintk(1, "status reg: 0x%08x, field base: 0x%08x\n",
980 ioread32be(&vr->status_cfg), ioread32be(&vr->field_base_addr));
981 }
982
983 static void viu_overlay_intr(struct viu_dev *dev, u32 status)
984 {
985 struct viu_reg __iomem *vr = dev->vr;
986
987 if (status & INT_DMA_END_STATUS)
988 dev->dma_done = 1;
989
990 if (status & INT_FIELD_STATUS) {
991 if (dev->dma_done) {
992 u32 addr = reg_val.field_base_addr;
993
994 dev->dma_done = 0;
995 if (status & FIELD_NO)
996 addr += reg_val.dma_inc;
997
998 iowrite32be(addr, &vr->field_base_addr);
999 iowrite32be(reg_val.dma_inc, &vr->dma_inc);
1000 iowrite32be((status & 0xffc0ffff) |
1001 (status & INT_ALL_STATUS) |
1002 reg_val.status_cfg, &vr->status_cfg);
1003 } else if (status & INT_VSYNC_STATUS) {
1004 iowrite32be((status & 0xffc0ffff) |
1005 (status & INT_ALL_STATUS) |
1006 reg_val.status_cfg, &vr->status_cfg);
1007 }
1008 }
1009 }
1010
1011 static void viu_capture_intr(struct viu_dev *dev, u32 status)
1012 {
1013 struct viu_dmaqueue *vidq = &dev->vidq;
1014 struct viu_reg __iomem *vr = dev->vr;
1015 struct viu_buf *buf;
1016 int field_num;
1017 int need_two;
1018 int dma_done = 0;
1019
1020 field_num = status & FIELD_NO;
1021 need_two = V4L2_FIELD_HAS_BOTH(dev->capfield);
1022
1023 if (status & INT_DMA_END_STATUS) {
1024 dma_done = 1;
1025 if (((field_num == 0) && (dev->field == 0)) ||
1026 (field_num && (dev->field == 1)))
1027 dev->field++;
1028 }
1029
1030 if (status & INT_FIELD_STATUS) {
1031 dprintk(1, "irq: field %d, done %d\n",
1032 !!field_num, dma_done);
1033 if (unlikely(dev->first)) {
1034 if (field_num == 0) {
1035 dev->first = 0;
1036 dprintk(1, "activate first buf\n");
1037 viu_activate_next_buf(dev, vidq);
1038 } else
1039 dprintk(1, "wait field 0\n");
1040 return;
1041 }
1042
1043 /* setup buffer address for next dma operation */
1044 if (!list_empty(&vidq->active)) {
1045 u32 addr = reg_val.field_base_addr;
1046
1047 if (field_num && need_two) {
1048 addr += reg_val.dma_inc;
1049 dprintk(1, "field 1, 0x%lx, dev field %d\n",
1050 (unsigned long)addr, dev->field);
1051 }
1052 iowrite32be(addr, &vr->field_base_addr);
1053 iowrite32be(reg_val.dma_inc, &vr->dma_inc);
1054 iowrite32be((status & 0xffc0ffff) |
1055 (status & INT_ALL_STATUS) |
1056 reg_val.status_cfg, &vr->status_cfg);
1057 return;
1058 }
1059 }
1060
1061 if (dma_done && field_num && (dev->field == 2)) {
1062 dev->field = 0;
1063 buf = list_entry(vidq->active.next,
1064 struct viu_buf, vb.queue);
1065 dprintk(1, "viu/0: [%p/%d] 0x%lx/0x%lx: dma complete\n",
1066 buf, buf->vb.i,
1067 (unsigned long)videobuf_to_dma_contig(&buf->vb),
1068 (unsigned long)ioread32be(&vr->field_base_addr));
1069
1070 if (waitqueue_active(&buf->vb.done)) {
1071 list_del(&buf->vb.queue);
1072 buf->vb.ts = ktime_get_ns();
1073 buf->vb.state = VIDEOBUF_DONE;
1074 buf->vb.field_count++;
1075 wake_up(&buf->vb.done);
1076 }
1077 /* activate next dma buffer */
1078 viu_activate_next_buf(dev, vidq);
1079 }
1080 }
1081
1082 static irqreturn_t viu_intr(int irq, void *dev_id)
1083 {
1084 struct viu_dev *dev = (struct viu_dev *)dev_id;
1085 struct viu_reg __iomem *vr = dev->vr;
1086 u32 status;
1087 u32 error;
1088
1089 status = ioread32be(&vr->status_cfg);
1090
1091 if (status & INT_ERROR_STATUS) {
1092 dev->irqs.error_irq++;
1093 error = status & ERR_MASK;
1094 if (error)
1095 dprintk(1, "Err: error(%d), times:%d!\n",
1096 error >> 4, dev->irqs.error_irq);
1097 /* Clear interrupt error bit and error flags */
1098 iowrite32be((status & 0xffc0ffff) | INT_ERROR_STATUS,
1099 &vr->status_cfg);
1100 }
1101
1102 if (status & INT_DMA_END_STATUS) {
1103 dev->irqs.dma_end_irq++;
1104 dev->dma_done = 1;
1105 dprintk(2, "VIU DMA end interrupt times: %d\n",
1106 dev->irqs.dma_end_irq);
1107 }
1108
1109 if (status & INT_HSYNC_STATUS)
1110 dev->irqs.hsync_irq++;
1111
1112 if (status & INT_FIELD_STATUS) {
1113 dev->irqs.field_irq++;
1114 dprintk(2, "VIU field interrupt times: %d\n",
1115 dev->irqs.field_irq);
1116 }
1117
1118 if (status & INT_VSTART_STATUS)
1119 dev->irqs.vstart_irq++;
1120
1121 if (status & INT_VSYNC_STATUS) {
1122 dev->irqs.vsync_irq++;
1123 dprintk(2, "VIU vsync interrupt times: %d\n",
1124 dev->irqs.vsync_irq);
1125 }
1126
1127 /* clear all pending irqs */
1128 status = ioread32be(&vr->status_cfg);
1129 iowrite32be((status & 0xffc0ffff) | (status & INT_ALL_STATUS),
1130 &vr->status_cfg);
1131
1132 if (dev->ovenable) {
1133 viu_overlay_intr(dev, status);
1134 return IRQ_HANDLED;
1135 }
1136
1137 /* Capture mode */
1138 viu_capture_intr(dev, status);
1139 return IRQ_HANDLED;
1140 }
1141
1142 /*
1143 * File operations for the device
1144 */
1145 static int viu_open(struct file *file)
1146 {
1147 struct video_device *vdev = video_devdata(file);
1148 struct viu_dev *dev = video_get_drvdata(vdev);
1149 struct viu_fh *fh;
1150 struct viu_reg __iomem *vr;
1151 int minor = vdev->minor;
1152 u32 status_cfg;
1153
1154 dprintk(1, "viu: open (minor=%d)\n", minor);
1155
1156 dev->users++;
1157 if (dev->users > 1) {
1158 dev->users--;
1159 return -EBUSY;
1160 }
1161
1162 vr = dev->vr;
1163
1164 dprintk(1, "open minor=%d type=%s users=%d\n", minor,
1165 v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users);
1166
1167 if (mutex_lock_interruptible(&dev->lock)) {
1168 dev->users--;
1169 return -ERESTARTSYS;
1170 }
1171
1172 /* allocate and initialize per filehandle data */
1173 fh = kzalloc(sizeof(*fh), GFP_KERNEL);
1174 if (!fh) {
1175 dev->users--;
1176 mutex_unlock(&dev->lock);
1177 return -ENOMEM;
1178 }
1179
1180 v4l2_fh_init(&fh->fh, vdev);
1181 file->private_data = fh;
1182 fh->dev = dev;
1183
1184 fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1185 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_RGB32);
1186 fh->width = norm_maxw();
1187 fh->height = norm_maxh();
1188 dev->crop_current.width = fh->width;
1189 dev->crop_current.height = fh->height;
1190
1191 dprintk(1, "Open: fh=%p, dev=%p, dev->vidq=%p\n", fh, dev, &dev->vidq);
1192 dprintk(1, "Open: list_empty queued=%d\n",
1193 list_empty(&dev->vidq.queued));
1194 dprintk(1, "Open: list_empty active=%d\n",
1195 list_empty(&dev->vidq.active));
1196
1197 viu_default_settings(vr);
1198
1199 status_cfg = ioread32be(&vr->status_cfg);
1200 iowrite32be(status_cfg & ~(INT_VSYNC_EN | INT_HSYNC_EN |
1201 INT_FIELD_EN | INT_VSTART_EN |
1202 INT_DMA_END_EN | INT_ERROR_EN | INT_ECC_EN),
1203 &vr->status_cfg);
1204
1205 status_cfg = ioread32be(&vr->status_cfg);
1206 iowrite32be(status_cfg | INT_ALL_STATUS, &vr->status_cfg);
1207
1208 spin_lock_init(&fh->vbq_lock);
1209 videobuf_queue_dma_contig_init(&fh->vb_vidq, &viu_video_qops,
1210 dev->dev, &fh->vbq_lock,
1211 fh->type, V4L2_FIELD_INTERLACED,
1212 sizeof(struct viu_buf), fh,
1213 &fh->dev->lock);
1214 v4l2_fh_add(&fh->fh);
1215 mutex_unlock(&dev->lock);
1216 return 0;
1217 }
1218
1219 static ssize_t viu_read(struct file *file, char __user *data, size_t count,
1220 loff_t *ppos)
1221 {
1222 struct viu_fh *fh = file->private_data;
1223 struct viu_dev *dev = fh->dev;
1224 int ret = 0;
1225
1226 dprintk(2, "%s\n", __func__);
1227 if (dev->ovenable)
1228 dev->ovenable = 0;
1229
1230 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
1231 if (mutex_lock_interruptible(&dev->lock))
1232 return -ERESTARTSYS;
1233 viu_start_dma(dev);
1234 ret = videobuf_read_stream(&fh->vb_vidq, data, count,
1235 ppos, 0, file->f_flags & O_NONBLOCK);
1236 mutex_unlock(&dev->lock);
1237 return ret;
1238 }
1239 return 0;
1240 }
1241
1242 static __poll_t viu_poll(struct file *file, struct poll_table_struct *wait)
1243 {
1244 struct viu_fh *fh = file->private_data;
1245 struct videobuf_queue *q = &fh->vb_vidq;
1246 struct viu_dev *dev = fh->dev;
1247 __poll_t req_events = poll_requested_events(wait);
1248 __poll_t res = v4l2_ctrl_poll(file, wait);
1249
1250 if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type)
1251 return EPOLLERR;
1252
1253 if (!(req_events & (EPOLLIN | EPOLLRDNORM)))
1254 return res;
1255
1256 mutex_lock(&dev->lock);
1257 res |= videobuf_poll_stream(file, q, wait);
1258 mutex_unlock(&dev->lock);
1259 return res;
1260 }
1261
1262 static int viu_release(struct file *file)
1263 {
1264 struct viu_fh *fh = file->private_data;
1265 struct viu_dev *dev = fh->dev;
1266 int minor = video_devdata(file)->minor;
1267
1268 mutex_lock(&dev->lock);
1269 viu_stop_dma(dev);
1270 videobuf_stop(&fh->vb_vidq);
1271 videobuf_mmap_free(&fh->vb_vidq);
1272 v4l2_fh_del(&fh->fh);
1273 v4l2_fh_exit(&fh->fh);
1274 mutex_unlock(&dev->lock);
1275
1276 kfree(fh);
1277
1278 dev->users--;
1279 dprintk(1, "close (minor=%d, users=%d)\n",
1280 minor, dev->users);
1281 return 0;
1282 }
1283
1284 static void viu_reset(struct viu_reg __iomem *reg)
1285 {
1286 iowrite32be(0, &reg->status_cfg);
1287 iowrite32be(0x9512a254, &reg->luminance);
1288 iowrite32be(0x03310000, &reg->chroma_r);
1289 iowrite32be(0x06600f38, &reg->chroma_g);
1290 iowrite32be(0x00000409, &reg->chroma_b);
1291 iowrite32be(0, &reg->field_base_addr);
1292 iowrite32be(0, &reg->dma_inc);
1293 iowrite32be(0x01e002d0, &reg->picture_count);
1294 iowrite32be(0x00000090, &reg->req_alarm);
1295 iowrite32be(0x000000ff, &reg->alpha);
1296 }
1297
1298 static int viu_mmap(struct file *file, struct vm_area_struct *vma)
1299 {
1300 struct viu_fh *fh = file->private_data;
1301 struct viu_dev *dev = fh->dev;
1302 int ret;
1303
1304 dprintk(1, "mmap called, vma=%p\n", vma);
1305
1306 if (mutex_lock_interruptible(&dev->lock))
1307 return -ERESTARTSYS;
1308 ret = videobuf_mmap_mapper(&fh->vb_vidq, vma);
1309 mutex_unlock(&dev->lock);
1310
1311 dprintk(1, "vma start=0x%08lx, size=%ld, ret=%d\n",
1312 (unsigned long)vma->vm_start,
1313 (unsigned long)vma->vm_end-(unsigned long)vma->vm_start,
1314 ret);
1315
1316 return ret;
1317 }
1318
1319 static const struct v4l2_file_operations viu_fops = {
1320 .owner = THIS_MODULE,
1321 .open = viu_open,
1322 .release = viu_release,
1323 .read = viu_read,
1324 .poll = viu_poll,
1325 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
1326 .mmap = viu_mmap,
1327 };
1328
1329 static const struct v4l2_ioctl_ops viu_ioctl_ops = {
1330 .vidioc_querycap = vidioc_querycap,
1331 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
1332 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_cap,
1333 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_cap,
1334 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_cap,
1335 .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt,
1336 .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_overlay,
1337 .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_overlay,
1338 .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_overlay,
1339 .vidioc_overlay = vidioc_overlay,
1340 .vidioc_g_fbuf = vidioc_g_fbuf,
1341 .vidioc_s_fbuf = vidioc_s_fbuf,
1342 .vidioc_reqbufs = vidioc_reqbufs,
1343 .vidioc_querybuf = vidioc_querybuf,
1344 .vidioc_qbuf = vidioc_qbuf,
1345 .vidioc_dqbuf = vidioc_dqbuf,
1346 .vidioc_g_std = vidioc_g_std,
1347 .vidioc_s_std = vidioc_s_std,
1348 .vidioc_querystd = vidioc_querystd,
1349 .vidioc_enum_input = vidioc_enum_input,
1350 .vidioc_g_input = vidioc_g_input,
1351 .vidioc_s_input = vidioc_s_input,
1352 .vidioc_streamon = vidioc_streamon,
1353 .vidioc_streamoff = vidioc_streamoff,
1354 .vidioc_log_status = v4l2_ctrl_log_status,
1355 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1356 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1357 };
1358
1359 static const struct video_device viu_template = {
1360 .name = "FSL viu",
1361 .fops = &viu_fops,
1362 .minor = -1,
1363 .ioctl_ops = &viu_ioctl_ops,
1364 .release = video_device_release,
1365
1366 .tvnorms = V4L2_STD_NTSC_M | V4L2_STD_PAL,
1367 .device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
1368 V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_READWRITE,
1369 };
1370
1371 static int viu_of_probe(struct platform_device *op)
1372 {
1373 struct viu_dev *viu_dev;
1374 struct video_device *vdev;
1375 struct resource r;
1376 struct viu_reg __iomem *viu_regs;
1377 struct i2c_adapter *ad;
1378 int ret, viu_irq;
1379 struct clk *clk;
1380
1381 ret = of_address_to_resource(op->dev.of_node, 0, &r);
1382 if (ret) {
1383 dev_err(&op->dev, "Can't parse device node resource\n");
1384 return -ENODEV;
1385 }
1386
1387 viu_irq = irq_of_parse_and_map(op->dev.of_node, 0);
1388 if (!viu_irq) {
1389 dev_err(&op->dev, "Error while mapping the irq\n");
1390 return -EINVAL;
1391 }
1392
1393 /* request mem region */
1394 if (!devm_request_mem_region(&op->dev, r.start,
1395 sizeof(struct viu_reg), DRV_NAME)) {
1396 dev_err(&op->dev, "Error while requesting mem region\n");
1397 ret = -EBUSY;
1398 goto err_irq;
1399 }
1400
1401 /* remap registers */
1402 viu_regs = devm_ioremap(&op->dev, r.start, sizeof(struct viu_reg));
1403 if (!viu_regs) {
1404 dev_err(&op->dev, "Can't map register set\n");
1405 ret = -ENOMEM;
1406 goto err_irq;
1407 }
1408
1409 /* Prepare our private structure */
1410 viu_dev = devm_kzalloc(&op->dev, sizeof(struct viu_dev), GFP_ATOMIC);
1411 if (!viu_dev) {
1412 dev_err(&op->dev, "Can't allocate private structure\n");
1413 ret = -ENOMEM;
1414 goto err_irq;
1415 }
1416
1417 viu_dev->vr = viu_regs;
1418 viu_dev->irq = viu_irq;
1419 viu_dev->dev = &op->dev;
1420
1421 /* init video dma queues */
1422 INIT_LIST_HEAD(&viu_dev->vidq.active);
1423 INIT_LIST_HEAD(&viu_dev->vidq.queued);
1424
1425 snprintf(viu_dev->v4l2_dev.name,
1426 sizeof(viu_dev->v4l2_dev.name), "%s", "VIU");
1427 ret = v4l2_device_register(viu_dev->dev, &viu_dev->v4l2_dev);
1428 if (ret < 0) {
1429 dev_err(&op->dev, "v4l2_device_register() failed: %d\n", ret);
1430 goto err_irq;
1431 }
1432
1433 ad = i2c_get_adapter(0);
1434 if (!ad) {
1435 ret = -EFAULT;
1436 dev_err(&op->dev, "couldn't get i2c adapter\n");
1437 goto err_v4l2;
1438 }
1439
1440 v4l2_ctrl_handler_init(&viu_dev->hdl, 5);
1441 if (viu_dev->hdl.error) {
1442 ret = viu_dev->hdl.error;
1443 dev_err(&op->dev, "couldn't register control\n");
1444 goto err_i2c;
1445 }
1446 /* This control handler will inherit the control(s) from the
1447 sub-device(s). */
1448 viu_dev->v4l2_dev.ctrl_handler = &viu_dev->hdl;
1449 viu_dev->decoder = v4l2_i2c_new_subdev(&viu_dev->v4l2_dev, ad,
1450 "saa7113", VIU_VIDEO_DECODER_ADDR, NULL);
1451
1452 timer_setup(&viu_dev->vidq.timeout, viu_vid_timeout, 0);
1453 viu_dev->std = V4L2_STD_NTSC_M;
1454 viu_dev->first = 1;
1455
1456 /* Allocate memory for video device */
1457 vdev = video_device_alloc();
1458 if (vdev == NULL) {
1459 ret = -ENOMEM;
1460 goto err_hdl;
1461 }
1462
1463 *vdev = viu_template;
1464
1465 vdev->v4l2_dev = &viu_dev->v4l2_dev;
1466
1467 viu_dev->vdev = vdev;
1468
1469 /* initialize locks */
1470 mutex_init(&viu_dev->lock);
1471 viu_dev->vdev->lock = &viu_dev->lock;
1472 spin_lock_init(&viu_dev->slock);
1473
1474 video_set_drvdata(viu_dev->vdev, viu_dev);
1475
1476 mutex_lock(&viu_dev->lock);
1477
1478 ret = video_register_device(viu_dev->vdev, VFL_TYPE_VIDEO, -1);
1479 if (ret < 0) {
1480 video_device_release(viu_dev->vdev);
1481 goto err_unlock;
1482 }
1483
1484 /* enable VIU clock */
1485 clk = devm_clk_get(&op->dev, "ipg");
1486 if (IS_ERR(clk)) {
1487 dev_err(&op->dev, "failed to lookup the clock!\n");
1488 ret = PTR_ERR(clk);
1489 goto err_vdev;
1490 }
1491 ret = clk_prepare_enable(clk);
1492 if (ret) {
1493 dev_err(&op->dev, "failed to enable the clock!\n");
1494 goto err_vdev;
1495 }
1496 viu_dev->clk = clk;
1497
1498 /* reset VIU module */
1499 viu_reset(viu_dev->vr);
1500
1501 /* install interrupt handler */
1502 if (request_irq(viu_dev->irq, viu_intr, 0, "viu", (void *)viu_dev)) {
1503 dev_err(&op->dev, "Request VIU IRQ failed.\n");
1504 ret = -ENODEV;
1505 goto err_clk;
1506 }
1507
1508 mutex_unlock(&viu_dev->lock);
1509
1510 dev_info(&op->dev, "Freescale VIU Video Capture Board\n");
1511 return ret;
1512
1513 err_clk:
1514 clk_disable_unprepare(viu_dev->clk);
1515 err_vdev:
1516 video_unregister_device(viu_dev->vdev);
1517 err_unlock:
1518 mutex_unlock(&viu_dev->lock);
1519 err_hdl:
1520 v4l2_ctrl_handler_free(&viu_dev->hdl);
1521 err_i2c:
1522 i2c_put_adapter(ad);
1523 err_v4l2:
1524 v4l2_device_unregister(&viu_dev->v4l2_dev);
1525 err_irq:
1526 irq_dispose_mapping(viu_irq);
1527 return ret;
1528 }
1529
1530 static int viu_of_remove(struct platform_device *op)
1531 {
1532 struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1533 struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1534 struct v4l2_subdev *sdev = list_entry(v4l2_dev->subdevs.next,
1535 struct v4l2_subdev, list);
1536 struct i2c_client *client = v4l2_get_subdevdata(sdev);
1537
1538 free_irq(dev->irq, (void *)dev);
1539 irq_dispose_mapping(dev->irq);
1540
1541 clk_disable_unprepare(dev->clk);
1542
1543 v4l2_ctrl_handler_free(&dev->hdl);
1544 video_unregister_device(dev->vdev);
1545 i2c_put_adapter(client->adapter);
1546 v4l2_device_unregister(&dev->v4l2_dev);
1547 return 0;
1548 }
1549
1550 #ifdef CONFIG_PM
1551 static int viu_suspend(struct platform_device *op, pm_message_t state)
1552 {
1553 struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1554 struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1555
1556 clk_disable(dev->clk);
1557 return 0;
1558 }
1559
1560 static int viu_resume(struct platform_device *op)
1561 {
1562 struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1563 struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1564
1565 clk_enable(dev->clk);
1566 return 0;
1567 }
1568 #endif
1569
1570 /*
1571 * Initialization and module stuff
1572 */
1573 static const struct of_device_id mpc512x_viu_of_match[] = {
1574 {
1575 .compatible = "fsl,mpc5121-viu",
1576 },
1577 {},
1578 };
1579 MODULE_DEVICE_TABLE(of, mpc512x_viu_of_match);
1580
1581 static struct platform_driver viu_of_platform_driver = {
1582 .probe = viu_of_probe,
1583 .remove = viu_of_remove,
1584 #ifdef CONFIG_PM
1585 .suspend = viu_suspend,
1586 .resume = viu_resume,
1587 #endif
1588 .driver = {
1589 .name = DRV_NAME,
1590 .of_match_table = mpc512x_viu_of_match,
1591 },
1592 };
1593
1594 module_platform_driver(viu_of_platform_driver);
1595
1596 MODULE_DESCRIPTION("Freescale Video-In(VIU)");
1597 MODULE_AUTHOR("Hongjun Chen");
1598 MODULE_LICENSE("GPL");
1599 MODULE_VERSION(VIU_VERSION);
Linux with added FPC-III support