drivers/net/ethernet/freescale/fs_enet/mii-fec.c

   1 /*
   2  * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
   3  *
   4  * Copyright (c) 2003 Intracom S.A.
   5  *  by Pantelis Antoniou <panto@intracom.gr>
   6  *
   7  * 2005 (c) MontaVista Software, Inc.
   8  * Vitaly Bordug <vbordug@ru.mvista.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public License
  11  * version 2. This program is licensed "as is" without any warranty of any
  12  * kind, whether express or implied.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/types.h>
  17 #include <linux/kernel.h>
  18 #include <linux/string.h>
  19 #include <linux/ptrace.h>
  20 #include <linux/errno.h>
  21 #include <linux/ioport.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/delay.h>
  25 #include <linux/netdevice.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/skbuff.h>
  28 #include <linux/spinlock.h>
  29 #include <linux/mii.h>
  30 #include <linux/ethtool.h>
  31 #include <linux/bitops.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/of_address.h>
  34 #include <linux/of_platform.h>
  35 #include <linux/pgtable.h>
  36
  37 #include <asm/irq.h>
  38 #include <linux/uaccess.h>
  39 #include <asm/mpc5xxx.h>
  40
  41 #include "fs_enet.h"
  42 #include "fec.h"
  43
  44 /* Make MII read/write commands for the FEC.
  45 */
  46 #define mk_mii_read(REG)        (0x60020000 | ((REG & 0x1f) << 18))
  47 #define mk_mii_write(REG, VAL)  (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
  48 #define mk_mii_end              0
  49
  50 #define FEC_MII_LOOPS   10000
  51
  52 static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
  53 {
  54         struct fec_info* fec = bus->priv;
  55         struct fec __iomem *fecp = fec->fecp;
  56         int i, ret = -1;
  57
  58         BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
  59
  60         /* Add PHY address to register command.  */
  61         out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
  62
  63         for (i = 0; i < FEC_MII_LOOPS; i++)
  64                 if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
  65                         break;
  66
  67         if (i < FEC_MII_LOOPS) {
  68                 out_be32(&fecp->fec_ievent, FEC_ENET_MII);
  69                 ret = in_be32(&fecp->fec_mii_data) & 0xffff;
  70         }
  71
  72         return ret;
  73 }
  74
  75 static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
  76 {
  77         struct fec_info* fec = bus->priv;
  78         struct fec __iomem *fecp = fec->fecp;
  79         int i;
  80
  81         /* this must never happen */
  82         BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
  83
  84         /* Add PHY address to register command.  */
  85         out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
  86
  87         for (i = 0; i < FEC_MII_LOOPS; i++)
  88                 if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
  89                         break;
  90
  91         if (i < FEC_MII_LOOPS)
  92                 out_be32(&fecp->fec_ievent, FEC_ENET_MII);
  93
  94         return 0;
  95
  96 }
  97
  98 static const struct of_device_id fs_enet_mdio_fec_match[];
  99 static int fs_enet_mdio_probe(struct platform_device *ofdev)
 100 {
 101         const struct of_device_id *match;
 102         struct resource res;
 103         struct mii_bus *new_bus;
 104         struct fec_info *fec;
 105         int (*get_bus_freq)(struct device_node *);
 106         int ret = -ENOMEM, clock, speed;
 107
 108         match = of_match_device(fs_enet_mdio_fec_match, &ofdev->dev);
 109         if (!match)
 110                 return -EINVAL;
 111         get_bus_freq = match->data;
 112
 113         new_bus = mdiobus_alloc();
 114         if (!new_bus)
 115                 goto out;
 116
 117         fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
 118         if (!fec)
 119                 goto out_mii;
 120
 121         new_bus->priv = fec;
 122         new_bus->name = "FEC MII Bus";
 123         new_bus->read = &fs_enet_fec_mii_read;
 124         new_bus->write = &fs_enet_fec_mii_write;
 125
 126         ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
 127         if (ret)
 128                 goto out_res;
 129
 130         snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
 131
 132         fec->fecp = ioremap(res.start, resource_size(&res));
 133         if (!fec->fecp) {
 134                 ret = -ENOMEM;
 135                 goto out_fec;
 136         }
 137
 138         if (get_bus_freq) {
 139                 clock = get_bus_freq(ofdev->dev.of_node);
 140                 if (!clock) {
 141                         /* Use maximum divider if clock is unknown */
 142                         dev_warn(&ofdev->dev, "could not determine IPS clock\n");
 143                         clock = 0x3F * 5000000;
 144                 }
 145         } else
 146                 clock = ppc_proc_freq;
 147
 148         /*
 149          * Scale for a MII clock <= 2.5 MHz
 150          * Note that only 6 bits (25:30) are available for MII speed.
 151          */
 152         speed = (clock + 4999999) / 5000000;
 153         if (speed > 0x3F) {
 154                 speed = 0x3F;
 155                 dev_err(&ofdev->dev,
 156                         "MII clock (%d Hz) exceeds max (2.5 MHz)\n",
 157                         clock / speed);
 158         }
 159
 160         fec->mii_speed = speed << 1;
 161
 162         setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
 163         setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
 164                                           FEC_ECNTRL_ETHER_EN);
 165         out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
 166         clrsetbits_be32(&fec->fecp->fec_mii_speed, 0x7E, fec->mii_speed);
 167
 168         new_bus->phy_mask = ~0;
 169
 170         new_bus->parent = &ofdev->dev;
 171         platform_set_drvdata(ofdev, new_bus);
 172
 173         ret = of_mdiobus_register(new_bus, ofdev->dev.of_node);
 174         if (ret)
 175                 goto out_unmap_regs;
 176
 177         return 0;
 178
 179 out_unmap_regs:
 180         iounmap(fec->fecp);
 181 out_res:
 182 out_fec:
 183         kfree(fec);
 184 out_mii:
 185         mdiobus_free(new_bus);
 186 out:
 187         return ret;
 188 }
 189
 190 static int fs_enet_mdio_remove(struct platform_device *ofdev)
 191 {
 192         struct mii_bus *bus = platform_get_drvdata(ofdev);
 193         struct fec_info *fec = bus->priv;
 194
 195         mdiobus_unregister(bus);
 196         iounmap(fec->fecp);
 197         kfree(fec);
 198         mdiobus_free(bus);
 199
 200         return 0;
 201 }
 202
 203 static const struct of_device_id fs_enet_mdio_fec_match[] = {
 204         {
 205                 .compatible = "fsl,pq1-fec-mdio",
 206         },
 207 #if defined(CONFIG_PPC_MPC512x)
 208         {
 209                 .compatible = "fsl,mpc5121-fec-mdio",
 210                 .data = mpc5xxx_get_bus_frequency,
 211         },
 212 #endif
 213         {},
 214 };
 215 MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
 216
 217 static struct platform_driver fs_enet_fec_mdio_driver = {
 218         .driver = {
 219                 .name = "fsl-fec-mdio",
 220                 .of_match_table = fs_enet_mdio_fec_match,
 221         },
 222         .probe = fs_enet_mdio_probe,
 223         .remove = fs_enet_mdio_remove,
 224 };
 225
 226 module_platform_driver(fs_enet_fec_mdio_driver);
 227 MODULE_LICENSE("GPL");