drivers/net/vmxnet3/upt1_defs.h

   1 /*
   2  * Linux driver for VMware's vmxnet3 ethernet NIC.
   3  *
   4  * Copyright (C) 2008-2020, VMware, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; version 2 of the License and no later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  * NON INFRINGEMENT.  See the GNU General Public License for more
  14  * details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The full GNU General Public License is included in this distribution in
  21  * the file called "COPYING".
  22  *
  23  * Maintained by: pv-drivers@vmware.com
  24  *
  25  */
  26
  27 #ifndef _UPT1_DEFS_H
  28 #define _UPT1_DEFS_H
  29
  30 struct UPT1_TxStats {
  31         u64                     TSOPktsTxOK;  /* TSO pkts post-segmentation */
  32         u64                     TSOBytesTxOK;
  33         u64                     ucastPktsTxOK;
  34         u64                     ucastBytesTxOK;
  35         u64                     mcastPktsTxOK;
  36         u64                     mcastBytesTxOK;
  37         u64                     bcastPktsTxOK;
  38         u64                     bcastBytesTxOK;
  39         u64                     pktsTxError;
  40         u64                     pktsTxDiscard;
  41 };
  42
  43 struct UPT1_RxStats {
  44         u64                     LROPktsRxOK;    /* LRO pkts */
  45         u64                     LROBytesRxOK;   /* bytes from LRO pkts */
  46         /* the following counters are for pkts from the wire, i.e., pre-LRO */
  47         u64                     ucastPktsRxOK;
  48         u64                     ucastBytesRxOK;
  49         u64                     mcastPktsRxOK;
  50         u64                     mcastBytesRxOK;
  51         u64                     bcastPktsRxOK;
  52         u64                     bcastBytesRxOK;
  53         u64                     pktsRxOutOfBuf;
  54         u64                     pktsRxError;
  55 };
  56
  57 /* interrupt moderation level */
  58 enum {
  59         UPT1_IML_NONE           = 0, /* no interrupt moderation */
  60         UPT1_IML_HIGHEST        = 7, /* least intr generated */
  61         UPT1_IML_ADAPTIVE       = 8, /* adpative intr moderation */
  62 };
  63 /* values for UPT1_RSSConf.hashFunc */
  64 enum {
  65         UPT1_RSS_HASH_TYPE_NONE      = 0x0,
  66         UPT1_RSS_HASH_TYPE_IPV4      = 0x01,
  67         UPT1_RSS_HASH_TYPE_TCP_IPV4  = 0x02,
  68         UPT1_RSS_HASH_TYPE_IPV6      = 0x04,
  69         UPT1_RSS_HASH_TYPE_TCP_IPV6  = 0x08,
  70 };
  71
  72 enum {
  73         UPT1_RSS_HASH_FUNC_NONE      = 0x0,
  74         UPT1_RSS_HASH_FUNC_TOEPLITZ  = 0x01,
  75 };
  76
  77 #define UPT1_RSS_MAX_KEY_SIZE        40
  78 #define UPT1_RSS_MAX_IND_TABLE_SIZE  128
  79
  80 struct UPT1_RSSConf {
  81         u16                     hashType;
  82         u16                     hashFunc;
  83         u16                     hashKeySize;
  84         u16                     indTableSize;
  85         u8                      hashKey[UPT1_RSS_MAX_KEY_SIZE];
  86         u8                      indTable[UPT1_RSS_MAX_IND_TABLE_SIZE];
  87 };
  88
  89 /* features */
  90 enum {
  91         UPT1_F_RXCSUM           = cpu_to_le64(0x0001),   /* rx csum verification */
  92         UPT1_F_RSS              = cpu_to_le64(0x0002),
  93         UPT1_F_RXVLAN           = cpu_to_le64(0x0004),   /* VLAN tag stripping */
  94         UPT1_F_LRO              = cpu_to_le64(0x0008),
  95         UPT1_F_RXINNEROFLD      = cpu_to_le64(0x00010),  /* Geneve/Vxlan rx csum
  96                                                           * offloading
  97                                                           */
  98 };
  99 #endif