WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / wireless / intel / iwlwifi / iwl-io.c
blob2ac20d0a30eb654d07de933610215c133b00d6cc
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2003-2014, 2018-2020 Intel Corporation
4 * Copyright (C) 2015-2016 Intel Deutschland GmbH
5 */
6 #include <linux/delay.h>
7 #include <linux/device.h>
8 #include <linux/export.h>
10 #include "iwl-drv.h"
11 #include "iwl-io.h"
12 #include "iwl-csr.h"
13 #include "iwl-debug.h"
14 #include "iwl-prph.h"
15 #include "iwl-fh.h"
17 void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)
19 trace_iwlwifi_dev_iowrite8(trans->dev, ofs, val);
20 iwl_trans_write8(trans, ofs, val);
22 IWL_EXPORT_SYMBOL(iwl_write8);
24 void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val)
26 trace_iwlwifi_dev_iowrite32(trans->dev, ofs, val);
27 iwl_trans_write32(trans, ofs, val);
29 IWL_EXPORT_SYMBOL(iwl_write32);
31 void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val)
33 trace_iwlwifi_dev_iowrite64(trans->dev, ofs, val);
34 iwl_trans_write32(trans, ofs, lower_32_bits(val));
35 iwl_trans_write32(trans, ofs + 4, upper_32_bits(val));
37 IWL_EXPORT_SYMBOL(iwl_write64);
39 u32 iwl_read32(struct iwl_trans *trans, u32 ofs)
41 u32 val = iwl_trans_read32(trans, ofs);
43 trace_iwlwifi_dev_ioread32(trans->dev, ofs, val);
44 return val;
46 IWL_EXPORT_SYMBOL(iwl_read32);
48 #define IWL_POLL_INTERVAL 10 /* microseconds */
50 int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
51 u32 bits, u32 mask, int timeout)
53 int t = 0;
55 do {
56 if ((iwl_read32(trans, addr) & mask) == (bits & mask))
57 return t;
58 udelay(IWL_POLL_INTERVAL);
59 t += IWL_POLL_INTERVAL;
60 } while (t < timeout);
62 return -ETIMEDOUT;
64 IWL_EXPORT_SYMBOL(iwl_poll_bit);
66 u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
68 u32 value = 0x5a5a5a5a;
69 unsigned long flags;
70 if (iwl_trans_grab_nic_access(trans, &flags)) {
71 value = iwl_read32(trans, reg);
72 iwl_trans_release_nic_access(trans, &flags);
75 return value;
77 IWL_EXPORT_SYMBOL(iwl_read_direct32);
79 void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
81 unsigned long flags;
83 if (iwl_trans_grab_nic_access(trans, &flags)) {
84 iwl_write32(trans, reg, value);
85 iwl_trans_release_nic_access(trans, &flags);
88 IWL_EXPORT_SYMBOL(iwl_write_direct32);
90 void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value)
92 unsigned long flags;
94 if (iwl_trans_grab_nic_access(trans, &flags)) {
95 iwl_write64(trans, reg, value);
96 iwl_trans_release_nic_access(trans, &flags);
99 IWL_EXPORT_SYMBOL(iwl_write_direct64);
101 int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
102 int timeout)
104 int t = 0;
106 do {
107 if ((iwl_read_direct32(trans, addr) & mask) == mask)
108 return t;
109 udelay(IWL_POLL_INTERVAL);
110 t += IWL_POLL_INTERVAL;
111 } while (t < timeout);
113 return -ETIMEDOUT;
115 IWL_EXPORT_SYMBOL(iwl_poll_direct_bit);
117 u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs)
119 u32 val = iwl_trans_read_prph(trans, ofs);
120 trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
121 return val;
123 IWL_EXPORT_SYMBOL(iwl_read_prph_no_grab);
125 void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val)
127 trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
128 iwl_trans_write_prph(trans, ofs, val);
130 IWL_EXPORT_SYMBOL(iwl_write_prph_no_grab);
132 void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val)
134 trace_iwlwifi_dev_iowrite_prph64(trans->dev, ofs, val);
135 iwl_write_prph_no_grab(trans, ofs, val & 0xffffffff);
136 iwl_write_prph_no_grab(trans, ofs + 4, val >> 32);
138 IWL_EXPORT_SYMBOL(iwl_write_prph64_no_grab);
140 u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
142 unsigned long flags;
143 u32 val = 0x5a5a5a5a;
145 if (iwl_trans_grab_nic_access(trans, &flags)) {
146 val = iwl_read_prph_no_grab(trans, ofs);
147 iwl_trans_release_nic_access(trans, &flags);
149 return val;
151 IWL_EXPORT_SYMBOL(iwl_read_prph);
153 void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
155 unsigned long flags;
157 if (iwl_trans_grab_nic_access(trans, &flags)) {
158 iwl_write_prph_no_grab(trans, ofs, val);
159 iwl_trans_release_nic_access(trans, &flags);
162 IWL_EXPORT_SYMBOL(iwl_write_prph);
164 int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
165 u32 bits, u32 mask, int timeout)
167 int t = 0;
169 do {
170 if ((iwl_read_prph(trans, addr) & mask) == (bits & mask))
171 return t;
172 udelay(IWL_POLL_INTERVAL);
173 t += IWL_POLL_INTERVAL;
174 } while (t < timeout);
176 return -ETIMEDOUT;
179 void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
181 unsigned long flags;
183 if (iwl_trans_grab_nic_access(trans, &flags)) {
184 iwl_write_prph_no_grab(trans, ofs,
185 iwl_read_prph_no_grab(trans, ofs) |
186 mask);
187 iwl_trans_release_nic_access(trans, &flags);
190 IWL_EXPORT_SYMBOL(iwl_set_bits_prph);
192 void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
193 u32 bits, u32 mask)
195 unsigned long flags;
197 if (iwl_trans_grab_nic_access(trans, &flags)) {
198 iwl_write_prph_no_grab(trans, ofs,
199 (iwl_read_prph_no_grab(trans, ofs) &
200 mask) | bits);
201 iwl_trans_release_nic_access(trans, &flags);
204 IWL_EXPORT_SYMBOL(iwl_set_bits_mask_prph);
206 void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
208 unsigned long flags;
209 u32 val;
211 if (iwl_trans_grab_nic_access(trans, &flags)) {
212 val = iwl_read_prph_no_grab(trans, ofs);
213 iwl_write_prph_no_grab(trans, ofs, (val & ~mask));
214 iwl_trans_release_nic_access(trans, &flags);
217 IWL_EXPORT_SYMBOL(iwl_clear_bits_prph);
219 void iwl_force_nmi(struct iwl_trans *trans)
221 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_9000)
222 iwl_write_prph(trans, DEVICE_SET_NMI_REG,
223 DEVICE_SET_NMI_VAL_DRV);
224 else if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210)
225 iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER,
226 UREG_NIC_SET_NMI_DRIVER_NMI_FROM_DRIVER);
227 else
228 iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6,
229 UREG_DOORBELL_TO_ISR6_NMI_BIT);
231 IWL_EXPORT_SYMBOL(iwl_force_nmi);
233 static const char *get_rfh_string(int cmd)
235 #define IWL_CMD(x) case x: return #x
236 #define IWL_CMD_MQ(arg, reg, q) { if (arg == reg(q)) return #reg; }
238 int i;
240 for (i = 0; i < IWL_MAX_RX_HW_QUEUES; i++) {
241 IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_BA_LSB, i);
242 IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_WIDX, i);
243 IWL_CMD_MQ(cmd, RFH_Q_FRBDCB_RIDX, i);
244 IWL_CMD_MQ(cmd, RFH_Q_URBD_STTS_WPTR_LSB, i);
247 switch (cmd) {
248 IWL_CMD(RFH_RXF_DMA_CFG);
249 IWL_CMD(RFH_GEN_CFG);
250 IWL_CMD(RFH_GEN_STATUS);
251 IWL_CMD(FH_TSSR_TX_STATUS_REG);
252 IWL_CMD(FH_TSSR_TX_ERROR_REG);
253 default:
254 return "UNKNOWN";
256 #undef IWL_CMD_MQ
259 struct reg {
260 u32 addr;
261 bool is64;
264 static int iwl_dump_rfh(struct iwl_trans *trans, char **buf)
266 int i, q;
267 int num_q = trans->num_rx_queues;
268 static const u32 rfh_tbl[] = {
269 RFH_RXF_DMA_CFG,
270 RFH_GEN_CFG,
271 RFH_GEN_STATUS,
272 FH_TSSR_TX_STATUS_REG,
273 FH_TSSR_TX_ERROR_REG,
275 static const struct reg rfh_mq_tbl[] = {
276 { RFH_Q0_FRBDCB_BA_LSB, true },
277 { RFH_Q0_FRBDCB_WIDX, false },
278 { RFH_Q0_FRBDCB_RIDX, false },
279 { RFH_Q0_URBD_STTS_WPTR_LSB, true },
282 #ifdef CONFIG_IWLWIFI_DEBUGFS
283 if (buf) {
284 int pos = 0;
286 * Register (up to 34 for name + 8 blank/q for MQ): 40 chars
287 * Colon + space: 2 characters
288 * 0X%08x: 10 characters
289 * New line: 1 character
290 * Total of 53 characters
292 size_t bufsz = ARRAY_SIZE(rfh_tbl) * 53 +
293 ARRAY_SIZE(rfh_mq_tbl) * 53 * num_q + 40;
295 *buf = kmalloc(bufsz, GFP_KERNEL);
296 if (!*buf)
297 return -ENOMEM;
299 pos += scnprintf(*buf + pos, bufsz - pos,
300 "RFH register values:\n");
302 for (i = 0; i < ARRAY_SIZE(rfh_tbl); i++)
303 pos += scnprintf(*buf + pos, bufsz - pos,
304 "%40s: 0X%08x\n",
305 get_rfh_string(rfh_tbl[i]),
306 iwl_read_prph(trans, rfh_tbl[i]));
308 for (i = 0; i < ARRAY_SIZE(rfh_mq_tbl); i++)
309 for (q = 0; q < num_q; q++) {
310 u32 addr = rfh_mq_tbl[i].addr;
312 addr += q * (rfh_mq_tbl[i].is64 ? 8 : 4);
313 pos += scnprintf(*buf + pos, bufsz - pos,
314 "%34s(q %2d): 0X%08x\n",
315 get_rfh_string(addr), q,
316 iwl_read_prph(trans, addr));
319 return pos;
321 #endif
323 IWL_ERR(trans, "RFH register values:\n");
324 for (i = 0; i < ARRAY_SIZE(rfh_tbl); i++)
325 IWL_ERR(trans, " %34s: 0X%08x\n",
326 get_rfh_string(rfh_tbl[i]),
327 iwl_read_prph(trans, rfh_tbl[i]));
329 for (i = 0; i < ARRAY_SIZE(rfh_mq_tbl); i++)
330 for (q = 0; q < num_q; q++) {
331 u32 addr = rfh_mq_tbl[i].addr;
333 addr += q * (rfh_mq_tbl[i].is64 ? 8 : 4);
334 IWL_ERR(trans, " %34s(q %d): 0X%08x\n",
335 get_rfh_string(addr), q,
336 iwl_read_prph(trans, addr));
339 return 0;
342 static const char *get_fh_string(int cmd)
344 switch (cmd) {
345 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
346 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
347 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
348 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
349 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
350 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
351 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
352 IWL_CMD(FH_TSSR_TX_STATUS_REG);
353 IWL_CMD(FH_TSSR_TX_ERROR_REG);
354 default:
355 return "UNKNOWN";
357 #undef IWL_CMD
360 int iwl_dump_fh(struct iwl_trans *trans, char **buf)
362 int i;
363 static const u32 fh_tbl[] = {
364 FH_RSCSR_CHNL0_STTS_WPTR_REG,
365 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
366 FH_RSCSR_CHNL0_WPTR,
367 FH_MEM_RCSR_CHNL0_CONFIG_REG,
368 FH_MEM_RSSR_SHARED_CTRL_REG,
369 FH_MEM_RSSR_RX_STATUS_REG,
370 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
371 FH_TSSR_TX_STATUS_REG,
372 FH_TSSR_TX_ERROR_REG
375 if (trans->trans_cfg->mq_rx_supported)
376 return iwl_dump_rfh(trans, buf);
378 #ifdef CONFIG_IWLWIFI_DEBUGFS
379 if (buf) {
380 int pos = 0;
381 size_t bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
383 *buf = kmalloc(bufsz, GFP_KERNEL);
384 if (!*buf)
385 return -ENOMEM;
387 pos += scnprintf(*buf + pos, bufsz - pos,
388 "FH register values:\n");
390 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
391 pos += scnprintf(*buf + pos, bufsz - pos,
392 " %34s: 0X%08x\n",
393 get_fh_string(fh_tbl[i]),
394 iwl_read_direct32(trans, fh_tbl[i]));
396 return pos;
398 #endif
400 IWL_ERR(trans, "FH register values:\n");
401 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
402 IWL_ERR(trans, " %34s: 0X%08x\n",
403 get_fh_string(fh_tbl[i]),
404 iwl_read_direct32(trans, fh_tbl[i]));
406 return 0;
409 int iwl_finish_nic_init(struct iwl_trans *trans,
410 const struct iwl_cfg_trans_params *cfg_trans)
412 int err;
414 if (cfg_trans->bisr_workaround) {
415 /* ensure the TOP FSM isn't still in previous reset */
416 mdelay(2);
420 * Set "initialization complete" bit to move adapter from
421 * D0U* --> D0A* (powered-up active) state.
423 iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
425 if (cfg_trans->device_family == IWL_DEVICE_FAMILY_8000)
426 udelay(2);
429 * Wait for clock stabilization; once stabilized, access to
430 * device-internal resources is supported, e.g. iwl_write_prph()
431 * and accesses to uCode SRAM.
433 err = iwl_poll_bit(trans, CSR_GP_CNTRL,
434 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
435 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
436 25000);
437 if (err < 0)
438 IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
440 if (cfg_trans->bisr_workaround) {
441 /* ensure BISR shift has finished */
442 udelay(200);
445 return err < 0 ? err : 0;
447 IWL_EXPORT_SYMBOL(iwl_finish_nic_init);