1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2014 Intel Mobile Communications GmbH
13 static inline void iwl_scd_txq_set_chain(struct iwl_trans
*trans
,
16 iwl_set_bits_prph(trans
, SCD_QUEUECHAIN_SEL
, BIT(txq_id
));
19 static inline void iwl_scd_txq_enable_agg(struct iwl_trans
*trans
,
22 iwl_set_bits_prph(trans
, SCD_AGGR_SEL
, BIT(txq_id
));
25 static inline void iwl_scd_txq_disable_agg(struct iwl_trans
*trans
,
28 iwl_clear_bits_prph(trans
, SCD_AGGR_SEL
, BIT(txq_id
));
31 static inline void iwl_scd_disable_agg(struct iwl_trans
*trans
)
33 iwl_set_bits_prph(trans
, SCD_AGGR_SEL
, 0);
36 static inline void iwl_scd_activate_fifos(struct iwl_trans
*trans
)
38 iwl_write_prph(trans
, SCD_TXFACT
, IWL_MASK(0, 7));
41 static inline void iwl_scd_deactivate_fifos(struct iwl_trans
*trans
)
43 iwl_write_prph(trans
, SCD_TXFACT
, 0);
46 static inline void iwl_scd_enable_set_active(struct iwl_trans
*trans
,
49 iwl_write_prph(trans
, SCD_EN_CTRL
, value
);
52 static inline unsigned int SCD_QUEUE_WRPTR(unsigned int chnl
)
55 return SCD_BASE
+ 0x18 + chnl
* 4;
56 WARN_ON_ONCE(chnl
>= 32);
57 return SCD_BASE
+ 0x284 + (chnl
- 20) * 4;
60 static inline unsigned int SCD_QUEUE_RDPTR(unsigned int chnl
)
63 return SCD_BASE
+ 0x68 + chnl
* 4;
64 WARN_ON_ONCE(chnl
>= 32);
65 return SCD_BASE
+ 0x2B4 + chnl
* 4;
68 static inline unsigned int SCD_QUEUE_STATUS_BITS(unsigned int chnl
)
71 return SCD_BASE
+ 0x10c + chnl
* 4;
72 WARN_ON_ONCE(chnl
>= 32);
73 return SCD_BASE
+ 0x334 + chnl
* 4;
76 static inline void iwl_scd_txq_set_inactive(struct iwl_trans
*trans
,
79 iwl_write_prph(trans
, SCD_QUEUE_STATUS_BITS(txq_id
),
80 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE
)|
81 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));