1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * This file is part of wl1251
5 * Copyright (c) 1998-2007 Texas Instruments Incorporated
6 * Copyright (C) 2008-2009 Nokia Corporation
12 #include <linux/mutex.h>
13 #include <linux/list.h>
14 #include <linux/bitops.h>
15 #include <net/mac80211.h>
17 #define DRIVER_NAME "wl1251"
18 #define DRIVER_PREFIX DRIVER_NAME ": "
25 DEBUG_MAILBOX
= BIT(3),
26 DEBUG_NETLINK
= BIT(4),
33 DEBUG_MAC80211
= BIT(11),
39 #define DEBUG_LEVEL (DEBUG_NONE)
41 #define DEBUG_DUMP_LIMIT 1024
43 #define wl1251_error(fmt, arg...) \
44 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
46 #define wl1251_warning(fmt, arg...) \
47 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
49 #define wl1251_notice(fmt, arg...) \
50 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
52 #define wl1251_info(fmt, arg...) \
53 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
55 #define wl1251_debug(level, fmt, arg...) \
57 if (level & DEBUG_LEVEL) \
58 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
61 #define wl1251_dump(level, prefix, buf, len) \
63 if (level & DEBUG_LEVEL) \
64 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
65 DUMP_PREFIX_OFFSET, 16, 1, \
67 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
71 #define wl1251_dump_ascii(level, prefix, buf, len) \
73 if (level & DEBUG_LEVEL) \
74 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
75 DUMP_PREFIX_OFFSET, 16, 1, \
77 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
81 #define WL1251_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
85 #define WL1251_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \
93 #define WL1251_BUSY_WORD_LEN 8
111 enum wl1251_partition_type
{
119 enum wl1251_station_mode
{
121 STATION_POWER_SAVE_MODE
,
125 struct wl1251_partition
{
130 struct wl1251_partition_set
{
131 struct wl1251_partition mem
;
132 struct wl1251_partition reg
;
137 struct wl1251_stats
{
138 struct acx_statistics
*fw_stats
;
139 unsigned long fw_stats_update
;
141 unsigned int retry_count
;
142 unsigned int excessive_retries
;
145 struct wl1251_debugfs
{
146 struct dentry
*rootdir
;
147 struct dentry
*fw_statistics
;
149 struct dentry
*tx_internal_desc_overflow
;
151 struct dentry
*rx_out_of_mem
;
152 struct dentry
*rx_hdr_overflow
;
153 struct dentry
*rx_hw_stuck
;
154 struct dentry
*rx_dropped
;
155 struct dentry
*rx_fcs_err
;
156 struct dentry
*rx_xfr_hint_trig
;
157 struct dentry
*rx_path_reset
;
158 struct dentry
*rx_reset_counter
;
160 struct dentry
*dma_rx_requested
;
161 struct dentry
*dma_rx_errors
;
162 struct dentry
*dma_tx_requested
;
163 struct dentry
*dma_tx_errors
;
165 struct dentry
*isr_cmd_cmplt
;
166 struct dentry
*isr_fiqs
;
167 struct dentry
*isr_rx_headers
;
168 struct dentry
*isr_rx_mem_overflow
;
169 struct dentry
*isr_rx_rdys
;
170 struct dentry
*isr_irqs
;
171 struct dentry
*isr_tx_procs
;
172 struct dentry
*isr_decrypt_done
;
173 struct dentry
*isr_dma0_done
;
174 struct dentry
*isr_dma1_done
;
175 struct dentry
*isr_tx_exch_complete
;
176 struct dentry
*isr_commands
;
177 struct dentry
*isr_rx_procs
;
178 struct dentry
*isr_hw_pm_mode_changes
;
179 struct dentry
*isr_host_acknowledges
;
180 struct dentry
*isr_pci_pm
;
181 struct dentry
*isr_wakeups
;
182 struct dentry
*isr_low_rssi
;
184 struct dentry
*wep_addr_key_count
;
185 struct dentry
*wep_default_key_count
;
186 /* skipping wep.reserved */
187 struct dentry
*wep_key_not_found
;
188 struct dentry
*wep_decrypt_fail
;
189 struct dentry
*wep_packets
;
190 struct dentry
*wep_interrupt
;
192 struct dentry
*pwr_ps_enter
;
193 struct dentry
*pwr_elp_enter
;
194 struct dentry
*pwr_missing_bcns
;
195 struct dentry
*pwr_wake_on_host
;
196 struct dentry
*pwr_wake_on_timer_exp
;
197 struct dentry
*pwr_tx_with_ps
;
198 struct dentry
*pwr_tx_without_ps
;
199 struct dentry
*pwr_rcvd_beacons
;
200 struct dentry
*pwr_power_save_off
;
201 struct dentry
*pwr_enable_ps
;
202 struct dentry
*pwr_disable_ps
;
203 struct dentry
*pwr_fix_tsf_ps
;
204 /* skipping cont_miss_bcns_spread for now */
205 struct dentry
*pwr_rcvd_awake_beacons
;
207 struct dentry
*mic_rx_pkts
;
208 struct dentry
*mic_calc_failure
;
210 struct dentry
*aes_encrypt_fail
;
211 struct dentry
*aes_decrypt_fail
;
212 struct dentry
*aes_encrypt_packets
;
213 struct dentry
*aes_decrypt_packets
;
214 struct dentry
*aes_encrypt_interrupt
;
215 struct dentry
*aes_decrypt_interrupt
;
217 struct dentry
*event_heart_beat
;
218 struct dentry
*event_calibration
;
219 struct dentry
*event_rx_mismatch
;
220 struct dentry
*event_rx_mem_empty
;
221 struct dentry
*event_rx_pool
;
222 struct dentry
*event_oom_late
;
223 struct dentry
*event_phy_transmit_error
;
224 struct dentry
*event_tx_stuck
;
226 struct dentry
*ps_pspoll_timeouts
;
227 struct dentry
*ps_upsd_timeouts
;
228 struct dentry
*ps_upsd_max_sptime
;
229 struct dentry
*ps_upsd_max_apturn
;
230 struct dentry
*ps_pspoll_max_apturn
;
231 struct dentry
*ps_pspoll_utilization
;
232 struct dentry
*ps_upsd_utilization
;
234 struct dentry
*rxpipe_rx_prep_beacon_drop
;
235 struct dentry
*rxpipe_descr_host_int_trig_rx_data
;
236 struct dentry
*rxpipe_beacon_buffer_thres_host_int_trig_rx_data
;
237 struct dentry
*rxpipe_missed_beacon_host_int_trig_rx_data
;
238 struct dentry
*rxpipe_tx_xfr_host_int_trig_rx_data
;
240 struct dentry
*tx_queue_len
;
241 struct dentry
*tx_queue_status
;
243 struct dentry
*retry_count
;
244 struct dentry
*excessive_retries
;
247 struct wl1251_if_operations
{
248 void (*read
)(struct wl1251
*wl
, int addr
, void *buf
, size_t len
);
249 void (*write
)(struct wl1251
*wl
, int addr
, void *buf
, size_t len
);
250 void (*read_elp
)(struct wl1251
*wl
, int addr
, u32
*val
);
251 void (*write_elp
)(struct wl1251
*wl
, int addr
, u32 val
);
252 int (*power
)(struct wl1251
*wl
, bool enable
);
253 void (*reset
)(struct wl1251
*wl
);
254 void (*enable_irq
)(struct wl1251
*wl
);
255 void (*disable_irq
)(struct wl1251
*wl
);
259 struct ieee80211_hw
*hw
;
260 bool mac80211_registered
;
263 const struct wl1251_if_operations
*if_ops
;
269 struct regulator
*vio
;
273 enum wl1251_state state
;
276 int physical_mem_addr
;
277 int physical_reg_addr
;
278 int virtual_mem_addr
;
279 int virtual_reg_addr
;
283 struct boot_attr boot_attr
;
291 u8 mac_addr
[ETH_ALEN
];
295 bool monitor_present
;
298 void *target_mem_map
;
299 struct acx_data_path_params_resp
*data_path
;
301 /* Number of TX packets transferred to the FW, modulo 16 */
304 /* Frames scheduled for transmission, not handled yet */
305 struct sk_buff_head tx_queue
;
306 bool tx_queue_stopped
;
308 struct work_struct tx_work
;
310 /* Pending TX frames */
311 struct sk_buff
*tx_frames
[16];
314 * Index pointing to the next TX complete entry
315 * in the cyclic XT complete array we get from
318 u32 next_tx_complete
;
323 /* Rx frames handled */
326 /* Current double buffer */
327 u32 rx_current_buffer
;
330 /* The target interrupt mask */
332 struct work_struct irq_work
;
334 /* The mbox event mask */
337 /* Mailbox pointers */
340 /* Are we currently scanning */
343 /* Default key (for WEP) */
346 unsigned int tx_mgmt_frm_rate
;
347 unsigned int tx_mgmt_frm_mod
;
349 unsigned int rx_config
;
350 unsigned int rx_filter
;
352 /* is firmware in elp mode */
355 struct delayed_work elp_work
;
357 enum wl1251_station_mode station_mode
;
359 /* PSM mode requested */
362 /* retry counter for PSM entries */
373 struct wl1251_stats stats
;
374 struct wl1251_debugfs debugfs
;
378 u8 buffer_busyword
[WL1251_BUSY_WORD_LEN
];
379 struct wl1251_rx_descriptor
*rx_descriptor
;
381 struct ieee80211_vif
*vif
;
386 /* Most recently reported noise in dBm */
390 int wl1251_plt_start(struct wl1251
*wl
);
391 int wl1251_plt_stop(struct wl1251
*wl
);
393 struct ieee80211_hw
*wl1251_alloc_hw(void);
394 int wl1251_free_hw(struct wl1251
*wl
);
395 int wl1251_init_ieee80211(struct wl1251
*wl
);
396 void wl1251_enable_interrupts(struct wl1251
*wl
);
397 void wl1251_disable_interrupts(struct wl1251
*wl
);
399 #define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG /* Long Preamble */
400 #define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS
401 #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
403 #define WL1251_DEFAULT_POWER_LEVEL 20
405 #define WL1251_TX_QUEUE_LOW_WATERMARK 10
406 #define WL1251_TX_QUEUE_HIGH_WATERMARK 25
408 #define WL1251_DEFAULT_BEACON_INT 100
409 #define WL1251_DEFAULT_DTIM_PERIOD 1
411 #define WL1251_DEFAULT_CHANNEL 0
413 #define WL1251_DEFAULT_BET_CONSECUTIVE 10
415 #define CHIP_ID_1251_PG10 (0x7010101)
416 #define CHIP_ID_1251_PG11 (0x7020101)
417 #define CHIP_ID_1251_PG12 (0x7030101)
418 #define CHIP_ID_1271_PG10 (0x4030101)
419 #define CHIP_ID_1271_PG20 (0x4030111)
421 #define WL1251_FW_NAME "ti-connectivity/wl1251-fw.bin"
422 #define WL1251_NVS_NAME "ti-connectivity/wl1251-nvs.bin"
424 #define WL1251_POWER_ON_SLEEP 10 /* in milliseconds */
426 #define WL1251_PART_DOWN_MEM_START 0x0
427 #define WL1251_PART_DOWN_MEM_SIZE 0x16800
428 #define WL1251_PART_DOWN_REG_START REGISTERS_BASE
429 #define WL1251_PART_DOWN_REG_SIZE REGISTERS_DOWN_SIZE
431 #define WL1251_PART_WORK_MEM_START 0x28000
432 #define WL1251_PART_WORK_MEM_SIZE 0x14000
433 #define WL1251_PART_WORK_REG_START REGISTERS_BASE
434 #define WL1251_PART_WORK_REG_SIZE REGISTERS_WORK_SIZE
436 #define WL1251_DEFAULT_LOW_RSSI_WEIGHT 10
437 #define WL1251_DEFAULT_LOW_RSSI_DEPTH 10