1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
5 #include <linux/slab.h>
6 #include <linux/device.h>
7 #include <linux/module.h>
8 #include <linux/mfd/syscon.h>
11 #include <linux/platform_device.h>
13 #include <linux/of_address.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/driver.h>
16 #include <linux/regulator/of_regulator.h>
17 #include <linux/regulator/machine.h>
19 #define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
20 #define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
22 #define LDO_POWER_GATE 0x00
23 #define LDO_FET_FULL_ON 0x1f
25 struct anatop_regulator
{
29 struct regulator_desc rdesc
;
34 static int anatop_regmap_set_voltage_time_sel(struct regulator_dev
*reg
,
38 struct anatop_regulator
*anatop_reg
= rdev_get_drvdata(reg
);
42 /* check whether need to care about LDO ramp up speed */
43 if (anatop_reg
->delay_bit_width
&& new_sel
> old_sel
) {
45 * the delay for LDO ramp up time is
46 * based on the register setting, we need
47 * to calculate how many steps LDO need to
48 * ramp up, and how much delay needed. (us)
50 regmap_read(reg
->regmap
, anatop_reg
->delay_reg
, &val
);
51 val
= (val
>> anatop_reg
->delay_bit_shift
) &
52 ((1 << anatop_reg
->delay_bit_width
) - 1);
53 ret
= (new_sel
- old_sel
) * (LDO_RAMP_UP_UNIT_IN_CYCLES
<<
54 val
) / LDO_RAMP_UP_FREQ_IN_MHZ
+ 1;
60 static int anatop_regmap_enable(struct regulator_dev
*reg
)
62 struct anatop_regulator
*anatop_reg
= rdev_get_drvdata(reg
);
65 sel
= anatop_reg
->bypass
? LDO_FET_FULL_ON
: anatop_reg
->sel
;
66 return regulator_set_voltage_sel_regmap(reg
, sel
);
69 static int anatop_regmap_disable(struct regulator_dev
*reg
)
71 return regulator_set_voltage_sel_regmap(reg
, LDO_POWER_GATE
);
74 static int anatop_regmap_is_enabled(struct regulator_dev
*reg
)
76 return regulator_get_voltage_sel_regmap(reg
) != LDO_POWER_GATE
;
79 static int anatop_regmap_core_set_voltage_sel(struct regulator_dev
*reg
,
82 struct anatop_regulator
*anatop_reg
= rdev_get_drvdata(reg
);
85 if (anatop_reg
->bypass
|| !anatop_regmap_is_enabled(reg
)) {
86 anatop_reg
->sel
= selector
;
90 ret
= regulator_set_voltage_sel_regmap(reg
, selector
);
92 anatop_reg
->sel
= selector
;
96 static int anatop_regmap_core_get_voltage_sel(struct regulator_dev
*reg
)
98 struct anatop_regulator
*anatop_reg
= rdev_get_drvdata(reg
);
100 if (anatop_reg
->bypass
|| !anatop_regmap_is_enabled(reg
))
101 return anatop_reg
->sel
;
103 return regulator_get_voltage_sel_regmap(reg
);
106 static int anatop_regmap_get_bypass(struct regulator_dev
*reg
, bool *enable
)
108 struct anatop_regulator
*anatop_reg
= rdev_get_drvdata(reg
);
111 sel
= regulator_get_voltage_sel_regmap(reg
);
112 if (sel
== LDO_FET_FULL_ON
)
113 WARN_ON(!anatop_reg
->bypass
);
114 else if (sel
!= LDO_POWER_GATE
)
115 WARN_ON(anatop_reg
->bypass
);
117 *enable
= anatop_reg
->bypass
;
121 static int anatop_regmap_set_bypass(struct regulator_dev
*reg
, bool enable
)
123 struct anatop_regulator
*anatop_reg
= rdev_get_drvdata(reg
);
126 if (enable
== anatop_reg
->bypass
)
129 sel
= enable
? LDO_FET_FULL_ON
: anatop_reg
->sel
;
130 anatop_reg
->bypass
= enable
;
132 return regulator_set_voltage_sel_regmap(reg
, sel
);
135 static struct regulator_ops anatop_rops
= {
136 .set_voltage_sel
= regulator_set_voltage_sel_regmap
,
137 .get_voltage_sel
= regulator_get_voltage_sel_regmap
,
138 .list_voltage
= regulator_list_voltage_linear
,
139 .map_voltage
= regulator_map_voltage_linear
,
142 static const struct regulator_ops anatop_core_rops
= {
143 .enable
= anatop_regmap_enable
,
144 .disable
= anatop_regmap_disable
,
145 .is_enabled
= anatop_regmap_is_enabled
,
146 .set_voltage_sel
= anatop_regmap_core_set_voltage_sel
,
147 .set_voltage_time_sel
= anatop_regmap_set_voltage_time_sel
,
148 .get_voltage_sel
= anatop_regmap_core_get_voltage_sel
,
149 .list_voltage
= regulator_list_voltage_linear
,
150 .map_voltage
= regulator_map_voltage_linear
,
151 .get_bypass
= anatop_regmap_get_bypass
,
152 .set_bypass
= anatop_regmap_set_bypass
,
155 static int anatop_regulator_probe(struct platform_device
*pdev
)
157 struct device
*dev
= &pdev
->dev
;
158 struct device_node
*np
= dev
->of_node
;
159 struct device_node
*anatop_np
;
160 struct regulator_desc
*rdesc
;
161 struct regulator_dev
*rdev
;
162 struct anatop_regulator
*sreg
;
163 struct regulator_init_data
*initdata
;
164 struct regulator_config config
= { };
165 struct regmap
*regmap
;
175 sreg
= devm_kzalloc(dev
, sizeof(*sreg
), GFP_KERNEL
);
179 rdesc
= &sreg
->rdesc
;
180 rdesc
->type
= REGULATOR_VOLTAGE
;
181 rdesc
->owner
= THIS_MODULE
;
183 of_property_read_string(np
, "regulator-name", &rdesc
->name
);
185 dev_err(dev
, "failed to get a regulator-name\n");
189 initdata
= of_get_regulator_init_data(dev
, np
, rdesc
);
193 initdata
->supply_regulator
= "vin";
195 anatop_np
= of_get_parent(np
);
198 regmap
= syscon_node_to_regmap(anatop_np
);
199 of_node_put(anatop_np
);
201 return PTR_ERR(regmap
);
203 ret
= of_property_read_u32(np
, "anatop-reg-offset", &control_reg
);
205 dev_err(dev
, "no anatop-reg-offset property set\n");
208 ret
= of_property_read_u32(np
, "anatop-vol-bit-width", &vol_bit_width
);
210 dev_err(dev
, "no anatop-vol-bit-width property set\n");
213 ret
= of_property_read_u32(np
, "anatop-vol-bit-shift", &vol_bit_shift
);
215 dev_err(dev
, "no anatop-vol-bit-shift property set\n");
218 ret
= of_property_read_u32(np
, "anatop-min-bit-val", &min_bit_val
);
220 dev_err(dev
, "no anatop-min-bit-val property set\n");
223 ret
= of_property_read_u32(np
, "anatop-min-voltage", &min_voltage
);
225 dev_err(dev
, "no anatop-min-voltage property set\n");
228 ret
= of_property_read_u32(np
, "anatop-max-voltage", &max_voltage
);
230 dev_err(dev
, "no anatop-max-voltage property set\n");
234 /* read LDO ramp up setting, only for core reg */
235 of_property_read_u32(np
, "anatop-delay-reg-offset",
237 of_property_read_u32(np
, "anatop-delay-bit-width",
238 &sreg
->delay_bit_width
);
239 of_property_read_u32(np
, "anatop-delay-bit-shift",
240 &sreg
->delay_bit_shift
);
242 rdesc
->n_voltages
= (max_voltage
- min_voltage
) / 25000 + 1
244 rdesc
->min_uV
= min_voltage
;
245 rdesc
->uV_step
= 25000;
246 rdesc
->linear_min_sel
= min_bit_val
;
247 rdesc
->vsel_reg
= control_reg
;
248 rdesc
->vsel_mask
= ((1 << vol_bit_width
) - 1) << vol_bit_shift
;
249 rdesc
->min_dropout_uV
= 125000;
251 config
.dev
= &pdev
->dev
;
252 config
.init_data
= initdata
;
253 config
.driver_data
= sreg
;
254 config
.of_node
= pdev
->dev
.of_node
;
255 config
.regmap
= regmap
;
257 /* Only core regulators have the ramp up delay configuration. */
258 if (control_reg
&& sreg
->delay_bit_width
) {
259 rdesc
->ops
= &anatop_core_rops
;
261 ret
= regmap_read(config
.regmap
, rdesc
->vsel_reg
, &val
);
263 dev_err(dev
, "failed to read initial state\n");
267 sreg
->sel
= (val
& rdesc
->vsel_mask
) >> vol_bit_shift
;
268 if (sreg
->sel
== LDO_FET_FULL_ON
) {
274 * In case vddpu was disabled by the bootloader, we need to set
275 * a sane default until imx6-cpufreq was probed and changes the
276 * voltage to the correct value. In this case we set 1.25V.
278 if (!sreg
->sel
&& !strcmp(rdesc
->name
, "vddpu"))
281 /* set the default voltage of the pcie phy to be 1.100v */
282 if (!sreg
->sel
&& !strcmp(rdesc
->name
, "vddpcie"))
285 if (!sreg
->bypass
&& !sreg
->sel
) {
286 dev_err(&pdev
->dev
, "Failed to read a valid default voltage selector.\n");
292 rdesc
->ops
= &anatop_rops
;
294 if (!of_property_read_u32(np
, "anatop-enable-bit",
296 anatop_rops
.enable
= regulator_enable_regmap
;
297 anatop_rops
.disable
= regulator_disable_regmap
;
298 anatop_rops
.is_enabled
= regulator_is_enabled_regmap
;
300 rdesc
->enable_reg
= control_reg
;
301 rdesc
->enable_mask
= BIT(enable_bit
);
305 /* register regulator */
306 rdev
= devm_regulator_register(dev
, rdesc
, &config
);
309 if (ret
== -EPROBE_DEFER
)
310 dev_dbg(dev
, "failed to register %s, deferring...\n",
313 dev_err(dev
, "failed to register %s\n", rdesc
->name
);
317 platform_set_drvdata(pdev
, rdev
);
322 static const struct of_device_id of_anatop_regulator_match_tbl
[] = {
323 { .compatible
= "fsl,anatop-regulator", },
326 MODULE_DEVICE_TABLE(of
, of_anatop_regulator_match_tbl
);
328 static struct platform_driver anatop_regulator_driver
= {
330 .name
= "anatop_regulator",
331 .of_match_table
= of_anatop_regulator_match_tbl
,
333 .probe
= anatop_regulator_probe
,
336 static int __init
anatop_regulator_init(void)
338 return platform_driver_register(&anatop_regulator_driver
);
340 postcore_initcall(anatop_regulator_init
);
342 static void __exit
anatop_regulator_exit(void)
344 platform_driver_unregister(&anatop_regulator_driver
);
346 module_exit(anatop_regulator_exit
);
348 MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
349 MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
350 MODULE_DESCRIPTION("ANATOP Regulator driver");
351 MODULE_LICENSE("GPL v2");
352 MODULE_ALIAS("platform:anatop_regulator");