drivers/regulator/pv88060-regulator.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * pv88060-regulator.h - Regulator definitions for PV88060
   4  * Copyright (C) 2015 Powerventure Semiconductor Ltd.
   5  */
   6
   7 #ifndef __PV88060_REGISTERS_H__
   8 #define __PV88060_REGISTERS_H__
   9
  10 /* System Control and Event Registers */
  11 #define PV88060_REG_EVENT_A                     0x04
  12 #define PV88060_REG_MASK_A                      0x08
  13 #define PV88060_REG_MASK_B                      0x09
  14 #define PV88060_REG_MASK_C                      0x0A
  15
  16 /* Regulator Registers */
  17 #define PV88060_REG_BUCK1_CONF0                 0x1B
  18 #define PV88060_REG_BUCK1_CONF1                 0x1C
  19 #define PV88060_REG_LDO1_CONF                   0x1D
  20 #define PV88060_REG_LDO2_CONF                   0x1E
  21 #define PV88060_REG_LDO3_CONF                   0x1F
  22 #define PV88060_REG_LDO4_CONF                   0x20
  23 #define PV88060_REG_LDO5_CONF                   0x21
  24 #define PV88060_REG_LDO6_CONF                   0x22
  25 #define PV88060_REG_LDO7_CONF                   0x23
  26
  27 #define PV88060_REG_SW1_CONF                    0x3B
  28 #define PV88060_REG_SW2_CONF                    0x3C
  29 #define PV88060_REG_SW3_CONF                    0x3D
  30 #define PV88060_REG_SW4_CONF                    0x3E
  31 #define PV88060_REG_SW5_CONF                    0x3F
  32 #define PV88060_REG_SW6_CONF                    0x40
  33
  34 /* PV88060_REG_EVENT_A (addr=0x04) */
  35 #define PV88060_E_VDD_FLT                       0x01
  36 #define PV88060_E_OVER_TEMP                     0x02
  37
  38 /* PV88060_REG_MASK_A (addr=0x08) */
  39 #define PV88060_M_VDD_FLT                       0x01
  40 #define PV88060_M_OVER_TEMP                     0x02
  41
  42 /* PV88060_REG_BUCK1_CONF0 (addr=0x1B) */
  43 #define PV88060_BUCK_EN                 0x80
  44 #define PV88060_VBUCK_MASK                      0x7F
  45 /* PV88060_REG_LDO1/2/3/4/5/6/7_CONT */
  46 #define PV88060_LDO_EN                  0x40
  47 #define PV88060_VLDO_MASK                       0x3F
  48 /* PV88060_REG_SW1/2/3/4/5_CONF */
  49 #define PV88060_SW_EN                   0x80
  50
  51 /* PV88060_REG_BUCK1_CONF1 (addr=0x1C) */
  52 #define PV88060_BUCK_ILIM_SHIFT                 2
  53 #define PV88060_BUCK_ILIM_MASK                  0x0C
  54 #define PV88060_BUCK_MODE_SHIFT                 0
  55 #define PV88060_BUCK_MODE_MASK                  0x03
  56 #define PV88060_BUCK_MODE_SLEEP                 0x00
  57 #define PV88060_BUCK_MODE_AUTO                  0x01
  58 #define PV88060_BUCK_MODE_SYNC                  0x02
  59
  60 #endif  /* __PV88060_REGISTERS_H__ */