WIP FPC-III support
[linux/fpc-iii.git] / drivers / thermal / ti-soc-thermal / omap4xxx-bandgap.h
blob9a3955c3853ba112dbf12bf1d006e80b2f3718e6
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * OMAP4xxx bandgap registers, bitfields and temperature definitions
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * Contact:
7 * Eduardo Valentin <eduardo.valentin@ti.com>
8 */
9 #ifndef __OMAP4XXX_BANDGAP_H
10 #define __OMAP4XXX_BANDGAP_H
12 /**
13 * *** OMAP4430 ***
15 * Below, in sequence, are the Register definitions,
16 * the bitfields and the temperature definitions for OMAP4430.
19 /**
20 * OMAP4430 register definitions
22 * Registers are defined as offsets. The offsets are
23 * relative to FUSE_OPP_BGAP on 4430.
26 /* OMAP4430.FUSE_OPP_BGAP */
27 #define OMAP4430_FUSE_OPP_BGAP 0x0
29 /* OMAP4430.TEMP_SENSOR */
30 #define OMAP4430_TEMP_SENSOR_CTRL_OFFSET 0xCC
32 /**
33 * Register and bit definitions for OMAP4430
35 * All the macros bellow define the required bits for
36 * controlling temperature on OMAP4430. Bit defines are
37 * grouped by register.
40 /* OMAP4430.TEMP_SENSOR bits */
41 #define OMAP4430_BGAP_TEMPSOFF_MASK BIT(12)
42 #define OMAP4430_BGAP_TSHUT_MASK BIT(11)
43 #define OMAP4430_SINGLE_MODE_MASK BIT(10)
44 #define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK BIT(9)
45 #define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK BIT(8)
46 #define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
48 /**
49 * Temperature limits and thresholds for OMAP4430
51 * All the macros bellow are definitions for handling the
52 * ADC conversions and representation of temperature limits
53 * and thresholds for OMAP4430.
57 * ADC conversion table limits. Ignore values outside the TRM listed
58 * range to avoid bogus thermal shutdowns. See omap4430 TRM chapter
59 * "18.4.10.2.3 ADC Codes Versus Temperature".
61 #define OMAP4430_ADC_START_VALUE 13
62 #define OMAP4430_ADC_END_VALUE 107
63 /* bandgap clock limits (no control on 4430) */
64 #define OMAP4430_MAX_FREQ 32768
65 #define OMAP4430_MIN_FREQ 32768
67 /**
68 * *** OMAP4460 *** Applicable for OMAP4470
70 * Below, in sequence, are the Register definitions,
71 * the bitfields and the temperature definitions for OMAP4460.
74 /**
75 * OMAP4460 register definitions
77 * Registers are defined as offsets. The offsets are
78 * relative to FUSE_OPP_BGAP on 4460.
81 /* OMAP4460.FUSE_OPP_BGAP */
82 #define OMAP4460_FUSE_OPP_BGAP 0x0
84 /* OMAP4460.TEMP_SENSOR */
85 #define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0xCC
87 /* OMAP4460.BANDGAP_CTRL */
88 #define OMAP4460_BGAP_CTRL_OFFSET 0x118
90 /* OMAP4460.BANDGAP_COUNTER */
91 #define OMAP4460_BGAP_COUNTER_OFFSET 0x11C
93 /* OMAP4460.BANDGAP_THRESHOLD */
94 #define OMAP4460_BGAP_THRESHOLD_OFFSET 0x120
96 /* OMAP4460.TSHUT_THRESHOLD */
97 #define OMAP4460_BGAP_TSHUT_OFFSET 0x124
99 /* OMAP4460.BANDGAP_STATUS */
100 #define OMAP4460_BGAP_STATUS_OFFSET 0x128
103 * Register bitfields for OMAP4460
105 * All the macros bellow define the required bits for
106 * controlling temperature on OMAP4460. Bit defines are
107 * grouped by register.
109 /* OMAP4460.TEMP_SENSOR bits */
110 #define OMAP4460_BGAP_TEMPSOFF_MASK BIT(13)
111 #define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK BIT(11)
112 #define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK BIT(10)
113 #define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
115 /* OMAP4460.BANDGAP_CTRL bits */
116 #define OMAP4460_SINGLE_MODE_MASK BIT(31)
117 #define OMAP4460_MASK_HOT_MASK BIT(1)
118 #define OMAP4460_MASK_COLD_MASK BIT(0)
120 /* OMAP4460.BANDGAP_COUNTER bits */
121 #define OMAP4460_COUNTER_MASK (0xffffff << 0)
123 /* OMAP4460.BANDGAP_THRESHOLD bits */
124 #define OMAP4460_T_HOT_MASK (0x3ff << 16)
125 #define OMAP4460_T_COLD_MASK (0x3ff << 0)
127 /* OMAP4460.TSHUT_THRESHOLD bits */
128 #define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16)
129 #define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0)
131 /* OMAP4460.BANDGAP_STATUS bits */
132 #define OMAP4460_HOT_FLAG_MASK BIT(1)
133 #define OMAP4460_COLD_FLAG_MASK BIT(0)
136 * Temperature limits and thresholds for OMAP4460
138 * All the macros bellow are definitions for handling the
139 * ADC conversions and representation of temperature limits
140 * and thresholds for OMAP4460.
143 /* ADC conversion table limits */
144 #define OMAP4460_ADC_START_VALUE 530
145 #define OMAP4460_ADC_END_VALUE 932
146 /* bandgap clock limits */
147 #define OMAP4460_MAX_FREQ 1500000
148 #define OMAP4460_MIN_FREQ 1000000
149 /* interrupts thresholds */
150 #define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
151 #define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
152 #define OMAP4460_T_HOT 800 /* 73 deg C */
153 #define OMAP4460_T_COLD 795 /* 71 deg C */
155 #endif /* __OMAP4XXX_BANDGAP_H */